Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-23 Thread Scott Wood
On Sat, 21 May 2011 08:15:36 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote: I see a 2% cost going from virtual pmd to full 4-level walk in the benchmark mentioned above (some type of sort), and just under 3% in

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-23 Thread Benjamin Herrenschmidt
On Mon, 2011-05-23 at 13:54 -0500, Scott Wood wrote: On Sat, 21 May 2011 08:15:36 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote: I see a 2% cost going from virtual pmd to full 4-level walk in the benchmark mentioned

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-23 Thread Scott Wood
On Tue, 24 May 2011 06:51:01 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: Is your linear mapping bolted ? If it is you may be able to cut out most of the save/restore stuff (SRR0,1, ...) since with a normal walk you won't take nested misses. It is bolted -- we ignore anything

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-23 Thread Benjamin Herrenschmidt
On Mon, 2011-05-23 at 18:31 -0500, Scott Wood wrote: On Tue, 24 May 2011 06:51:01 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: Is your linear mapping bolted ? If it is you may be able to cut out most of the save/restore stuff (SRR0,1, ...) since with a normal walk you

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-20 Thread Scott Wood
On Thu, 19 May 2011 07:33:55 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote: Loads with non-linear access patterns were producing a very high ratio of recursive pt faults to regular tlb misses. Rather than choose between a

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-20 Thread Benjamin Herrenschmidt
On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote: I see a 2% cost going from virtual pmd to full 4-level walk in the benchmark mentioned above (some type of sort), and just under 3% in page-stride lat_mem_rd from lmbench. OTOH, the virtual pmd approach still leaves the possibility of

[PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-18 Thread Scott Wood
Loads with non-linear access patterns were producing a very high ratio of recursive pt faults to regular tlb misses. Rather than choose between a 4-level table walk or a 1-level virtual page table lookup, use a hybrid scheme with a virtual linear pmd, followed by a 2-level lookup in the normal

Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table

2011-05-18 Thread Benjamin Herrenschmidt
On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote: Loads with non-linear access patterns were producing a very high ratio of recursive pt faults to regular tlb misses. Rather than choose between a 4-level table walk or a 1-level virtual page table lookup, use a hybrid scheme with a virtual