On Mon, Apr 22, 2013 at 12:56:37PM +1000, Michael Ellerman wrote:
On Mon, Apr 22, 2013 at 09:45:33AM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 09:34:36AM +1000, Michael Ellerman wrote:
On Fri, Apr 19, 2013 at 05:32:45PM +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts
On Mon, Apr 22, 2013 at 07:06:17PM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 12:56:37PM +1000, Michael Ellerman wrote:
On Mon, Apr 22, 2013 at 09:45:33AM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 09:34:36AM +1000, Michael Ellerman wrote:
On Fri, Apr 19, 2013 at 05:32:45PM
On Tue, Apr 23, 2013 at 09:34:16AM +1000, Michael Ellerman wrote:
On Mon, Apr 22, 2013 at 07:06:17PM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 12:56:37PM +1000, Michael Ellerman wrote:
On Mon, Apr 22, 2013 at 09:45:33AM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 09:34:36AM +1000,
On Fri, Apr 19, 2013 at 05:32:45PM +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
diff --git
On Mon, Apr 22, 2013 at 09:34:36AM +1000, Michael Ellerman wrote:
On Fri, Apr 19, 2013 at 05:32:45PM +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes
On Mon, Apr 22, 2013 at 09:45:33AM +0800, Gavin Shan wrote:
On Mon, Apr 22, 2013 at 09:34:36AM +1000, Michael Ellerman wrote:
On Fri, Apr 19, 2013 at 05:32:45PM +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c