Hi, Dan,
Does I have followed your new API? :-)
[..]
+static struct dma_chan
*of_find_dma_chan_by_phandle(phandle phandle)
+{
+ struct device_node *np;
+ struct dma_chan *chan;
+ struct fsl_dma_device *fdev;
+
+ np =
Hi,
--- /dev/null
+++ b/drivers/dma/fsldma.c
@@ -0,0 +1,995 @@
Thanks for using kernel-doc notation. However, ...
+/**
+ * fsl_dma_alloc_descriptor - Allocate descriptor from
channel's DMA pool.
Function parameters need to be listed described here.
See
If this is experimental, perhaps you should mark the depends line as
such
depends on on DMA_ENGINE PPC EXPERIMENTAL
I'll add EXPERIMENTAL for MPC83xx only.
[...]
+
+fsl_dma_memcpy_issue_pending(chan);
+while (fsl_dma_is_complete(chan, cookie, NULL, NULL)
+
Hi, Dan,
Does I have followed your new API? :-)
---
Greetings,
Please copy me on any updates to this driver, drivers/dma, or
crypto/async_tx.
Ok.
Below are a few review comments...
Regards,
Dan
+/**
+ * fsl_dma_alloc_descriptor - Allocate descriptor from
channel's DMA
On Tue, Sep 11, 2007 at 06:10:53PM +0800, Zhang Wei-r63237 wrote:
+
+ fsl_dma_memcpy_issue_pending(chan);
+ while (fsl_dma_is_complete(chan, cookie, NULL, NULL)
+ != DMA_SUCCESS);
Again, is it possible to hang your thread here?
[...]
I'll add msleep here.
I
Zhang Wei-r63237 wrote:
+/**
+ * fsl_chan_xfer_ld_queue -- Transfer the link descriptors
in channel
+ * ld_queue.
The function's short description (unfortunately) must be on only one
line. E.g.:
* fsl_chan_xfer_ld_queue - Transfer link descriptors in
channel
From: Scott Wood [mailto:[EMAIL PROTECTED]
Sent: Tuesday, September 11, 2007 7:20 AM
To: Zhang Wei-r63237
Cc: Nelson, Shannon; [EMAIL PROTECTED];
linuxppc-dev@ozlabs.org; Williams, Dan J; [EMAIL PROTECTED]
Subject: Re: [PATCH 5/5] Add DMA engine driver for Freescale
MPC85xx processors.
On Tue
Dan Williams wrote:
This routine implies that there is a piece of code somewhere that
wants to select which channels it can use. A similar effect can be
achieved by registering a dma_client with the dmaengine interface
('dma_async_client_register'). Then when the client code makes a call
On 9/9/07, Timur Tabi [EMAIL PROTECTED] wrote:
Dan Williams wrote:
This routine implies that there is a piece of code somewhere that
wants to select which channels it can use. A similar effect can be
achieved by registering a dma_client with the dmaengine interface
The driver implements DMA engine API for Freescale MPC85xx DMA
controller, which could be used for MEM--MEM, IO_ADDR--MEM
and IO_ADDR--IO_ADDR data transfer.
The driver supports the Basic mode of Freescale MPC85xx DMA controller.
The MPC85xx processors supported include MPC8540/60, MPC8555,
On Fri, 7 Sep 2007 18:54:18 +0800 Zhang Wei wrote:
Signed-off-by: Zhang Wei [EMAIL PROTECTED]
Signed-off-by: Ebony Zhu [EMAIL PROTECTED]
---
drivers/dma/Kconfig |8 +
drivers/dma/Makefile |1 +
drivers/dma/fsldma.c | 995
++
11 matches
Mail list logo
