Re: [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code

Paul Mackerras writes: > diff --git a/arch/powerpc/lib/quad.S b/arch/powerpc/lib/quad.S > new file mode 100644 > index 000..2cc77dc > --- /dev/null > +++ b/arch/powerpc/lib/quad.S > @@ -0,0 +1,62 @@ > +/* > + * Quadword loads and stores > + * for use in instruction

Re: [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code

Hi Paul, On Fri, Aug 25, 2017 at 03:41:53PM +1000, Paul Mackerras wrote: > diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S > index a58777c..6840911 100644 > --- a/arch/powerpc/lib/ldstfp.S > +++ b/arch/powerpc/lib/ldstfp.S > @@ -178,10 +178,10 @@ _GLOBAL(do_stfd) >

[PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code

This extends the instruction emulation infrastructure in sstep.c to handle all the load and store instructions defined in the Power ISA v3.0, except for the atomic memory operations, ldmx (which was never implemented), lfdp/stfdp, and the vector element load/stores. The instructions added are: