Christophe Leroy writes:
> Le 16/08/2021 à 08:44, kajoljain a écrit :
>> On 8/14/21 6:14 PM, Michael Ellerman wrote:
...
>>>
>>> eg.
>>>
>>> if (use_siar && siar_valid(regs) && siar)
>>> return siar + perf_ip_adjust(regs);
>>> else if (use_siar)
>>> return 0;
On 8/17/21 11:07 AM, Madhavan Srinivasan wrote:
>
> On 8/16/21 12:26 PM, Christophe Leroy wrote:
>>
>>
>> Le 16/08/2021 à 08:44, kajoljain a écrit :
>>>
>>>
>>> On 8/14/21 6:14 PM, Michael Ellerman wrote:
Christophe Leroy writes:
> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>>
On 8/16/21 12:26 PM, Christophe Leroy wrote:
Le 16/08/2021 à 08:44, kajoljain a écrit :
On 8/14/21 6:14 PM, Michael Ellerman wrote:
Christophe Leroy writes:
Le 13/08/2021 à 10:24, Kajol Jain a écrit :
Incase of random sampling, there can be scenarios where SIAR is not
latching sample
Le 16/08/2021 à 08:44, kajoljain a écrit :
On 8/14/21 6:14 PM, Michael Ellerman wrote:
Christophe Leroy writes:
Le 13/08/2021 à 10:24, Kajol Jain a écrit :
Incase of random sampling, there can be scenarios where SIAR is not
latching sample address and results in 0 value. Since current
On 8/13/21 3:04 PM, Christophe Leroy wrote:
>
>
> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>> Incase of random sampling, there can be scenarios where SIAR is not
>> latching sample address and results in 0 value. Since current code
>> directly returning the siar value, we could see
On 8/14/21 6:14 PM, Michael Ellerman wrote:
> Christophe Leroy writes:
>> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>>> Incase of random sampling, there can be scenarios where SIAR is not
>>> latching sample address and results in 0 value. Since current code
>>> directly returning the siar
Christophe Leroy writes:
> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>> Incase of random sampling, there can be scenarios where SIAR is not
>> latching sample address and results in 0 value. Since current code
>> directly returning the siar value, we could see multiple instruction
>> pointer
Christophe Leroy writes:
> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>> Incase of random sampling, there can be scenarios where SIAR is not
>> latching sample address and results in 0 value. Since current code
>> directly returning the siar value, we could see multiple instruction
>> pointer
Le 13/08/2021 à 10:24, Kajol Jain a écrit :
Incase of random sampling, there can be scenarios where SIAR is not
latching sample address and results in 0 value. Since current code
directly returning the siar value, we could see multiple instruction
pointer values as 0 in perf report.
Patch
Le 13/08/2021 à 10:24, Kajol Jain a écrit :
Incase of random sampling, there can be scenarios where SIAR is not
latching sample address and results in 0 value. Since current code
directly returning the siar value, we could see multiple instruction
pointer values as 0 in perf report.
Patch
Incase of random sampling, there can be scenarios where SIAR is not
latching sample address and results in 0 value. Since current code
directly returning the siar value, we could see multiple instruction
pointer values as 0 in perf report.
Patch resolves this issue by adding a ternary condition to
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