Quoting Anatolij Gustschin (2013-08-23 15:05:39)
On Fri, 02 Aug 2013 15:30:00 -0700
Mike Turquette mturque...@linaro.org wrote:
Quoting Gerhard Sittig (2013-07-22 05:14:40)
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian
On Fri, 02 Aug 2013 15:30:00 -0700
Mike Turquette mturque...@linaro.org wrote:
Quoting Gerhard Sittig (2013-07-22 05:14:40)
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common
[ trimming the CC: list for this strictly clock related and
source code adjusting change, to not spam the device tree ML or
other subsystem maintainers, just keeping ARM (for clock) and
PPC lists and people in the loop ]
On Fri, Aug 02, 2013 at 15:30 -0700, Mike Turquette wrote:
Quoting
Quoting Gerhard Sittig (2013-07-22 05:14:40)
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
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