mpe, and this thanks.
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1204,7 +1204,7 @@ int analyse_instr(struct instruction_op *op,
const struct pt_regs *regs,
struct ppc_inst instr)
{
Le 14/05/2020 à 14:19, Alistair Popple a écrit :
On Thursday, 14 May 2020 4:15:06 PM AEST Christophe Leroy wrote:
Shouldn't this patch go before patch 23 ?
Perhaps I am missing something, but it seems reasonable enough to me that you
would introduce the machinery for dealing with prefix
On Thursday, 14 May 2020 4:15:06 PM AEST Christophe Leroy wrote:
> Shouldn't this patch go before patch 23 ?
Perhaps I am missing something, but it seems reasonable enough to me that you
would introduce the machinery for dealing with prefix instructions prior to
defining them. What would be the
Shouldn't this patch go before patch 23 ?
Christophe
Le 06/05/2020 à 05:40, Jordan Niethe a écrit :
This adds emulation support for the following prefixed integer
load/stores:
* Prefixed Load Byte and Zero (plbz)
* Prefixed Load Halfword and Zero (plhz)
* Prefixed Load Halfword
This adds emulation support for the following prefixed integer
load/stores:
* Prefixed Load Byte and Zero (plbz)
* Prefixed Load Halfword and Zero (plhz)
* Prefixed Load Halfword Algebraic (plha)
* Prefixed Load Word and Zero (plwz)
* Prefixed Load Word Algebraic (plwa)
* Prefixed Load
