Re: [RFC][PATCH] powerpc/64s: Leave IRQs hard enabled over context switch

2017-05-03 Thread Benjamin Herrenschmidt
On Wed, 2017-05-03 at 20:26 +1000, Michael Ellerman wrote: > Couldn't we avoid the whole problem by just having two bolted slots for > the stack, meaning we could have the current and next stack bolted at > all times. > > That would mean we'd be using 4 slots for bolted entries, which is one >

Re: [RFC][PATCH] powerpc/64s: Leave IRQs hard enabled over context switch

2017-05-03 Thread Michael Ellerman
Benjamin Herrenschmidt writes: > On Wed, 2017-05-03 at 17:34 +1000, Nicholas Piggin wrote: >> Extending the soft IRQ disable to cover PMU interrupts will allow this >> hard disable to be removed from hash based kernels too, but they will >> still have to soft-disable

Re: [RFC][PATCH] powerpc/64s: Leave IRQs hard enabled over context switch

2017-05-03 Thread Nicholas Piggin
On Wed, 03 May 2017 10:28:27 +0200 Benjamin Herrenschmidt wrote: > On Wed, 2017-05-03 at 17:34 +1000, Nicholas Piggin wrote: > > Extending the soft IRQ disable to cover PMU interrupts will allow this > > hard disable to be removed from hash based kernels too, but they

Re: [RFC][PATCH] powerpc/64s: Leave IRQs hard enabled over context switch

2017-05-03 Thread Benjamin Herrenschmidt
On Wed, 2017-05-03 at 17:34 +1000, Nicholas Piggin wrote: > Extending the soft IRQ disable to cover PMU interrupts will allow this > hard disable to be removed from hash based kernels too, but they will > still have to soft-disable PMU interrupts. > > - Q1: Can we do this? It gives nice profiles

[RFC][PATCH] powerpc/64s: Leave IRQs hard enabled over context switch

2017-05-03 Thread Nicholas Piggin
Commit 4387e9ff25 ("[POWERPC] Fix PMU + soft interrupt disable bug") hard disabled interrupts over the low level context switch, because the SLB management can't cope with a PMU interrupt accesing the stack in that window. Radix based kernel mapping does not use the SLB so it does not require