On Thu, 09 Aug 2007 23:05:36 +1000
Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote:
> On Thu, 2007-08-09 at 07:04 -0500, Josh Boyer wrote:
> >
> > > We don't have critical wired to anything, I don't expect watchdog
> > to
> > > cause another fault.. so just wondering.
> >
> > We being who? I
On Thu, 2007-08-09 at 07:04 -0500, Josh Boyer wrote:
>
> > We don't have critical wired to anything, I don't expect watchdog
> to
> > cause another fault.. so just wondering.
>
> We being who? I'm slightly confused here.
I think Kumar doesn't know that we are talking about the BG kernel whic
On Thu, Aug 09, 2007 at 12:28:20AM -0500, Kumar Gala wrote:
> >>Did you actually see this happen?
> >
> >Yes.
>
> When?
During some bluegene debug.
> We don't have critical wired to anything, I don't expect watchdog to
> cause another fault.. so just wondering.
We being who? I'm slightly con
On Thu, 2007-08-09 at 01:35 -0500, Kumar Gala wrote:
> Did you actually see this happen?
> >>>
> >>> Yes.
> >>
> >> When?
> >>
> >> We don't have critical wired to anything, I don't expect watchdog to
> >> cause another fault.. so just wondering.
> >
> > On debug (trace) interrupts on blue gen
Did you actually see this happen?
>>>
>>> Yes.
>>
>> When?
>>
>> We don't have critical wired to anything, I don't expect watchdog to
>> cause another fault.. so just wondering.
>
> On debug (trace) interrupts on blue gene.
Do you know why the debug code caused a fault?
- k
_
On Thu, Aug 09, 2007 at 12:28:20AM -0500, Kumar Gala wrote:
>
> On Aug 8, 2007, at 11:00 AM, Josh Boyer wrote:
>
> > On Wed, 8 Aug 2007 10:20:45 -0500
> > Kumar Gala <[EMAIL PROTECTED]> wrote:
> >
> >>
> >> On Aug 6, 2007, at 11:20 PM, David Gibson wrote:
> >>
> >>> The 440 family of processors d
On Aug 8, 2007, at 11:00 AM, Josh Boyer wrote:
> On Wed, 8 Aug 2007 10:20:45 -0500
> Kumar Gala <[EMAIL PROTECTED]> wrote:
>
>>
>> On Aug 6, 2007, at 11:20 PM, David Gibson wrote:
>>
>>> The 440 family of processors don't have a tlbie instruction. So, we
>>> implement TLB invalidates by explicit
On Thu, Aug 09, 2007 at 09:01:29AM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2007-08-08 at 16:29 -0500, Josh Boyer wrote:
> > On Wed, 8 Aug 2007 20:43:25 + (UTC)
> > Hollis Blanchard <[EMAIL PROTECTED]> wrote:
> >
> > > On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> > > >
> >
On Wed, 2007-08-08 at 17:11 -0500, Hollis Blanchard wrote:
> On Wed, 2007-08-08 at 16:29 -0500, Josh Boyer wrote:
> > On Wed, 8 Aug 2007 20:43:25 + (UTC)
> > Hollis Blanchard <[EMAIL PROTECTED]> wrote:
> >
> > > On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> > > >
> > > > This patc
On Wed, Aug 08, 2007 at 05:11:09PM -0500, Hollis Blanchard wrote:
> On Wed, 2007-08-08 at 16:29 -0500, Josh Boyer wrote:
> > On Wed, 8 Aug 2007 20:43:25 + (UTC)
> > Hollis Blanchard <[EMAIL PROTECTED]> wrote:
> >
> > > On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> > > >
> > > > Th
On Wed, 2007-08-08 at 16:29 -0500, Josh Boyer wrote:
> On Wed, 8 Aug 2007 20:43:25 + (UTC)
> Hollis Blanchard <[EMAIL PROTECTED]> wrote:
>
> > On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> > >
> > > This patch fixes the problem in both arch/ppc and arch/powerpc by
> > > inhibiting
On Wed, 2007-08-08 at 16:29 -0500, Josh Boyer wrote:
> On Wed, 8 Aug 2007 20:43:25 + (UTC)
> Hollis Blanchard <[EMAIL PROTECTED]> wrote:
>
> > On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> > >
> > > This patch fixes the problem in both arch/ppc and arch/powerpc by
> > > inhibiting
On Wed, 8 Aug 2007 20:43:25 + (UTC)
Hollis Blanchard <[EMAIL PROTECTED]> wrote:
> On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
> >
> > This patch fixes the problem in both arch/ppc and arch/powerpc by
> > inhibiting interrupts (even critical and debug interrupts) across the
> > rel
On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote:
>
> This patch fixes the problem in both arch/ppc and arch/powerpc by
> inhibiting interrupts (even critical and debug interrupts) across the
> relevant instructions.
How could a critical or debug interrupt modify the contents of MMUCR?
--
On Wed, 8 Aug 2007 10:20:45 -0500
Kumar Gala <[EMAIL PROTECTED]> wrote:
>
> On Aug 6, 2007, at 11:20 PM, David Gibson wrote:
>
> > The 440 family of processors don't have a tlbie instruction. So, we
> > implement TLB invalidates by explicitly searching the TLB with tlbsx.,
> > then clobbering t
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, August 08, 2007 11:21 AM
> To: [EMAIL PROTECTED]
> Cc: [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org; Todd Inglett;
> Volkmar Uhlig
> Subject: Re: Fix small race in 44x tlbie fu
On Aug 6, 2007, at 11:20 PM, David Gibson wrote:
> The 440 family of processors don't have a tlbie instruction. So, we
> implement TLB invalidates by explicitly searching the TLB with tlbsx.,
> then clobbering the relevant entry, if any. Unfortunately the PID for
> the search needs to be stored
On Tue, 7 Aug 2007 14:20:50 +1000
David Gibson <[EMAIL PROTECTED]> wrote:
> The 440 family of processors don't have a tlbie instruction. So, we
> implement TLB invalidates by explicitly searching the TLB with tlbsx.,
> then clobbering the relevant entry, if any. Unfortunately the PID for
> the s
The 440 family of processors don't have a tlbie instruction. So, we
implement TLB invalidates by explicitly searching the TLB with tlbsx.,
then clobbering the relevant entry, if any. Unfortunately the PID for
the search needs to be stored in the MMUCR register, which is also
used by the TLB miss
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