IE. Take an x86 version of that test, writing to memory, doing a writel
to some MMIO, then another memory write, can those be re-ordered with
the current x86 version of writel ?
Yes, the same thing can happen on x86. As far as I could tell, this is
something that all other arches can
On Fri, 2008-05-23 at 08:36 -0400, Benjamin Herrenschmidt wrote:
- mandate some kind of dma_sync_for_device/cpu on consistent memory.
Almost no driver do that currently tho. They only do that for non
consistent memory mapped with dma_map_*.
- mandate the use of wmb,rmb,mb
Benjamin Herrenschmidt wrote:
On Fri, 2008-05-23 at 08:36 -0400, Benjamin Herrenschmidt wrote:
- mandate some kind of dma_sync_for_device/cpu on consistent memory.
Almost no driver do that currently tho. They only do that for non
consistent memory mapped with dma_map_*.
-
On Fri, 2008-05-23 at 16:14 -0500, Scott Wood wrote:
As Trent pointed out, if you change to eieio in the accessors, that'd
require drivers to also use mmiowb() before spin_unlock(), which fewer
drivers currently do.
No, this is a totally different issue. And we keep track of the need
for a
