RE: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

2011-06-17 Thread David Laight
Hello, Motioned to the memory aligned, now there is such requirement: When the driver send an packet to hardware, the skb's address passed by stack do a dma map into hardware, the skb's dma address must be 64-byte aligned. Does the hardware support buffer chaining? In which case you only

Re: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

2011-06-17 Thread David Miller
From: Holger Brunck holger.bru...@keymile.com Date: Fri, 17 Jun 2011 10:30:39 +0200 From: Clive Stubbings clive.stubbi...@xentech.co.uk The RIPTR and TIPTR (receive/transmit internal temporary data pointer), used by microcode as a temporary buffer for data, must be 32-byte aligned