Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 23:18:05:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
not sure about the
On Oct 8, 2009, at 12:22 PM, Joakim Tjernlund wrote:
hare are comments in the kernel that dcbst wrongly
generates TLB Errors with store set on 8xx. Is this really so?
Should dcbst always trap as a load?
There are many comments written about 8xx as various
behavior was discovered. Worse,
On Thu, 2009-10-08 at 13:11 -0700, Dan Malek wrote:
There are many comments written about 8xx as various
behavior was discovered. Worse, some of these details
would be different among the different processor versions.
You need to be careful and test as many different part
versions as
Hoy Dan !
While you are around ... I have a question :-)
Do you happen to remember what the story is with the invalidation of
unpopulated (aka invalid) entries ?
IE. We create those in the 8xx TLB miss when the PTE is !present (or the
PMD is absent). Those then cause a TLB error on the next
Dan Malek d...@embeddedalley.com wrote on 08/10/2009 22:11:07:
On Oct 8, 2009, at 12:22 PM, Joakim Tjernlund wrote:
hare are comments in the kernel that dcbst wrongly
generates TLB Errors with store set on 8xx. Is this really so?
Should dcbst always trap as a load?
Hi, been a long
On Thu, 2009-10-08 at 21:22 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009
23:18:05:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These
One could try clearing the store bit in the page fault handler, but then
that might cause a loop.
Not sure it has any practical meaning though.
Anyhow, you are welcome to have a look at the patches I have been tossing out.
The store bit in do_page_fault() is -very- important (and the only
Hi Ben.
On Oct 8, 2009, at 1:28 PM, Benjamin Herrenschmidt wrote:
While you are around ... I have a question :-)
I'll try. Many brain cells have been replaced or lost
over the years :-)
Do you happen to remember what the story is with the invalidation of
unpopulated (aka invalid) entries
On Thu, 2009-10-08 at 15:08 -0700, Dan Malek wrote:
Hi Ben.
On Oct 8, 2009, at 1:28 PM, Benjamin Herrenschmidt wrote:
While you are around ... I have a question :-)
I'll try. Many brain cells have been replaced or lost
over the years :-)
Replaced ? You lucky ! I only lose mines :-)
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 09/10/2009 00:23:48:
On Thu, 2009-10-08 at 15:08 -0700, Dan Malek wrote:
Hi Ben.
On Oct 8, 2009, at 1:28 PM, Benjamin Herrenschmidt wrote:
While you are around ... I have a question :-)
I'll try. Many brain cells have been
On Oct 8, 2009, at 1:37 PM, Joakim Tjernlund wrote:
Hi, been a long time since I heard from you :)
Yeah, hiding among other projects :-)
Anyhow, you are welcome to have a look at the patches I have been
tossing out.
I've been looking, but since I'm not familiar with the current
VM
On Fri, 2009-10-09 at 01:01 +0200, Joakim Tjernlund wrote:
Ok, that's my understanding too and I think we had the tlbie in
update_mmu_cache to do the trick, though the comment is misleading
making it think that the only reason it's there is for the dcbst
problem. At least that's my
On Thu, 2009-10-08 at 17:36 -0700, Dan Malek wrote:
On Oct 8, 2009, at 3:23 PM, Benjamin Herrenschmidt wrote:
• Reference and change bit updates—The MPC850 does not generate an
exception for
an R (reference) bit update. In fact, there is no entry for an R
bit in the TLB.
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
not sure about the dsisr test here, what is the point ?
Cheers,
Ben.
---
arch/powerpc/mm/fault.c |
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 23:18:05:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
not sure about the
On Thu, 2009-10-08 at 00:12 +0200, Joakim Tjernlund wrote:
not sure about the dsisr test here, what is the point ?
To remove the need to do the same in generic pte code. Then
we only need to do it when it counts. Lets see how it works out.
But I'm not sure I trust that DSISR test. Just do
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