Hi,
I'm trying to build a 2.6.21 kernel (ppc arch for a 74xx processor)
with the PREEMPT_RT patch patch-2.6.21-rt8. But I'm having some
compilation errors in the very early stage. The errors are shown
below.
arch/ppc/kernel/asm-offsets.c: In function 'main':
arch/ppc/kernel/asm-offsets.c:148:
Hi Nick,
Cool. How does it go when there are significant amount of instructions
between the lock and the unlock? A real(ish) workload, like dbench on
ramdisk (which should hit the dcache lock).
Good question, I'll see if we can see a difference on dbench.
Anton
Hi Nick,
Ah, good to see this one come back. I also tested tbench over localhost
btw which actually did show some speedup on the G5.
BTW. this was the last thing left:
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg29738.html
Don't know if you took a look at that again,
This patch series adds support for the MPC512x from Freescale to the
i2c-mpc driver. At that occasion, issues with __devinit[data] have
been fixed and the doc of the FSL I2C dts bindings updated. It has
been tested on a MPC5121ADS, TQM5200 and TQM8560 board
Changes since v1:
- use macro
From: Wolfgang Grandegger w...@denx.de
__devinit[data] has not yet been used for all initialization functions
and data. To avoid truncating lines, the struct mpc_i2c_match_data has
been renamed to mpc_i2c_data, which is even the better name.
Signed-off-by: Wolfgang Grandegger w...@denx.de
From: Wolfgang Grandegger w...@denx.de
To prepare support for the MPC512x processors from Freescale the
setclock initialization functions have been renamed to setup
because I2C interrupts must be enabled for the MPC512x by this
function as well.
Signed-off-by: Wolfgang Grandegger w...@denx.de
From: Wolfgang Grandegger w...@denx.de
This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the clock-frequency property and removes
the obsolete cell-index, device_type and fsl-i2c property.
Furthermore an example for the MPC5121 has been added.
Signed-off-by:
From: Wolfgang Grandegger w...@denx.de
As I2C interrupts must be enabled for the MPC512x by the setup function
as well, fsl,preserve-clocking is handled in a slighly different way.
Also, the old settings are now reported calling dev_dbg(). For the
MPC512x the clock setup function of the MPC52xx
On Wed, Feb 17, 2010 at 08:37:14PM +1100, Anton Blanchard wrote:
Hi Nick,
Cool. How does it go when there are significant amount of instructions
between the lock and the unlock? A real(ish) workload, like dbench on
ramdisk (which should hit the dcache lock).
Good question, I'll see
On Wed, Feb 17, 2010 at 08:43:14PM +1100, Anton Blanchard wrote:
Hi Nick,
Ah, good to see this one come back. I also tested tbench over localhost
btw which actually did show some speedup on the G5.
BTW. this was the last thing left:
Yes I suppose the branch can be executed non speculatively before the
lwsync is completed. Wheras the larx/stcwx will have to complete before
the branch outcome can be known. I suppose probably not worthwhile
avoiding the full IO sync by adding yet more crap to make this work.
Thanks for
Hi,
We'd like to run Linux on core0 of P2020 and some bare metal application
running without OS
on core1. Is it possible to start this application from Linux ? I've
seen example of running 2 copies
of Linux in AMP mode, in which case both are started from u-boot. I'd
like to leave core1 in
These patches attempt to provide support for the Freescale MPC512x
FEC in the fs_enet driver. The first cleanup patch replaces printk
by dev_xxx. The second and third attemt to support MPC5121 FEC
in the FEC driver.
Changes since previous version:
- don't attempt to provide runtime selection of
Signed-off-by: Anatolij Gustschin ag...@denx.de
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/net/fs_enet/fs_enet-main.c | 39 +--
drivers/net/fs_enet/mac-fcc.c |5 ++-
drivers/net/fs_enet/mac-fec.c | 12 --
Extend the fs_enet driver to support MPC512x FEC.
Enable it with CONFIG_FS_ENET_MPC5121_FEC option.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
MPC5121 FEC requeries 4-byte alignmnent for TX data buffers.
This patch is a work around that copies misaligned tx packets
to an aligned skb before sending.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
On Wed, Feb 17, 2010 at 7:55 AM, Anatolij Gustschin ag...@denx.de wrote:
Extend the fs_enet driver to support MPC512x FEC.
Enable it with CONFIG_FS_ENET_MPC5121_FEC option.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk
On Wed, Feb 17, 2010 at 7:55 AM, Anatolij Gustschin ag...@denx.de wrote:
MPC5121 FEC requeries 4-byte alignmnent for TX data buffers.
This patch is a work around that copies misaligned tx packets
to an aligned skb before sending.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by:
On Feb 17, 2010, at 6:54 AM, Felix Radensky wrote:
Hi,
We'd like to run Linux on core0 of P2020 and some bare metal application
running without OS
on core1. Is it possible to start this application from Linux ? I've seen
example of running 2 copies
of Linux in AMP mode, in which case
This patch improves the recovery of the MPC's I2C bus from errors like bus
hangs resulting in timeouts:
1. make the bus timeout configurable, as it depends on the bus clock and
the attached slave chip(s); default is still 1 second;
2. detect any of the cases indicated by the CF, BB and RXAK
Make the I2C adapter timeout configurable through a Device Tree property
which gives the timeout in microseconds.
Change vs. v.1: use fsl,timeout as property name (Thanks, Grant)
Signed-off-by: Albrecht Dreß albrecht.dr...@arcor.de
---
---
On Wed, Feb 17, 2010 at 11:59 AM, Albrecht Dreß albrecht.dr...@arcor.de wrote:
This patch improves the recovery of the MPC's I2C bus from errors like bus
hangs resulting in timeouts:
1. make the bus timeout configurable, as it depends on the bus clock and
the attached slave chip(s); default
On Wed, Feb 17, 2010 at 11:59 AM, Albrecht Dreß albrecht.dr...@arcor.de wrote:
Make the I2C adapter timeout configurable through a Device Tree property
which gives the timeout in microseconds.
Change vs. v.1: use fsl,timeout as property name (Thanks, Grant)
Signed-off-by: Albrecht Dreß
Historically, Linux has assumed a single PCI host bridge, with that bridge
claiming all the address space left after RAM and legacy devices are taken out.
If the system contains multiple host bridges, we can no longer operate under
that assumption. We have to know what parts of the address space
No functional change; this breaks up pci_read_bridge_bases() into separate
pieces for the I/O, memory, and prefetchable memory windows, similar to how
Yinghai recently split up pci_setup_bridge() in 68e84ff3bdc.
Signed-off-by: Bjorn Helgaas bjorn.helg...@hp.com
---
drivers/pci/probe.c | 54
No functional change; this fills in the bus subtractive decode resources
after reading the bridge window information rather than before. Also,
print out the subtractive decode resources as we already do for the
positive decode windows.
Signed-off-by: Bjorn Helgaas bjorn.helg...@hp.com
---
No functional change; this converts loops that iterate from 0 to
PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the
pci_bus_for_each_resource() iterator instead.
This doesn't change the way resources are stored; it merely removes
dependencies on the fact that they're in a table.
Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources
forwarded to a bus by its upstream bridge. We've increased this size
several times when the table overflowed.
But there's no good limit on the number of resources because host bridges
and subtractive decode bridges can
The main benefit of using ACPI host bridge window information is that
we can do better resource allocation in systems with multiple host bridges,
e.g., http://bugzilla.kernel.org/show_bug.cgi?id=14183
Sometimes we need _CRS information even if we only have one host bridge,
e.g.,
Le mercredi 17 février 2010 à 15:55 +0100, Anatolij Gustschin a écrit :
MPC5121 FEC requeries 4-byte alignmnent for TX data buffers.
This patch is a work around that copies misaligned tx packets
to an aligned skb before sending.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by:
On Wed, 17 Feb 2010 16:17:16 +0100
Eric Dumazet eric.duma...@gmail.com wrote:
Le mercredi 17 février 2010 à 15:55 +0100, Anatolij Gustschin a écrit :
...
+static struct sk_buff *tx_skb_align_workaround(struct net_device *dev,
+ struct sk_buff *skb)
MPC5121 FEC requeries 4-byte alignmnent for TX data buffers.
This patch is a work around that copies misaligned tx packets
to an aligned skb before sending.
Signed-off-by: John Rigby jcri...@gmail.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Suppose for a moment we have 2 threads (hot-unplugged thread 1 and 3, we
can construct an equivalent but more complex example for 4 threads), and
we have 4 tasks, 3 SCHED_OTHER of equal nice level and 1 SCHED_FIFO, the
SCHED_FIFO task will consume exactly 50% walltime of whatever cpu it
ends
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Wed, 27 Jan 2010 13:10:56 +1100
I'll try do make ppc catch up with some of that see how it goes.
FWIW I'm taking care of syncing up sparc in this area
right now.
I just noticed the -dma_mask assignment got moved as well.
Really, any
On Wed, 17 Feb 2010 16:22:59 -0800 (PST)
David Miller da...@davemloft.net wrote:
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Wed, 27 Jan 2010 13:10:56 +1100
I'll try do make ppc catch up with some of that see how it goes.
FWIW I'm taking care of syncing up sparc in this
On Jan 15, 2010, at 10:41 AM, Sebastian Andrzej Siewior wrote:
From: Sebastian Andrzej Siewior bige...@linutronix.de
During boot we change the mapping a few times until we have a defined
mapping. During this procedure a small 4KiB mapping is created and after
that one a 64MiB. Currently
On Jan 15, 2010, at 10:41 AM, Sebastian Andrzej Siewior wrote:
From: Sebastian Andrzej Siewior bige...@linutronix.de
Right now the setup code takes ESEL of the current mapping and puts the
temporary into ESEL (old_ESEL 1 ) + 1 which is either one or two.
This is actually not required
On Jan 11, 2010, at 6:23 AM, Martyn Welch wrote:
The following series implements some minor fixes and updates to the GE
SBC310, SBC610 and PPC9A
--
Martyn Welch MEng MPhil MIET (Principal Software Engineer)
T:+44(0)1327322748
GE Fanuc Intelligent Platforms Ltd,|Registered in
On Jan 15, 2010, at 10:41 AM, Sebastian Andrzej Siewior wrote:
From: Sebastian Andrzej Siewior bige...@linutronix.de
24 is offset between the opcode past bl and past rfi. This makes it more
obvious.
Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
---
On Feb 5, 2010, at 3:06 PM, Anton Vorontsov wrote:
This patch adds NOR Flash, LEDs and PIB support for MPC8568E-MDS
boards. Plus, move bcsr node into localbus node, and add bcsr5
gpio-controller node.
Some platform code modifications were also needed.
Signed-off-by: Anton Vorontsov
On Feb 10, 2010, at 6:06 PM, Scott Wood wrote:
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -98,7 +98,10 @@ obj64-$(CONFIG_AUDIT)+= compat_audit.o
obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
On Wed, 2010-02-17 at 21:26 -0600, Kumar Gala wrote:
On Feb 17, 2010, at 9:24 PM, Benjamin Herrenschmidt wrote:
On Wed, 2010-02-17 at 21:21 -0600, Kumar Gala wrote:
Ben,
These are two minor fixes that should go into 2.6.33.
It's a bit late for such fixes, but it's your platforms
On Feb 11, 2010, at 10:56 AM, Scott Wood wrote:
Paul Mackerras wrote:
On Wed, Feb 10, 2010 at 06:06:10PM -0600, Scott Wood wrote:
Paul Mackerras wrote:
Some limitations:
- No threshold support -- need to figure out how to represent it in
the event struct from userspace.
What does
The following changes since commit efd0f0f385da6ee6d1a22cfe1ac94607ebe2a292:
Benjamin Herrenschmidt (1):
Merge commit 'jwb/next' into next
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next
Anton Vorontsov (1):
Hi,
We have a MPC7448 based board with 2.6.21 ported (ppc arch). We want
to apply the PREEPMT_RT patch to the existing kernel and drivers.
Well, it turns out to be a difficult task since the ppc arch doesn't
seem to support the RT patch very well. Has anyone had a working
2.6.21+ kernel with RT
Hi Ben,
Here's all the stuff I've got queued up for 2.6.34. Mostly mpc5121
support, but some 5200 stuff too. These commits have already had some
time in linux-next.
Cheers,
g.
The following changes since commit 724e6d3fe8003c3f60bf404bf22e4e331327c596:
Linus Torvalds (1):
Linux
46 matches
Mail list logo
