On Wed, Dec 12, 2012 at 04:37:50PM +, Andrew Murray wrote:
[...]
> diff --git a/drivers/of/address.c b/drivers/of/address.c
[...]
> + start = of_get_property(node, "ranges", &rlen);
> + if (start == NULL)
> + return NULL;
> +
> + end = start + rlen;
I'm currently rewrit
Hello,
We are working on one of the platform drivers for our board (based on
MPC8313ERDB). Previously, this driver was supporting platform bus but now we
want to change it to support 'of_platform' bus. While supporting platform bus,
the platform device structure is initialised in board setup fi
v1:
* Copy thread info only when we are from !user mode since we'll get kernel stack
coming from usr directly.
* remove save/restore EX_R14/EX_R15 since DBG_EXCEPTION_PROLOG already covered
this.
* use CURRENT_THREAD_INFO() conveniently to get thread.
* fix some typos
* add a patch to make sure
We always alloc critical/machine/debug check exceptions. This is
different from the normal exception. So we should load these exception
stack properly like we did for booke.
Signed-off-by: Tiejun Chen
---
arch/powerpc/kernel/exceptions-64e.S | 40 +++---
1 file chan
We need to store thread info to these exception thread info like something
we already did for PPC32.
Signed-off-by: Tiejun Chen
---
arch/powerpc/kernel/exceptions-64e.S | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/ker
gdb always need to generate a single step properly to invoke
a kgdb state. But with lazy interrupt, book3e can't always
trigger a debug exception with a single step since the current
is blocked for handling those pending exception, then we miss
that expected dbcr configuration at last to generate a
When we're in kgdb_singlestep(), we have to work around to get
thread_info by copying from the kernel stack before calling
kgdb_handle_exception(), then copying it back afterwards.
But for PPC64, we have a lazy interrupt implementation. So after
copying thread info frome kernle stack, if we need t
Currently we need to skip this for supporting KGDB.
Signed-off-by: Tiejun Chen
---
arch/powerpc/kernel/exceptions-64e.S |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index 9a99cba..a24baef 1
We can't look up the address of the entry point of the function simply
via that function symbol for all architectures.
For PPC64 ABI, actually there is a function descriptors structure.
A function descriptor is a three doubleword data structure that contains
the following values:
* The fi
On 12/19/2012 06:10 AM, Tabi Timur-B04825 wrote:
On Thu, Oct 25, 2012 at 1:43 AM, Tiejun Chen wrote:
We always alloc critical/machine/debug check exceptions. This is
different from the normal exception. So we should load these exception
stack properly like we did for booke.
Tiejun,
I'm a lit
On Thu, Dec 20, 2012 at 1:44 PM, Gabor Juhos wrote:
> The missing NULL terminator can cause a panic on
> PPC405 boards during boot:
>
> Linux/PowerPC load: console=ttyS0,115200 root=/dev/mtdblock1
> rootfstype=squashfs,jffs2 noinitrd init=/etc/preinit
> Finalizing device tree... flat tree at
On mfspr/mtspr emulation path Book3E's MMUCFG SPR with value 1015 clashes
with G4's MSSSR0 SPR. Move MSSSR0 emulation from generic part to Books3S.
MSSSR0 also clashes with Book3S's DABRX SPR. DABRX was not explicitly
handled so Book3S execution flow will behave as before.
Signed-off-by: Mihai Car
On 20.12.2012, at 15:52, Mihai Caraman wrote:
> On mfspr/mtspr emulation path Book3E's MMUCFG SPR with value 1015 clashes
> with G4's MSSSR0 SPR. Move MSSSR0 emulation from generic part to Books3S.
> MSSSR0 also clashes with Book3S's DABRX SPR. DABRX was not explicitly
> handled so Book3S executi
On 12/20/2012 02:23:55 AM, r.pa...@mei-india.com wrote:
Hello,
We are working on one of the platform drivers for our board (based on
MPC8313ERDB). Previously, this driver was supporting platform bus but
now we want to change it to support 'of_platform' bus. While
supporting platform bus, t
On Dec 20, 2012, at 3:08 AM, Tiejun Chen wrote:
> gdb always need to generate a single step properly to invoke
> a kgdb state. But with lazy interrupt, book3e can't always
> trigger a debug exception with a single step since the current
> is blocked for handling those pending exception, then we m
The missing NULL terminator can cause a panic on
PPC405 boards during boot:
Linux/PowerPC load: console=ttyS0,115200 root=/dev/mtdblock1
rootfstype=squashfs,jffs2 noinitrd init=/etc/preinit
Finalizing device tree... flat tree at 0x6a5160
bootconsole [udbg0] enabled
Page fault in user mode
Add support for the Data Address Watchpoint Register (DAWR) as found in POWER8.
This replaces the DABR found in POWER7 and earlier and allows for wider
watchpoint areas.
--
1.7.10.4
___
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Linuxppc-dev@lists.ozlabs.org
https://li
These are 32 bit, so no need to have a bunch of wasted 0s.
The 0s saved here can be put to better use elsewhere, like at the end of my pay
check.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/cputable.h | 62 +--
1 file changed, 31 insertions(+),
This frees up 7 bits for crazy new CPU features.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/cputable.h | 50 +--
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cput
From: Ian Munsie
These are just wrappers around the new set_mode HCALL.
Signed-off-by: Ian Munsie
Signed-off-by: Michael Neuling
---
arch/powerpc/platforms/pseries/plpar_wrappers.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.
.. and add it to POWER8 cpu features.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/cputable.h |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index d1f5911..2134e26 100644
--- a/arc
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/reg.h |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index ce7b50e..6cae32d 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@
This is a rewrite so that we don't assume we are using the DABR throughout the
code. We now use the arch_hw_breakpoint to store the breakpoint in a generic
manner in the thread_struct, rather than storing the raw DABR value.
The ptrace GET/SET_DEBUGREG interface currently passes the raw DABR in f
This adds DAWR supoprt to the set_break().
It does both bare metal and PAPR versions of setting the DAWR.
There is still some work we can do to make full use of the watchpoint but that
will come later.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/machdep.h |4
arch/
ping!!
> -Original Message-
> From: Sethi Varun-B16395
> Sent: Friday, December 14, 2012 7:22 PM
> To: joerg.roe...@amd.com; io...@lists.linux-foundation.org; linuxppc-
> d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Tabi Timur-B04825;
> Wood Scott-B07421
> Cc: Sethi Varun-B16395
>
On 12/21/2012 02:41 AM, Kumar Gala wrote:
On Dec 20, 2012, at 3:08 AM, Tiejun Chen wrote:
gdb always need to generate a single step properly to invoke
a kgdb state. But with lazy interrupt, book3e can't always
trigger a debug exception with a single step since the current
is blocked for handli
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