make the Freescale PCI driver get, prepare and enable the PCI clock
during probe(); the clock gets put upon device close by the devm approach
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree, but failure to enable specified clocks are fatal
the driver
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
the .get_clock() callback is run from probe() and might allocate
resources, introduce a .put_clock() callback that is run from remove()
to undo any allocation activities
prepare and enable the clocks in open(), disable and unprepare the
clocks in close() if clocks were acquired during probe(), to
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC controller
or CAN controller component number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
this addresses the clock driver aka provider's side of clocks
- prepare for future 'clks ID' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Reviewed-by: Mike Turquette mturque...@linaro.org # for v3: w/o bdlc, PSC
ipg
Signed-off-by: Gerhard Sittig g...@denx.de
---
this change implements a clock driver for the MPC512x PowerPC platform
which follows the COMMON_CLK approach and uses common clock drivers
shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic identifiers from the
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
after the device tree nodes provide clock specs for client side lookups,
peripheral drivers can attach to their clocks and the clock driver need
no longer pre-enable those clock items
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |2 --
1 file
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the 'ipg' clock for register access as well
Signed-off-by: Gerhard
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the 'ipg' clock for register access as well
Signed-off-by: Gerhard
after the UART and SPI peripheral drivers have switched to device tree
based clock lookup and no longer construct clock names from their PSC
component index, the psc%d_mclk alias names have become obsolete --
remove the corresponding clk_register_clkdev() calls
after the UART and SPI peripheral
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
devm_{get,put}_clk() doesn't
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the usb%d_clk template and unconditionally use per,
remove the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
after device tree based clock lookup became available, the NAND flash
driver need no longer use the previous nfc_clk name but can switch to
the fixed per clock name -- adjust the peripheral driver and remove
the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig g...@denx.de
---
after device tree based clock lookup became available, the VIU driver
need no longer use the previous viu_clk name but can switch to the
fixed per clock name -- adjust the peripheral driver and remove the
clock driver's clkdev registration
Signed-off-by: Gerhard Sittig g...@denx.de
---
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
keep the previous
adapt the DIU clock initialization to the COMMON_CLK approach:
device tree based clock lookup, prepare and unprepare for clocks,
work with frequencies not dividers, call the appropriate clk_*()
routines and don't access CCM registers, remove the pre-enable
workaround in the platform's clock driver
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control
module registers directly
Signed-off-by: Gerhard Sittig g...@denx.de
---
remove the last clkdev registration call (sys_clk and ref_clk
for CAN), as well as the clkdev header inclusion and the compat
registration comment
all client lookups for clock items are device tree based now, no
compatibility alias names need to get provided any longer
remove the now obsolete
[ this is an overview on how to split the series if necessary ]
On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote:
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks
On Wed, 2013-07-31 at 08:29 +0530, Deepthi Dharwar wrote:
/*
- * pseries_idle_probe()
+ * powerpc_idle_probe()
* Choose state table for shared versus dedicated partition
*/
-static int pseries_idle_probe(void)
+static int powerpc_idle_probe(void)
{
+#ifndef PPC_POWERNV
if
On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
The TBIPA register is part of gianfar's full register set. When starting
from the MII registers, the start address of struct gfar needs to
be determined via container_of().
Experienced with mpc8313 and fsl,gianfar-mdio device tree
Anton Blanchard an...@samba.org wrote:
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
endian issues in KVM).
The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
here.
I'm not that keen on
On Tue, 2013-08-06 at 18:08 -0500, Scott Wood wrote:
Here's another example. get_lppaca() will only build on book3s -- and
yet we get requests for e500 code to use this file.
Indeed, Besides there is already accessors afaik for lppaca that compile
to nothing on E (and if not they would be
On Mon, Aug 5, 2013 at 2:20 PM, Tony Luck tony.l...@gmail.com wrote:
Still have problems booting if there are any compressed images in ERST
to be inflated.
So I took another look at this part of the code ... and saw a couple of issues:
while ((size = psi-read(id, type, count, time,
On Wed, 2013-08-07 at 09:30 +1000, Benjamin Herrenschmidt wrote:
On Tue, 2013-08-06 at 18:08 -0500, Scott Wood wrote:
Here's another example. get_lppaca() will only build on book3s -- and
yet we get requests for e500 code to use this file.
Indeed, Besides there is already accessors afaik
On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote:
On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote:
The TBIPA register is part of gianfar's full register set. When starting
from the MII registers, the start address of struct gfar needs to
be determined via container_of().
On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
I am trying to me the Linux pte search and update generic so that this can be
used for powerpc as well.
I am not sure which of the below two should be ok, please help
Given that the BookE code uses gfn_to_pfn_memslot()
On Wed, 2013-08-07 at 10:24 +1000, Paul Mackerras wrote:
On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
I am trying to me the Linux pte search and update generic so that this can
be used for powerpc as well.
I am not sure which of the below two should be ok,
v3:
The main changes include:
* Drop the patch 5 in v2 (memblock: introduce the memblock_reinit function)
* Change to use the 64M boot init tlb.
Please refer to the comment section of each patch for more detail.
This patch series passed the kdump test with kernel option crashkernel=64M@32M
The e500v1 doesn't implement the MAS7, so we should avoid to access
this register on that implementations. In the current kernel, the
access to MAS7 are protected by either CONFIG_PHYS_64BIT or
MMU_FTR_BIG_PHYS. Since some code are executed before the code
patching, we have to use
Move the codes which translate a effective address to physical address
to a separate function. So it can be reused by other code.
Signed-off-by: Kevin Hao haoke...@gmail.com
---
v3: Use ifdef CONFIG_PHYS_64BIT to protect the access to MAS7
v2: A new patch in v2.
This is based on the codes in the head_44x.S. The difference is that
the init tlb size we used is 64M. With this patch we can only load the
kernel at address between memstart_addr ~ memstart_addr + 64M. We will
fix this restriction in the following patches.
Signed-off-by: Kevin Hao
We use the tlb1 entries to map low mem to the kernel space. In the
current code, it assumes that the first tlb entry would cover the
kernel image. But this is not true for some special cases, such as
when we run a relocatable kernel above the 64M or set
CONFIG_KERNEL_START above 64M. So we choose
For a relocatable kernel since it can be loaded at any place, there
is no any relation between the kernel start addr and the memstart_addr.
So we can't calculate the memstart_addr from kernel start addr. And
also we can't wait to do the relocation after we get the real
memstart_addr from device
This is always true for a non-relocatable kernel. Otherwise the kernel
would get stuck. But for a relocatable kernel, it seems a little
complicated. When booting a relocatable kernel, we just align the
kernel start addr to 64M and map the PAGE_OFFSET from there. The
relocation will base on this
The RELOCATABLE is more flexible and without any alignment restriction.
And it is a superset of DYNAMIC_MEMSTART. So use it by default for
a kdump kernel.
Signed-off-by: Kevin Hao haoke...@gmail.com
---
v3: no change.
v2: A new patch in v2.
arch/powerpc/Kconfig | 3 +--
1 file changed, 1
On 07/31/2013 02:25 PM, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
changes for v2:
On Tue, Aug 06, 2013 at 08:11:34PM -0500, Scott Wood wrote:
On Wed, 2013-08-07 at 10:24 +1000, Paul Mackerras wrote:
On Tue, Aug 06, 2013 at 07:02:48AM +, Bhushan Bharat-R65777 wrote:
I am trying to me the Linux pte search and update generic so that this
can be used for powerpc
On Wednesday 07 August 2013 05:06 AM, Tony Luck wrote:
On Mon, Aug 5, 2013 at 2:20 PM, Tony Luck tony.l...@gmail.com wrote:
Still have problems booting if there are any compressed images in ERST
to be inflated.
So I took another look at this part of the code ... and saw a couple of issues:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
Signed-off-by: Mike Qiu qiud...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/eeh-ioda.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
The procfs entry for global statistics has been missed on PowerNV
platform and the patch is going to add that.
Signed-off-by: Mike Qiu qiud...@linux.vnet.ibm.com
---
arch/powerpc/kernel/eeh.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/eeh.c
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
Signed-off-by: Mike Qiu qiud...@linux.vnet.ibm.com
Acked-by: Gavin Shan sha...@linux.vnet.ibm.com
On Tue, Aug 06, 2013 at 10:25:14PM -0400, Mike Qiu wrote:
The procfs entry for global statistics has been missed on PowerNV
platform and the patch is going to add that.
Signed-off-by: Mike Qiu qiud...@linux.vnet.ibm.com
Acked-by: Gavin Shan sha...@linux.vnet.ibm.com
---
On Tue, Aug 6, 2013 at 6:58 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
The patch looks right. I will clean it up. Does the issue still persist
after this?
Things seem to be working - but testing has hardly been extensive (just
a couple of forced panics).
I do have one other
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-bounces+tie-
fei.zang=freescale@lists.ozlabs.org] On Behalf Of Leon Ravich
Sent: Tuesday, August 06, 2013 3:26 PM
To: Johannes Thumshirn
Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linuxppc-dev
Subject: Re: PCIE
obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
memcpy_64.o usercopy_64.o mem_64.o string.o \
-checksum_wrappers_64.o hweight_64.o \
+checksum_wrappers_64.o \
copyuser_power7.o
On Wed, Aug 07, 2013 at 02:01:53AM +1000, Anton Blanchard wrote:
+#ifdef __BIG_ENDIAN__
#define HPTE_LOCK_BIT 3
+#else
+#define HPTE_LOCK_BIT (63-3)
+#endif
Are you deliberately using a different bit here? AFAICS you are using
0x20 in the 7th byte as the lock bit for LE, whereas we use
On Wed, Aug 07, 2013 at 02:02:05AM +1000, Anton Blanchard wrote:
Add support for the H_SET_MODE hcall so we can select the
endianness of our exceptions.
We create a guest MSR from scratch when delivering exceptions in
a few places and instead of extracting the LPCR[ILE] and inserting
it
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
Signed-off-by: Mike Qiu qiud...@linux.vnet.ibm.com
---
Hi Tony,
On Wednesday 07 August 2013 08:55 AM, Tony Luck wrote:
On Tue, Aug 6, 2013 at 6:58 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
The patch looks right. I will clean it up. Does the issue still persist
after this?
Things seem to be working - but testing has hardly been
On Wed, Aug 07, 2013 at 09:31:00AM +1000, Michael Neuling wrote:
Anton Blanchard an...@samba.org wrote:
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
endian issues in KVM).
The CONFIG_VIRTUALIZATION
On Wed, Aug 07, 2013 at 03:11:24PM +1000, Michael Ellerman wrote:
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
Signed-off-by: Mike Qiu
On Tue, Aug 6, 2013 at 10:13 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
How is it with erst and efivars?
ERST is at the whim of the BIOS writer (the ACPI standard doesn't provide any
suggestions on record sizes). My systems support ~6K record size.
efivars has, IIRC, a 1k limit
δΊ 2013/8/7 13:25, Gavin Shan ει:
On Wed, Aug 07, 2013 at 03:11:24PM +1000, Michael Ellerman wrote:
On Tue, Aug 06, 2013 at 10:24:46PM -0400, Mike Qiu wrote:
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' should be added to IODA_EEH_DBG(),
From comparison of pci printout from the two kernel ,
beside the EDAC errors I noticed other strange differences:
In 3.8.13 I got BAR 7 and BAR 8:
[ 39.017749] pci :00:00.0: BAR 8: assigned [mem 0xc000-0xdfff]
[ 39.024530] pci :00:00.0: BAR 7: can't assign io (size 0x1)
101 - 160 of 160 matches
Mail list logo
