[PATCH v2] powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s)

2015-03-24 Thread Emil Medve
From: Igal Liberman Describe the PHY topology for all configurations supported by each board Based on prior work by Andy Fleming Signed-off-by: Igal Liberman Signed-off-by: Shruti Kanetkar Signed-off-by: Emil Medve --- v2: Remove 'Change-Id' arch/powerpc/boot/dts/b4860qds.dts| 6

[PATCH V15 21/21] powerpc/pci: Add PCI resource alignment documentation

2015-03-24 Thread Wei Yang
In order to enable SRIOV on PowerNV platform, the PF's IOV BAR needs to be adjusted: 1. size expanded 2. aligned to M64BT size This patch documents this change on the reason and how. [bhelgaas: reformat, clarify, expand] Signed-off-by: Wei Yang --- .../powerpc/pci_iov_resource_on_power

[PATCH V15 20/21] powerpc/pci: Remove unused struct pci_dn.pcidev field

2015-03-24 Thread Wei Yang
In struct pci_dn, the pcidev field is assigned but not used, so remove it. Signed-off-by: Wei Yang Acked-by: Gavin Shan --- arch/powerpc/include/asm/pci-bridge.h |1 - arch/powerpc/platforms/powernv/pci-ioda.c |1 - 2 files changed, 2 deletions(-) diff --git a/arch/powerpc/include/

[PATCH V15 19/21] powerpc/powernv: Group VF PE when IOV BAR is big on PHB3

2015-03-24 Thread Wei Yang
When IOV BAR is big, each is covered by 4 M64 windows. This leads to several VF PE sits in one PE in terms of M64. Group VF PEs according to the M64 allocation. [bhelgaas: use dev_printk() when possible] Signed-off-by: Wei Yang --- arch/powerpc/include/asm/pci-bridge.h |2 +- arch/powe

[PATCH V15 18/21] powerpc/powernv: Reserve additional space for IOV BAR, with m64_per_iov supported

2015-03-24 Thread Wei Yang
M64 aperture size is limited on PHB3. When the IOV BAR is too big, this will exceed the limitation and failed to be assigned. Introduce a different mechanism based on the IOV BAR size: - if IOV BAR size is smaller than 64MB, expand to total_pe - if IOV BAR size is bigger than 64MB, roundup p

[PATCH V15 17/21] powerpc/powernv: Shift VF resource with an offset

2015-03-24 Thread Wei Yang
On PowerNV platform, resource position in M64 BAR implies the PE# the resource belongs to. In some cases, adjustment of a resource is necessary to locate it to a correct position in M64 BAR . This patch adds pnv_pci_vf_resource_shift() to shift the 'real' PF IOV BAR address according to an offset.

[PATCH V15 16/21] powerpc/powernv: Implement pcibios_iov_resource_alignment() on powernv

2015-03-24 Thread Wei Yang
Implement pcibios_iov_resource_alignment() on powernv platform. On PowerNV platform, there are 3 cases for the IOV BAR: 1. initial state, the IOV BAR size is multiple times of VF BAR size 2. after expanded, the IOV BAR size is expanded to meet the M64 segment size 3. sizing stage, the IOV BAR is t

[PATCH V15 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe

2015-03-24 Thread Wei Yang
On PHB3, PF IOV BAR will be covered by M64 BAR to have better PE isolation. M64 BAR is a type of hardware resource in PHB3, which could map a range of MMIO to PE numbers on powernv platform. And this range is divided equally by the number of total_pe with each divided range mapping to a PE number.

[PATCH V15 14/21] powerpc/powernv: Allocate struct pnv_ioda_pe iommu_table dynamically

2015-03-24 Thread Wei Yang
Previously the iommu_table had the same lifetime as a struct pnv_ioda_pe and was embedded in it. The pnv_ioda_pe was assigned to a PE on the bootup stage. Since PEs are based on the hardware layout which is static in the system, they will never get released. This means the iommu_table in the pnv_io

[PATCH V15 13/21] powerpc/pci: Don't unset PCI resources for VFs

2015-03-24 Thread Wei Yang
Flag PCI_REASSIGN_ALL_RSRC is used to ignore resources information setup by firmware, so that kernel would re-assign all resources of pci devices. On powerpc arch, this happens in a header fixup function pcibios_fixup_resources(), which will clean up the resources if this flag is set. This works f

[PATCH V15 12/21] PCI: Consider additional PF's IOV BAR alignment in sizing and assigning

2015-03-24 Thread Wei Yang
When sizing and assigning resources, we divide the resources into two lists: the requested list and the additional list. We don't consider the alignment of additional VF(n) BAR space. This is because the alignment required for the VF(n) BAR space is the size of an individual VF BAR, not the size

[PATCH V15 11/21] PCI: Add pcibios_iov_resource_alignment() interface

2015-03-24 Thread Wei Yang
Per the SR-IOV spec r1.1, sec 3.3.14, the required alignment of a PF's IOV BAR is the size of an individual VF BAR, and the size consumed is the individual VF BAR size times NumVFs. The PowerNV platform has additional alignment requirements to help support its Partitionable Endpoint device isolati

[PATCH V15 10/21] PCI: Add pcibios_sriov_enable() and pcibios_sriov_disable()

2015-03-24 Thread Wei Yang
VFs are dynamically created when a driver enables them. On some platforms, like PowerNV, special resources are necessary to enable VFs. Add platform hooks for enabling and disabling VFs. Signed-off-by: Wei Yang Acked-by: Bjorn Helgaas --- drivers/pci/iov.c | 19 +++ 1 file c

[PATCH V15 09/21] PCI: Export pci_iov_virtfn_bus() and pci_iov_virtfn_devfn()

2015-03-24 Thread Wei Yang
On PowerNV, some resource reservation is needed for SR-IOV VFs that don't exist at the bootup stage. To do the match between resources and VFs, the code need to get the VF's BDF in advance. Rename virtfn_bus() and virtfn_devfn() to pci_iov_virtfn_bus() and pci_iov_virtfn_devfn() and export them.

[PATCH V15 08/21] PCI: Calculate maximum number of buses required for VFs

2015-03-24 Thread Wei Yang
An SR-IOV device can change its First VF Offset and VF Stride based on the values of ARI Capable Hierarchy and NumVFs. The number of buses required for all VFs is determined by NumVFs, First VF Offset, and VF Stride (see SR-IOV spec r1.1, sec 2.1.2). Previously pci_iov_bus_range() computed how ma

[PATCH V15 07/21] PCI: Refresh First VF Offset and VF Stride when updating NumVFs

2015-03-24 Thread Wei Yang
The First VF Offset and VF Stride fields depend on the NumVFs setting, so refresh the cached fields in struct pci_sriov when updating NumVFs. See the SR-IOV spec r1.1, sec 3.3.9 and 3.3.10. [bhelgaas: changelog, remove kernel-doc comment marker] Signed-off-by: Wei Yang Acked-by: Bjorn Helgaas -

[PATCH V15 06/21] PCI: Index IOV resources in the conventional style

2015-03-24 Thread Wei Yang
From: Bjorn Helgaas Most of PCI uses "res = &dev->resource[i]", not "res = dev->resource + i". Use that style in iov.c also. No functional change. Signed-off-by: Bjorn Helgaas Acked-by: Wei Yang --- drivers/pci/iov.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --gi

[PATCH V15 05/21] PCI: Keep individual VF BAR size in struct pci_sriov

2015-03-24 Thread Wei Yang
Currently we don't store the individual VF BAR size. We calculate it when needed by dividing the PF's IOV resource size (which contains space for *all* the VFs) by total_VFs or by reading the BAR in the SR-IOV capability again. Keep the individual VF BAR size in struct pci_sriov.barsz[], add pci_

[PATCH V15 04/21] PCI: Print PF SR-IOV resource that contains all VF(n) BAR space

2015-03-24 Thread Wei Yang
When we size VF BAR0, VF BAR1, etc., from the SR-IOV Capability of a PF, we learn the alignment requirement and amount of space consumed by a single VF. But when VFs are enabled, *each* of the NumVFs consumes that amount of space, so the total size of the PF resource is "VF BAR size * NumVFs". Ad

[PATCH V15 03/21] PCI: Print more info in sriov_enable() error message

2015-03-24 Thread Wei Yang
From: Bjorn Helgaas If we don't have space for all the bus numbers required to enable VFs, print the largest bus number required and the range available. No functional change; improved error message only. Signed-off-by: Bjorn Helgaas Acked-by: Wei Yang --- drivers/pci/iov.c |7 +-- 1

Re: [PATCH] powerpc/powernv: Remove powernv RTAS support

2015-03-24 Thread Stewart Smith
Michael Ellerman writes: > The powernv code has some conditional support for running on bare metal > machines that have no OPAL firmware, but provide RTAS. > > No released machines ever supported that, and even in the lab it was > just a transitional hack in the days when OPAL was still being > d

[PATCH V15 02/21] powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor

2015-03-24 Thread Wei Yang
The PCI config accessors previously relied on device_node. Unfortunately, VFs don't have a corresponding device_node, so change the accessors to use pci_dn instead. [bhelgaas: changelog] Signed-off-by: Gavin Shan --- arch/powerpc/platforms/powernv/eeh-powernv.c | 14 +- arch/powerpc/platf

[PATCH V15 01/21] powerpc/pci: Refactor pci_dn

2015-03-24 Thread Wei Yang
From: Gavin Shan pci_dn is the extension of PCI device node and is created from device node. Unfortunately, VFs are enabled dynamically by PF's driver and they don't have corresponding device nodes, and pci_dn. Refactor pci_dn to support VFs: * pci_dn is organized as a hierarchy tree. VF's

[PATCH V15 00/21] Enable SRIOV on POWER8

2015-03-24 Thread Wei Yang
This patchset enables the SRIOV on POWER8. The general idea is put each VF into one individual PE and allocate required resources like MMIO/DMA/MSI. The major difficulty comes from the MMIO allocation and adjustment for PF's IOV BAR. On P8, we use M64BT to cover a PF's IOV BAR, which could make a

[PATCH 27/27] powerpc: dart_iommu: Remove check for controller_ops == NULL case

2015-03-24 Thread Daniel Axtens
Now that we have ported the calls to iommu_init_early_dart to always supply a pci_controller_ops struct, we can safely drop the check. Signed-off-by: Daniel Axtens --- arch/powerpc/sysdev/dart_iommu.c | 13 + 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/

[PATCH 26/27] powerpc: Remove shim for pci_controller_ops.dma_bus_setup

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 2 -- arch/powerpc/include/asm/pci-bridge.h | 14 -- arch/powerpc/kernel/pci-common.c | 5 - arch/powerpc/sysdev/dart_iommu.c | 3 --- 4 files changed, 4 insertions(+), 20 deletions(-) diff --gi

[PATCH 25/27] powerpc: Remove shim for pci_controller_ops.dma_dev_setup

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 1 - arch/powerpc/include/asm/pci-bridge.h | 9 - arch/powerpc/kernel/pci-common.c | 5 - arch/powerpc/sysdev/dart_iommu.c | 2 -- 4 files changed, 4 insertions(+), 13 deletions(-) diff --git a/arch/po

[PATCH 24/27] powerpc: Remove shim for pci_controller_ops.probe_mode

2015-03-24 Thread Daniel Axtens
This also moves back the defines, as explained in the commit that created the shim. Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 1 - arch/powerpc/include/asm/pci-bridge.h | 16 arch/powerpc/include/asm/pci.h| 5 + arch/powerpc/kernel/pc

[PATCH 23/27] powerpc: Remove shim for pci_controller_ops.enable_device_hook

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 4 arch/powerpc/include/asm/pci-bridge.h | 11 --- arch/powerpc/kernel/pci-common.c | 7 +-- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/arch/powerpc/include/asm/machdep.h b/arch/

[PATCH 22/27] powerpc: Remove shim for pci_controller_ops.reset_secondary_bus

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 3 --- arch/powerpc/include/asm/pci-bridge.h | 16 arch/powerpc/kernel/pci-common.c | 9 - 3 files changed, 8 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/include/asm/machdep.h b

[PATCH 21/27] powerpc: Remove shim for pci_controller_ops.window_alignment

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/machdep.h| 3 --- arch/powerpc/include/asm/pci-bridge.h | 18 -- arch/powerpc/kernel/pci-common.c | 12 +++- 3 files changed, 11 insertions(+), 22 deletions(-) diff --git a/arch/powerpc/include/asm/machde

[PATCH 20/27] powerpc/cell: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the Cell platform to use the pci_controller_ops structure rather than ppc_md for PCI controller operations. This depends on the patch to drop celleb support: http://patchwork.ozlabs.org/patch/451730/ Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/cell/cell.h | 24 ++

[PATCH 19/27] powerpc: fsl_pci, swiotlb: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the setup out of swiotlb's subsys init call, and into an fsl_pci.c is the only thing that checks the ppc_swiotlb_enable global, so we can be confident that patching it will cover all the PCI implementations affected by the changes to dma-swiotlb.c. Signed-off-by: Daniel Axtens --- ar

[PATCH 18/27] powerpc/maple: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the Maple platform to use the pci_controller_ops structure rather than ppc_md for PCI controller operations. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/maple/maple.h | 2 ++ arch/powerpc/platforms/maple/pci.c | 4 arch/powerpc/platforms/maple/setup.c | 2 +- 3 file

[PATCH 17/27] powerpc/pasemi: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the PaSemi platform to use the pci_controller_ops structure rather than ppc_md for PCI controller operations. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/pasemi/iommu.c | 6 -- arch/powerpc/platforms/pasemi/pasemi.h | 1 + arch/powerpc/platforms/pasemi/pci.c| 5 ++

[PATCH 16/27] powerpc/powernv: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the PowerNV platform to use the pci_controller_ops structure rather than ppc_md for PCI controller operations. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/powernv/pci-ioda.c | 7 --- arch/powerpc/platforms/powernv/pci-p5ioc2.c | 1 + arch/powerpc/platforms/powernv/pc

[PATCH 15/27] powerpc/pseries: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the pSeries platform to use the pci_controller_ops structure, rather than ppc_md for PCI controller operations. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/pseries/iommu.c | 9 + arch/powerpc/platforms/pseries/pseries.h | 2 ++ arch/powerpc/platforms/pseries/setu

[PATCH 14/27] powerpc/powermac: Move controller ops from ppc_md to controller_ops

2015-03-24 Thread Daniel Axtens
This moves the Power Mac platform to use the pci_controller_ops structure rather than ppc_md for PCI controller operations. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/powermac/pci.c | 17 +++-- arch/powerpc/platforms/powermac/pmac.h | 5 + arch/powerpc/platforms/

[PATCH 13/27] powerpc: dart_iommu: optionally populate controller_ops on init

2015-03-24 Thread Daniel Axtens
If a pci_controller_ops struct is provided to iommu_init_early_dart, populate that with the DMA setup ops, rather than ppc_md. If NULL is provided, populate ppc_md as before. This also patches the call sites for Maple and Power Mac to pass NULL, so existing behaviour is preserved. The benefit of

Re: [PATCH 1/1]: thermal driver therm_adt746.c

2015-03-24 Thread Benjamin Herrenschmidt
On Thu, 2015-02-26 at 10:48 +0100, Thomas Haschka wrote: > Hello, > > I hope I get it correct this time, thanks again. Thanks. Sorry for the delay, I've been a bit swamped. I looked at your code a bit more in depth and I would appreciate a couple more changes if you don't mind: .../... > +st

[PATCH 12/27] powerpc: ppc_md.pcibios_reset_secondary_bus -> pci_controller_ops.reset_secondary_bus

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 17 + arch/powerpc/kernel/pci-common.c | 7 +-- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index d

[PATCH 11/27] powerpc: ppc_md.pcibios_window_alignment -> pci_controller_ops.window_alignment

2015-03-24 Thread Daniel Axtens
Name the shim pci_window_alignment (rather than window_alignment) to avoid clashing with window_alignment in drivers/pci/setup-bus.c Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 21 + arch/powerpc/kernel/pci-common.c | 10 +- 2 files c

[PATCH 10/27] powerpc: ppc_md.pcibios_enable_device_hook -> pci_controller_ops.enable_device_hook

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 15 +++ arch/powerpc/kernel/pci-common.c | 5 ++--- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 5d699

[PATCH 09/27] powerpc: ppc_md.pci_probe_mode -> pci_controller_ops.probe_mode

2015-03-24 Thread Daniel Axtens
We need to move the probe mode defines to pci-bridge.h from pci.h. They are required by the shim in order to return a sensible default. Previously, the were defined in pci.h, but pci.h includes pci-bridge.h before the relevant #defines. This means the definitions are absent if pci.h is included bef

[PATCH 08/27] powerpc: ppc_md.pci_dma_bus_setup -> pci_controller_ops.dma_bus_setup

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 11 +++ arch/powerpc/kernel/pci-common.c | 3 +-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 2474f29..68

[PATCH 07/27] powerpc: ppc_md.pci_dma_dev_setup -> pci_controller_ops.dma_dev_setup

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 14 ++ arch/powerpc/kernel/pci-common.c | 3 +-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 3ab8a2d.

[PATCH 06/27] powerpc: Create the pci_controller_ops struct.

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/include/asm/pci-bridge.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 546d036..3ab8a2d 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/pow

[PATCH 05/27] powerpc: pcibios_enable_device_hook: return bool rather than int

2015-03-24 Thread Daniel Axtens
pcibios_enable_device_hook returned an int. Every implementation returned either -EINVAL or 0. The return value wasn't propagated by the caller: any non-zero return value caused pcibios_enable_device to return -EINVAL itself. Therefore, make the hook return a bool. Signed-off-by: Daniel Axtens --

[PATCH 04/27] powerpc/fsl_pci: Don't change ppc_swiotlb_enable after swiotlb_subsys_init

2015-03-24 Thread Daniel Axtens
The only function that checks ppc_swiotlb_enable is swiotlb_subsys_init. The code in fsl_pci.c is called well after that, so don't bother changing it. (ppc_swiotlb is usually set in swiotlb_detect_4g, which is called by a number of arch initcalls.) Signed-off-by: Daniel Axtens --- arch/powerpc/

[PATCH 03/27] powerpc/swiotlb: give init call a less misleading name

2015-03-24 Thread Daniel Axtens
swiotlb_late_init sets up platform specific hooks. It's not actually a late initcall, but a subsys initcall, called much earlier. Ideally we'd call it swiotlb_init, but that's taken. Call it swiotlb_subsys_init for now. (It will be refactored and renamed later.) Signed-off-by: Daniel Axtens ---

[PATCH 02/27] powerpc/powermac: move pmac_pci_probe_mode from setup.c to pci.c

2015-03-24 Thread Daniel Axtens
Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/powermac/pci.c | 17 + arch/powerpc/platforms/powermac/pmac.h | 4 arch/powerpc/platforms/powermac/setup.c | 18 -- 3 files changed, 21 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/platfo

[PATCH 01/27] powerpc: move find_and_init_phbs() to pSeries specific code

2015-03-24 Thread Daniel Axtens
Previously, find_and_init_phbs() was used in both PowerNV and pSeries setup. However, since RTAS support has been dropped from PowerNV, we can move it into a platform-specific file. This patch depends on the patch to drop RTAS support from PowerNV: http://patchwork.ozlabs.org/patch/449316/ Signed

[PATCH 00/27] Refactor PCI controller operations

2015-03-24 Thread Daniel Axtens
This patch set moves some PCI controller operations out of ppc_md and into a new pci_controller_ops struct. This is desirable for systems with more than one type of PCI controller. In particular, it's intended that this new interface will be used by the CXL (aka CAPI) driver. The design tries to

Re: [PATCH v3 2/2] selftests/powerpc: Add a test of the switch_endian() syscall

2015-03-24 Thread Michael Ellerman
On Wed, 2015-03-18 at 16:04 +1100, Michael Ellerman wrote: > On Tue, 2015-03-17 at 11:35 +0530, Anshuman Khandual wrote: > > On 03/17/2015 04:34 AM, Michael Ellerman wrote: > > > What are you seeing exactly? > > > > I am running on a BE PKVM guest but compiling the test case on > > a different BE

Re: [PATCH] powerpc: Remove the celleb support

2015-03-24 Thread Benjamin Herrenschmidt
On Thu, 2015-03-19 at 15:15 +1100, Michael Ellerman wrote: > The celleb code has seen no actual development for ~7 years. > > We (maintainers) have no access to test hardware, and it is highly > likely the code has bit-rotted. > > As far as we're aware the hardware was never widely available, and

Re: [PATCH] powerpc/powernv: Remove powernv RTAS support

2015-03-24 Thread Benjamin Herrenschmidt
On Thu, 2015-03-12 at 17:27 +1100, Michael Ellerman wrote: > The powernv code has some conditional support for running on bare metal > machines that have no OPAL firmware, but provide RTAS. > > No released machines ever supported that, and even in the lab it was > just a transitional hack in the d

Re: powerpc/perf: add missing put_cpu_var in power_pmu_event_init

2015-03-24 Thread Michael Ellerman
On Tue, 2015-24-03 at 12:33:22 UTC, Jan Stancek wrote: > One path in power_pmu_event_init() calls get_cpu_var(), but is > missing matching call to put_cpu_var(), which causes preemption > imbalance and crash in user-space: > > Page fault in user mode with in_atomic() = 1 mm = c01fefa5a280 >

Re: [PATCH v2 2/2] leds/powernv: Add driver for PowerNV platform

2015-03-24 Thread Benjamin Herrenschmidt
On Fri, 2015-03-20 at 16:34 +0530, Vasant Hegde wrote: > From: Anshuman Khandual > > This patch implements LED driver for PowerNV platform using the existing > generic LED class framework. It registers classdev structures for all > individual LEDs detected on the system through LED specific devic

Re: [PATCH v2 1/2] powerpc32: put csum_tcpudp_magic inline

2015-03-24 Thread Scott Wood
On Tue, 2015-02-03 at 12:39 +0100, Christophe Leroy wrote: > csum_tcpudp_magic() is only a few instructions, and does not modifies any > other > register than the returned result. So it is not worth having it as a separate > function and suffer function branching and saving of volatile registers.

Re: powerpc: Fix trivial typo in comment

2015-03-24 Thread Michael Ellerman
On Fri, 2015-27-02 at 22:22:54 UTC, Yannick Guerrini wrote: > Change 'Kenrel' to 'Kernel' > > Signed-off-by: Yannick Guerrini > --- > arch/powerpc/include/asm/smu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) If you're going to send spelling fix patches, please at least fix all the

Re: [PATCH v2] powerpc/pseries: Simplify check for suspendability during suspend/migration

2015-03-24 Thread Michael Ellerman
On Tue, 2015-03-24 at 11:52 +1100, Cyril Bur wrote: > On Wed, 2015-03-04 at 12:22 -0800, Tyrel Datwyler wrote: > > During suspend/migration operation we must wait for the VASI state reported > > by the hypervisor to become Suspending prior to making the ibm,suspend-me > > RTAS call. Calling routine

Re: [23/32] powerpc: copy_thread(): rename 'arg' argument to 'kthread_arg'

2015-03-24 Thread Michael Ellerman
On Tue, 2015-03-24 at 21:49 +0200, Alex Dowad wrote: > On 20/03/15 01:54, Michael Ellerman wrote: > > On Thu, 2015-03-19 at 09:22 +0200, Alex Dowad wrote: > >> On 19/03/15 08:45, Michael Ellerman wrote: > >>> On Fri, 2015-13-03 at 18:14:46 UTC, Alex Dowad wrote: > The 'arg' argument to copy_th

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

2015-03-24 Thread Michael Ellerman
On Tue, 2015-03-24 at 19:45 -0500, Scott Wood wrote: > On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: > > On Thu, 2015-03-12 at 16:24 +0100, Christophe Leroy wrote: > > > Two config options exist to define powerpc MPC8xx: > > > * CONFIG_PPC_8xx > > > * CONFIG_8xx > > > In addition, CONF

Re: [v2,2/2] powerpc32: add support for csum_add()

2015-03-24 Thread Scott Wood
On Tue, Feb 03, 2015 at 12:39:27PM +0100, LEROY Christophe wrote: > The C version of csum_add() as defined in include/net/checksum.h gives the > following assembly: >0: 7c 04 1a 14 add r0,r4,r3 >4: 7c 64 00 10 subfc r3,r4,r0 >8: 7c 63 19 10

Re: powerpc32: rearrange instructions order in ip_fast_csum()

2015-03-24 Thread Scott Wood
On Tue, Feb 03, 2015 at 12:39:27PM +0100, LEROY Christophe wrote: > On PPC_8xx, lwz has a 2 cycles latency, and branching also takes 2 cycles. > As the size of the header is minimum 5 words, we can unroll the loop for the > first words to reduce number of branching, and we can re-order the > instr

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

2015-03-24 Thread Scott Wood
On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: > On Thu, 2015-03-12 at 16:24 +0100, Christophe Leroy wrote: > > Two config options exist to define powerpc MPC8xx: > > * CONFIG_PPC_8xx > > * CONFIG_8xx > > In addition, CONFIG_PPC_8xx also defines CONFIG_CPM1 as > > communication co-proce

Re: [PATCH v8 19/30] powerpc/pci: Use pci_scan_host_bridge() for simplicity

2015-03-24 Thread Daniel Axtens
On Tue, 2015-03-24 at 11:34 +0800, Yijing Wang wrote: > Now we could use pci_scan_host_bridge() to scan > pci buses, provide powerpc specific pci_host_bridge_ops. > > Signed-off-by: Yijing Wang > CC: Benjamin Herrenschmidt > CC: linuxppc-dev@lists.ozlabs.org > --- > arch/powerpc/kernel/pci-comm

[PATCH 3/3] powerpc/e6500: disable POWER7 data cache prefetch and implement our own

2015-03-24 Thread Kim Phillips
POWER7 has a dedicated stream prefetcher that is pre-programmed via dcbt rX,rY,0b010?0 instructions in the beginning of vmx_copy. e6500 has no such prefetcher, so we revert to using regular dcbt instructions in-loop: 1. at __copy_tofrom_user_power7 entry, we prefetch the first src and dest lines

[PATCH 2/3] powerpc: make copyuser_power7.S 64-byte cacheline friendly

2015-03-24 Thread Kim Phillips
The innermost copyloops were optimized for POWER7's 128-byte cacheline. This patch adds optimization for the e6500, which has a 64-byte cacheline. We basically do this by stripping loop bodies using L1_CACHE_BYTES ifdeferry, replace 128 with L1_CACHE_BYTES, and 7's with L1_CACHE_SHIFTs. We also a

[PATCH 1/3] powerpc/e6500: set FTR_VMX_COPY

2015-03-24 Thread Kim Phillips
This enables the VMX/ALTIVEC optimised copy-to/from-user code in arch/powerpc/lib/copyuser_power7.S. The e6500 does, and the e5500 does not, have ALTIVEC. Signed-off-by: Kim Phillips --- arch/powerpc/include/asm/cputable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch

Re: [PATCH v6 0/3] Generic IOMMU pooled allocator

2015-03-24 Thread David Miller
From: Sowmini Varadhan Date: Tue, 24 Mar 2015 13:10:27 -0400 > Deltas from patchv5: > - removed iommu_tbl_ops, and instead pass the ->flush_all as > an indirection to iommu_tbl_pool_init() > - only invoke ->flush_all when there is no large_pool, based on > the assumption that large-pool usage

[PATCH] powerpc/perf: add missing put_cpu_var in power_pmu_event_init

2015-03-24 Thread Jan Stancek
One path in power_pmu_event_init() calls get_cpu_var(), but is missing matching call to put_cpu_var(), which causes preemption imbalance and crash in user-space: Page fault in user mode with in_atomic() = 1 mm = c01fefa5a280 NIP = 3fff9bf2cae0 MSR = 90014280f032 Oops: Weird page fau

Re: [PATCH 0/3] Reduce system overhead of automatic NUMA balancing

2015-03-24 Thread Linus Torvalds
On Tue, Mar 24, 2015 at 8:33 AM, Mel Gorman wrote: > On Tue, Mar 24, 2015 at 10:51:41PM +1100, Dave Chinner wrote: >> >> So it looks like the patch set fixes the remaining regression and in >> 2 of the four cases actually improves performance > > \o/ W00t. > Linus, these three patches plus t

Re: [23/32] powerpc: copy_thread(): rename 'arg' argument to 'kthread_arg'

2015-03-24 Thread Alex Dowad
On 20/03/15 01:54, Michael Ellerman wrote: On Thu, 2015-03-19 at 09:22 +0200, Alex Dowad wrote: On 19/03/15 08:45, Michael Ellerman wrote: On Fri, 2015-13-03 at 18:14:46 UTC, Alex Dowad wrote: The 'arg' argument to copy_thread() is only ever used when forking a new kernel thread. Hence, rename

[PATCH v6 0/3] Generic IOMMU pooled allocator

2015-03-24 Thread Sowmini Varadhan
Deltas from patchv5: - removed iommu_tbl_ops, and instead pass the ->flush_all as an indirection to iommu_tbl_pool_init() - only invoke ->flush_all when there is no large_pool, based on the assumption that large-pool usage is infrequently encountered. Sowmini (2): Break up monolithic iommu t

Re: [PATCH v1 2/2] sata_dwc_460ex: re-use hsdev->dev instead of dwc_dev

2015-03-24 Thread Tejun Heo
On Tue, Mar 03, 2015 at 10:41:22PM +0200, Andy Shevchenko wrote: > This patch re-uses hsdev->dev which is allocated on heap. Therefore, the > private structure, which is global variable, is reduced by one field. > > In one case ap->dev is used and there it seems to be right decision. > > Signed-o

[PATCH v6 RFC 1/3] sparc: Break up monolithic iommu table/lock into finer graularity pools and lock

2015-03-24 Thread Sowmini Varadhan
Investigation of multithreaded iperf experiments on an ethernet interface show the iommu->lock as the hottest lock identified by lockstat, with something of the order of 21M contentions out of 27M acquisitions, and an average wait time of 26 us for the lock. This is not efficient. A more scalable

[PATCH v6 RFC 3/3] sparc: Make LDC use common iommu poll management functions

2015-03-24 Thread Sowmini Varadhan
Note that this conversion is only being done to consolidate the code and ensure that the common code provides the sufficient abstraction. It is not expected to result in any noticeable performance improvement, as there is typically one ldc_iommu per vnet_port, and each one has 8k entries, with a ty

[PATCH v6 RFC 2/3] sparc: Make sparc64 use scalable lib/iommu-common.c functions

2015-03-24 Thread Sowmini Varadhan
In iperf experiments running linux as the Tx side (TCP client) with 10 threads results in a severe performance drop when TSO is disabled, indicating a weakness in the software that can be avoided by using the scalable IOMMU arena DMA allocation. Baseline numbers before this patch: with default

[PATCH v8 2/2] powerpc/mpc85xx: Add FSL QorIQ DPAA QMan support to device tree(s)

2015-03-24 Thread Emil Medve
From: Kumar Gala Signed-off-by: Kumar Gala Signed-off-by: Geoff Thorpe Signed-off-by: Hai-Ying Wang Signed-off-by: Chunhe Lan Signed-off-by: Poonam Aggrwal [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve --- v8: Fix indentation/whitespaces v7: Remove 'Change

Re: [PATCH 0/3] Reduce system overhead of automatic NUMA balancing

2015-03-24 Thread Mel Gorman
On Tue, Mar 24, 2015 at 10:51:41PM +1100, Dave Chinner wrote: > On Mon, Mar 23, 2015 at 12:24:00PM +, Mel Gorman wrote: > > These are three follow-on patches based on the xfsrepair workload Dave > > Chinner reported was problematic in 4.0-rc1 due to changes in page table > > management -- https

Re: [PATCH v1 0/2] perf/kvm: perf-kvm-stat on powerpc

2015-03-24 Thread Michael Ellerman
On Tue, 2015-03-24 at 12:18 +0530, Hemant Kumar wrote: > Hi Michael, > > These patches were posted a month back. We don't have any review > comments to handle at this time. Can you pull these patches to your tree? > Please, do let me know if you want me to rebase these patches to a > different t

Re: [PATCH 1/3] powerpc/tm: Abort syscalls in active transactions

2015-03-24 Thread Michael Ellerman
On Tue, 2015-03-24 at 09:56 +0530, Anshuman Khandual wrote: > On 03/24/2015 07:34 AM, Michael Ellerman wrote: > > On Fri, 2015-03-20 at 14:34 +0530, Anshuman Khandual wrote: > >> On 03/19/2015 10:13 AM, Sam Bobroff wrote: > >>> This patch changes the syscall handler to doom (tabort) active > >>> tr

Re: [PATCH 0/3] Reduce system overhead of automatic NUMA balancing

2015-03-24 Thread Dave Chinner
On Mon, Mar 23, 2015 at 12:24:00PM +, Mel Gorman wrote: > These are three follow-on patches based on the xfsrepair workload Dave > Chinner reported was problematic in 4.0-rc1 due to changes in page table > management -- https://lkml.org/lkml/2015/3/1/226. > > Much of the problem was reduced by

[PATCH] powerpc/mpic: Remove WHOAMI readback after EOI

2015-03-24 Thread Bogdan Purcareata
After previous discussions regarding the subject [1][2], there's no clear explanation or reason why the call was needed in the first place. The sensible argument is some sort of synchronization between the CPU and the MPIC, which hasn't been pointed out precisely and is no longer required (at least

Re: [RFC PATCH] powerpc/mm/thp: Make page table walk safe against thp split/collapse

2015-03-24 Thread Benjamin Herrenschmidt
On Tue, 2015-03-24 at 11:23 +0530, Aneesh Kumar K.V wrote: > >>/* assume we don't have huge pages in vmalloc space... */ > >>addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK); > >> + local_irq_restore(flags); > >>return __va(addr); > >> } > > > > This is called in real mode, I

Re: [PATCH 1/3] powerpc/mpc85xx: Add FMan clock nodes

2015-03-24 Thread Emil Medve
Hello Scott, On 03/23/2015 06:30 PM, Scott Wood wrote: > On Thu, 2015-02-26 at 09:26 -0600, Emil Medve wrote: >> From: Igal Liberman >> >> Signed-off-by: Igal Liberman >> --- >> arch/powerpc/boot/dts/fsl/b4si-post.dtsi| 11 +++ >> arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 8 ++