On 04/29/2015 02:45 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:45PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving DMA window programming to an iommu_ops
callback. pnv_pci_ioda2_set_window() takes an iommu_table_group as
a first parameter (not pnv_ioda_pe) as it is going
On 04/29/2015 02:18 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:42PM +1000, Alexey Kardashevskiy wrote:
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already. However PAPR specification allows
the guest to write new TCE value without
On 04/29/2015 01:25 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:40PM +1000, Alexey Kardashevskiy wrote:
At the moment the DMA setup code looks for the ibm,opal-tce-kill property
which contains the TCE kill register address. Writes to this register
invalidates TCE cache on IODA/IODA2
Thanks a lot.We have added the patch into the kernel4.0-rc4 and it works.
From: Konstantin Khlebnikov
Date: 2015-04-29 16:30
To: songxium...@inspur.com; Rob Herring
CC: Grant Likely; devicet...@vger.kernel.org; Rob Herring;
linux-ker...@vger.kernel.org; sparcli...@vger.kernel.org;
On 04/29/2015 01:02 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:37PM +1000, Alexey Kardashevskiy wrote:
This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
which call in a loop iommu_take_ownership()/iommu_release_ownership()
for every table on the group. As there is
On 04/29/2015 02:39 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:44PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving TCE table allocation into an iommu_ops
callback to support multiple IOMMU groups per one VFIO container.
This moves a table creation window to the file
On 04/29/2015 03:30 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:47PM +1000, Alexey Kardashevskiy wrote:
This extends iommu_table_group_ops by a set of callbacks to support
dynamic DMA windows management.
create_table() creates a TCE table with specific parameters.
it receives
+x...@kernel.org
+linux-me...@vger.kernel.org
here is proposed fix:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg864009.html
It returns NUMA_NO_NODE from both static-inline (CONFIG_OF=n) and weak
version of of_node_to_nid(). This change might affect few arches which
whave
Hi Arnd,
Please ignore the previous reply.
On Tue, Apr 28, 2015 at 1:19 AM, Arnd Bergmann a...@arndb.de wrote:
On Monday 27 April 2015 21:25:20 Suman Tripathi wrote:
On Monday 27 April 2015 20:33:25 Suman Tripathi wrote:
On Tuesday 21 April 2015 21:12:39 Suman Tripathi wrote:
+
On 04/29/2015 02:04 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:41PM +1000, Alexey Kardashevskiy wrote:
This replaces direct accesses to TCE table with a helper which
returns an TCE entry address. This does not make difference now but will
when multi-level TCE tables get introduces.
On Wednesday 29 April 2015 12:34:41 Suman Tripathi wrote:
On Tue, Apr 28, 2015 at 1:19 AM, Arnd Bergmann a...@arndb.de wrote:
On Monday 27 April 2015 21:25:20 Suman Tripathi wrote:
On Monday 27 April 2015 20:33:25 Suman Tripathi wrote:
On Tuesday 21 April 2015 21:12:39 Suman Tripathi
Given a file descriptor on an afu device, libcxl currently uses the
major/minor number obtained from fstat on the fd to construct path to
the afu's sysfs directory. However it is possible that rather than using
one of the device in /dev/cxl, a kernel driver creates its own device
which export
On 04/28/2015 11:53 PM, Michael Ellerman wrote:
Subject should be powerpc/pseries: ... please.
ok
On Tue, 2015-04-28 at 10:37 -0500, Nathan Fontenot wrote:
The incorrect ordering of operations during cpu dlpar causes the affinity
of cpus being added to be invalid. Phyp does not assign
Enables receiving large packets from other LPARs. These packets
have a -1 IP header checksum, so we must recalculate to have
a valid checksum.
Signed-off-by: Brian King brk...@linux.vnet.ibm.com
Signed-off-by: Thomas Falcon tlfal...@linux.vnet.ibm.com
---
v3:
-Removed code setting network and
This patch enables 64k rx buffer pools by default. If Cooperative
Memory Overcommitment (CMO) is enabled, the number of 64k buffers
is reduced to save memory.
Cc: Brian King brk...@linux.vnet.ibm.com
Signed-off-by: Thomas Falcon tlfal...@linux.vnet.ibm.com
---
drivers/net/ethernet/ibm/ibmveth.c
Cc: Brian King brk...@linux.vnet.ibm.com
Signed-off-by: Thomas Falcon tlfal...@linux.vnet.ibm.com
---
drivers/net/ethernet/ibm/ibmveth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/ibm/ibmveth.c
b/drivers/net/ethernet/ibm/ibmveth.c
index
On Sat, Apr 25, 2015 at 10:14:51PM +1000, Alexey Kardashevskiy wrote:
This adds a way for the IOMMU user to know how much a new table will
use so it can be accounted in the locked_vm limit before allocation
happens.
This stores the allocated table size in pnv_pci_create_table()
so the
On Sat, Apr 25, 2015 at 10:14:50PM +1000, Alexey Kardashevskiy wrote:
In order to support memory pre-registration, we need a way to track
the use of every registered memory region and only allow unregistration
if a region is not in use anymore. So we need a way to tell from what
region the
On Wed, 2015-04-29 at 12:26 +0300, Igal.Liberman wrote:
From: Igal Liberman igal.liber...@freescale.com
The Freescale Data Path Acceleration Architecture (DPAA)
is a set of hardware components on specific QorIQ multicore
processors. This architecture provides the infrastructure to
support
On Wed, 2015-04-22 at 05:47 -0500, Liberman Igal-B31950 wrote:
Regards,
Igal Liberman.
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, April 21, 2015 3:52 AM
To: Liberman Igal-B31950
Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Tang
On Sat, Apr 25, 2015 at 10:14:52PM +1000, Alexey Kardashevskiy wrote:
We are adding support for DMA memory pre-registration to be used in
conjunction with VFIO. The idea is that the userspace which is going to
run a guest may want to pre-register a user space memory region so
it all gets
From: Igal Liberman igal.liber...@freescale.com
The FMan MAC FLib provides basic API used by the drivers to
configure and control the FMan MAC hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
drivers/net/ethernet/freescale/fman/Makefile |1 +
From: Igal Liberman igal.liber...@freescale.com
The Freescale Data Path Acceleration Architecture (DPAA)
is a set of hardware components on specific QorIQ multicore
processors. This architecture provides the infrastructure to
support simplified sharing of networking interfaces and
accelerators by
From: Igal Liberman igal.liber...@freescale.com
The FMan FLib provides the basic API used by the FMan drivers to
configure and control the FMan hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
drivers/net/ethernet/freescale/Kconfig |1 +
From: Igal Liberman igal.liber...@freescale.com
The FMan MAC FLib provides basic API used by the drivers to
configure and control the FMan MAC hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
.../net/ethernet/freescale/fman/flib/fsl_enet.h| 275 +++
From: Igal Liberman igal.liber...@freescale.com
Add Storage Profiles support.
The Storage Profiles contain parameters that are used by the FMan in
order to store frames being received on the Rx ports, or to
determine the parameters that affect writing the Internal Context
in the frame margin on
From: Igal Liberman igal.liber...@freescale.com
This patch presents the FMan Foundation Libraries (FLIB) headers.
The FMan FLib provides the basic API used by the FMan drivers to
configure and control the FMan hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
From: Igal Liberman igal.liber...@freescale.com
The FMan Port Flib provides basic API used by the drivers to
configure and control the FMan Port hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
.../net/ethernet/freescale/fman/flib/fman_common.h | 73
From: Igal Liberman igal.liber...@freescale.com
The FMan Port FLib provides basic API used by the drivers to
configure and control the FMan Port hardware.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
drivers/net/ethernet/freescale/fman/Kconfig|1 +
From: Igal Liberman igal.liber...@freescale.com
Add Frame Manager Multi-User RAM support.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
drivers/net/ethernet/freescale/fman/Kconfig|1 +
drivers/net/ethernet/freescale/fman/Makefile |6 +-
From: Igal Liberman igal.liber...@freescale.com
This patch adds the Ethernet MAC driver support.
Signed-off-by: Igal Liberman igal.liber...@freescale.com
---
drivers/net/ethernet/freescale/fman/inc/mac.h | 125 +
drivers/net/ethernet/freescale/fman/mac/Makefile |3 +-
On Wednesday 29 April 2015 19:55:53 Suman Tripathi wrote:
The above assumes that the limitation is enforced by the bus (e.g. an
AHB bus can only do 32-bit DMA). It would be a little different if you
have a 64-bit AXI bus and the Arasan device itself is limited to 32-bit
independent of
On Wed, Apr 29, 2015 at 2:45 PM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 29 April 2015 12:34:41 Suman Tripathi wrote:
On Tue, Apr 28, 2015 at 1:19 AM, Arnd Bergmann a...@arndb.de wrote:
On Monday 27 April 2015 21:25:20 Suman Tripathi wrote:
On Monday 27 April 2015 20:33:25 Suman
On Wed, Apr 29, 2015 at 07:02:17PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 02:04 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:41PM +1000, Alexey Kardashevskiy wrote:
This replaces direct accesses to TCE table with a helper which
returns an TCE entry address. This does not
Failure return from dlpar_configure_connector when dlpar adding cpus
results in leaking references to the cpus parent device node. Move the
call to of_node_put() prior to checking the result of
dlpar_configure_connector.
Fixes: 8d5ff320766f (powerpc/pseries: Make dlpar_configure_connector parent
On Wed, 2015-04-01 at 14:07 +0800, Jeremy Kerr wrote:
This change adds a char device to access the PRD (processor runtime
diagnostics) channel to OPAL firmware.
Includes contributions from Vaidyanathan Srinivasan, Neelesh Gupta
Vishal Kulkarni.
Signed-off-by: Neelesh Gupta
On 04/29/2015 12:16 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:33PM +1000, Alexey Kardashevskiy wrote:
This is to make extended ownership and multiple groups support patches
simpler for review.
This should cause no behavioural change.
Um.. this doesn't appear to be true.
The incorrect ordering of operations during cpu dlpar add results in invalid
affinity for the cpu being added. The ibm,associativity property in the
device tree is populated with all zeroes for the added cpu which results in
invalid affinity mappings and all cpus appear to belong to node 0.
This
On 04/29/2015 12:49 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:36PM +1000, Alexey Kardashevskiy wrote:
Modern IBM POWERPC systems support multiple (currently two) TCE tables
per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
for TCE tables. Right now just one table
On 04/29/2015 01:18 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:39PM +1000, Alexey Kardashevskiy wrote:
The pnv_pci_ioda_tce_invalidate() helper invalidates TCE cache. It is
supposed to be called on IODA1/2 and not called on p5ioc2. It receives
start and end host addresses of TCE
We currently try to register the 24x7 PMU unconditionally. Not all
Power systems support 24x7 counters (eg: Power7). On these systems
we get a backtrace during boot when trying to register the 24x7 PMU.
Check if the hypervisor supports 24x7 counters before attempting to
register the 24x7 PMU.
Acked-by: Ian Munsie imun...@au1.ibm.com
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
It is always a headache dealing with different defconfigs
though they only differ in a few places. Hence we are proposing a new
way of writing the defconfig:
1. Define a basic defconfig say mpc85xx_basic_defconfig
2. Spin off as much features as possible from the current mpc85xx_defconfig
Hello,
I just booted 3d99e3fe13d473ac4578c37f477a59b829530764 (linus' tree as
of this morning) on a Tuletta and got the following:
[ 41.409033] Unable to handle kernel paging request for data at
address 0x00d0
[ 41.409125] Faulting instruction address: 0xc0c29068
cpu 0x23:
On Thu, 2015-04-30 at 10:56 +0800, Pengbo Li wrote:
From: Xie Xiaobo x@freescale.com
A ioport setting was needed when used the QE uart function on TWR-P1025.
Added a conditional definition to avoid missing this setting when the
QE-uart driver was bulit to a module.
s/was bulit to/is
On Wed, Apr 29, 2015 at 07:44:20PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 03:30 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:47PM +1000, Alexey Kardashevskiy wrote:
This extends iommu_table_group_ops by a set of callbacks to support
dynamic DMA windows management.
On Thu, Apr 30, 2015 at 12:58:12PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 01:18 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:39PM +1000, Alexey Kardashevskiy wrote:
The pnv_pci_ioda_tce_invalidate() helper invalidates TCE cache. It is
supposed to be called on IODA1/2 and not
On Wed, Apr 29, 2015 at 07:00:30PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 01:25 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:40PM +1000, Alexey Kardashevskiy wrote:
At the moment the DMA setup code looks for the ibm,opal-tce-kill property
which contains the TCE kill register
On Wed, Apr 29, 2015 at 07:19:51PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 01:02 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:37PM +1000, Alexey Kardashevskiy wrote:
This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
which call in a loop
On Wed, Apr 29, 2015 at 07:51:21PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 02:18 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:42PM +1000, Alexey Kardashevskiy wrote:
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already.
On Wed, Apr 29, 2015 at 07:26:28PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 02:45 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:45PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving DMA window programming to an iommu_ops
callback. pnv_pci_ioda2_set_window() takes an
From: Xie Xiaobo x@freescale.com
A ioport setting was needed when used the QE uart function on TWR-P1025.
Added a conditional definition to avoid missing this setting when the
QE-uart driver was bulit to a module.
Signed-off-by: Xie Xiaobo x@freescale.com
Change-Id:
On Thu, 2015-04-30 at 10:56 +0800, Pengbo Li wrote:
From: Xie Xiaobo x@freescale.com
A ioport setting was needed when used the QE uart function on TWR-P1025.
Added a conditional definition to avoid missing this setting when the
QE-uart driver was bulit to a module.
Signed-off-by: Xie
OpenPower BMC machines do not place any sysparams in the device tree, so
at every boot we get a warning:
[0.437176] SYSPARAM: Opal sysparam node not found
Remove the warning, and reorder the init so we don't peform allocations
when there is no sysparam node in the device tree.
On Thu, Apr 30, 2015 at 12:29:30PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 12:16 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:33PM +1000, Alexey Kardashevskiy wrote:
This is to make extended ownership and multiple groups support patches
simpler for review.
This should
On Wed, Apr 29, 2015 at 07:12:37PM +1000, Alexey Kardashevskiy wrote:
On 04/29/2015 02:39 PM, David Gibson wrote:
On Sat, Apr 25, 2015 at 10:14:44PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving TCE table allocation into an iommu_ops
callback to support multiple IOMMU groups per
This is the 3rd version of a patch series that adds
the Ethernet driver for the Freescale QorIQ Data Path
Acceleration Architecture (DPAA).
This version addresses the feedback received from Joe
Perches and Paul Bolle.
Together with the driver a managed version of alloc_percpu
is provided that
Introduce managed counterparts for alloc_percpu() and free_percpu().
Add devm_alloc_percpu() and devm_free_percpu() into the managed
interfaces list.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
Tested-by: Madalin-Cristian Bucur madalin.bu...@freescale.com
---
Allow the user to tweak the refill threshold and the total number
of buffers in the buffer pool. The provided values are for one CPU.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Kconfig | 18 ++
Allow the selection of the transmission queue based on the CPU id.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Kconfig | 10 ++
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c| 3 +++
Add support for basic ethtool operations.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Makefile | 2 +-
.../net/ethernet/freescale/dpaa/dpaa_eth_common.c | 2 +
.../net/ethernet/freescale/dpaa/dpaa_eth_common.h | 3 +
Add a series of counters to be exported through debugfs:
- add detailed counters for reception errors;
- add detailed counters for QMan enqueue reject events;
- count the number of fragmented skbs received from the stack;
- count all frames received on the Tx confirmation path;
- add congestion
Add trace points on the hot processing path.
Signed-off-by: Ruxandra Ioana Radulescu ruxandra.radule...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Makefile | 1 +
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 12 ++
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h |
Add support for Scater/Gather (S/G) frames. The FMan can place
the frame content into multiple buffers and provide a S/G Table
(SGT) into one first buffer with references to the others.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
This introduces the Freescale Data Path Acceleration Architecture
(DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
the Freescale DPAA QorIQ platforms.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
Export per CPU counters through debugfs.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Kconfig| 7 +
drivers/net/ethernet/freescale/dpaa/Makefile | 3 +
drivers/net/ethernet/freescale/dpaa/dpaa_debugfs.c | 273
Export Frame Queue and Buffer Pool IDs through sysfs.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
drivers/net/ethernet/freescale/dpaa/Makefile | 2 +-
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 2 +
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h | 3 +
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