Re: PASEMI: PA6T board doesn't boot with the RC1 of kernel 4.2 anymore

2015-07-13 Thread Denis Kirjanov
On 7/13/15, Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Thu, 2015-07-09 at 12:52 +0300, Denis Kirjanov wrote: On 7/9/15, Christian Zigotzky chzigot...@xenosoft.de wrote: All I think you haven't received the SB600 patch yet. I have pasted it in this email directly. Thank you

Re: [PATCH v2] Caps in not always shift

2015-07-13 Thread Dinar Valeev
On Fri, Jul 10, 2015 at 8:42 AM, Paul Mackerras pau...@samba.org wrote: On Wed, Jul 08, 2015 at 06:47:44PM +0200, Dinar valeev wrote: From: Dinar Valeev dval...@suse.com Caps behaves like shift only for latin characters. In case we're typing - for example with caps enabled, SLOF picks _ char

[PATCH v4 2/6] powerpc/powernv: Add definition of OPAL_MSG_OCC message type

2015-07-13 Thread Shilpasri G Bhat
Add OPAL_MSG_OCC message definition to opal_message_type to receive OCC events like reset, load and throttled. Host performance can be affected when OCC is reset or OCC throttles the max Pstate. We can register to opal_message_notifier to receive OPAL_MSG_OCC type of message and report it to the

[PATCH v4 6/6] cpufreq: powernv: Restore cpu frequency to policy-cur on unthrottling

2015-07-13 Thread Shilpasri G Bhat
If frequency is throttled due to OCC reset then cpus will be in Psafe frequency, so restore the frequency on all cpus to policy-cur when OCCs are active again. And if frequency is throttled due to Pmax capping then restore the frequency of all the cpus in the chip on unthrottling. Signed-off-by:

[PATCH v4 5/6] cpufreq: powernv: Report Psafe only if PMSR.psafe_mode_active bit is set

2015-07-13 Thread Shilpasri G Bhat
On a reset cycle of OCC, although the system retires from safe frequency state the local pstate is not restored to Pmin or last requested pstate. Now if the cpufreq governor initiates a pstate change, the local pstate will be in Psafe and we will be reporting a false positive when we are not

[PATCH v4 3/6] cpufreq: powernv: Register for OCC related opal_message notification

2015-07-13 Thread Shilpasri G Bhat
OCC is an On-Chip-Controller which takes care of power and thermal safety of the chip. During runtime due to power failure or overtemperature the OCC may throttle the frequencies of the CPUs to remain within the power budget. We want the cpufreq driver to be aware of such situations to be able to

[PATCH v4 1/6] cpufreq: powernv: Handle throttling due to Pmax capping at chip level

2015-07-13 Thread Shilpasri G Bhat
The On-Chip-Controller(OCC) can throttle cpu frequency by reducing the max allowed frequency for that chip if the chip exceeds its power or temperature limits. As Pmax capping is a chip level condition report this throttling behavior at chip level and also do not set the global 'throttled' on Pmax

[PATCH v4 4/6] cpufreq: powernv: Call throttle_check() on receiving OCC_THROTTLE

2015-07-13 Thread Shilpasri G Bhat
Re-evaluate the chip's throttled state on recieving OCC_THROTTLE notification by executing *throttle_check() on any one of the cpu on the chip. This is a sanity check to verify if we were indeed throttled/unthrottled after receiving OCC_THROTTLE notification. We cannot call *throttle_check()

[PATCH v4 0/6] powernv: cpufreq: Report frequency throttle by OCC

2015-07-13 Thread Shilpasri G Bhat
This patchset intends to add frequency throttle reporting mechanism to powernv-cpufreq driver when OCC throttles the frequency. OCC is an On-Chip-Controller which takes care of the power and thermal safety of the chip. The CPU frequency can be throttled during an OCC reset or when OCC tries to

Re: [PATCH 1/3] panic: Disable crash_kexec_post_notifiers if kdump is not available

2015-07-13 Thread Hidehiro Kawai
Hello Eric and Daniel, (2015/07/14 5:26), dwal...@fifo99.com wrote: On Fri, Jul 10, 2015 at 08:41:28AM -0500, Eric W. Biederman wrote: Hidehiro Kawai hidehiro.kawai...@hitachi.com writes: You can call panic notifiers and kmsg dumpers before kdump by specifying crash_kexec_post_notifiers as a

[PATCH 0/8] CXL EEH Handling

2015-07-13 Thread Daniel Axtens
CXL accelerators are unfortunately not immune from failure. This patch set enables them to particpate in the Extended Error Handling process. This series starts with a number of preparatory patches: - Patch 1 creates a kernel flag that allows us to confidently assert the hardware will not

[PATCH 1/8] cxl: Allow the kernel to trust that an image won't change on PERST.

2015-07-13 Thread Daniel Axtens
Provide a kernel API and a sysfs entry which allow a user to specify that when a card is PERSTed, it's image will stay the same, allowing it to participate in EEH. Signed-off-by: Daniel Axtens d...@axtens.net --- Documentation/ABI/testing/sysfs-class-cxl | 10 ++ drivers/misc/cxl/api.c

[PATCH 2/8] cxl: Drop commands if the PCI channel is not in normal state

2015-07-13 Thread Daniel Axtens
If the PCI channel has gone down, don't attempt to poke the hardware. We need to guard every time cxl_whatever_(read|write) is called. This is because a call to those functions will dereference an offset into an mmio register, and the mmio mappings get invalidated in the EEH teardown. Check in

[PATCH 3/8] cxl: Allocate and release the SPA with the AFU

2015-07-13 Thread Daniel Axtens
Previously the SPA was allocated and freed upon entering and leaving AFU-directed mode. This causes some issues for error recovery - contexts hold a pointer inside the SPA, and they may persist after the AFU has been detached. We would ideally like to allocate the SPA when the AFU is allocated,

[PATCH 4/8] cxl: Make IRQ release idempotent

2015-07-13 Thread Daniel Axtens
Check if an IRQ is mapped before releasing it. This will simplify future EEH code by allowing unconditional unmapping of IRQs. Signed-off-by: Daniel Axtens d...@axtens.net --- drivers/misc/cxl/irq.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/misc/cxl/irq.c

[PATCH 5/8] cxl: Clean up adapter MMIO unmap path.

2015-07-13 Thread Daniel Axtens
- MMIO pointer unmapping is guarded by a null pointer check. However, iounmap doesn't null the pointer, just invalidate it. Therefore, explicitly null the pointer after unmapping. - afu_desc_mmio also needs to be unmapped. - PCI regions are allocated in cxl_map_adapter_regs.

[PATCH 6/8] cxl: Refactor adaptor init/teardown

2015-07-13 Thread Daniel Axtens
Some aspects of initialisation are done only once in the lifetime of an adapter: for example, allocating memory for the adapter, allocating the adapter number, or setting up sysfs/debugfs files. However, we may want to be able to do some parts of the initialisation multiple times: for example, in

[PATCH 7/8] cxl: Refactor AFU init/teardown

2015-07-13 Thread Daniel Axtens
As with an adapter, some aspects of initialisation are done only once in the lifetime of an AFU: for example, allocating memory, or setting up sysfs/debugfs files. However, we may want to be able to do some parts of the initialisation multiple times: for example, in error recovery we want to be

[PATCH 8/8] cxl: EEH support

2015-07-13 Thread Daniel Axtens
EEH (Enhanced Error Handling) allows a driver to recover from the temporary failure of an attached PCI card. Enable basic CXL support for EEH. Signed-off-by: Daniel Axtens d...@axtens.net --- drivers/misc/cxl/pci.c | 247 + 1 file changed, 247

Re: [RFC] genalloc:add an gen_pool_alloc_align func to genalloc

2015-07-13 Thread Laura Abbott
On 07/12/2015 07:22 PM, Zhao Qiang wrote: -Original Message- From: Laura Abbott [mailto:labb...@redhat.com] Sent: Friday, July 10, 2015 5:51 AM To: Zhao Qiang-B45475; lau...@codeaurora.org Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; a...@linux-foundation.org;

Re: [3/3] IRQ: Print unexpected IRQ messages consistently across architectures

2015-07-13 Thread Bjorn Helgaas
On Sun, Jul 12, 2015 at 10:23 PM, Michael Ellerman m...@ellerman.id.au wrote: On Sun, 2015-12-07 at 22:02:11 UTC, Bjorn Helgaas wrote: Many architectures use a variant of unexpected IRQ trap at vector %x to log unexpected IRQs. This is confusing because (a) it prints the Linux IRQ number, but

Re: [RFC v4 03/25] m68k/atari: Move Atari-specific code out of drivers/char/nvram.c

2015-07-13 Thread Andreas Schwab
Finn Thain fth...@telegraphics.com.au writes: BTW, I didn't change the SCSI ID location in NVRAM. This code says 16 whereas atari_scsi says 14. Which one is correct? I think atari_scsi is wrong. The best source I could find (http://www.gratifiant.com/nvram-falcon-t561185) places it after the

Re: [PATCH 1/3] panic: Disable crash_kexec_post_notifiers if kdump is not available

2015-07-13 Thread dwalker
On Fri, Jul 10, 2015 at 08:41:28AM -0500, Eric W. Biederman wrote: Hidehiro Kawai hidehiro.kawai...@hitachi.com writes: You can call panic notifiers and kmsg dumpers before kdump by specifying crash_kexec_post_notifiers as a boot parameter. However, it doesn't make sense if kdump is not

[patch 02/20] powerpc/52xx: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 05/20] powerpc/cell: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 11/20] powerpc/qe_ic: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 14/20] powerpc/mpc52xx: Use irq_set_handler_locked()

2015-07-13 Thread Thomas Gleixner
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle. Signed-off-by: Thomas Gleixner t...@linutronix.de Cc: Jiang Liu jiang@linux.intel.com Cc: Julia Lawall julia.law...@lip6.fr Cc: Benjamin Herrenschmidt

[patch 16/20] powerpc/ipic: Use irq_set_handler_locked()

2015-07-13 Thread Thomas Gleixner
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle. Signed-off-by: Thomas Gleixner t...@linutronix.de Cc: Jiang Liu jiang@linux.intel.com Cc: Julia Lawall julia.law...@lip6.fr Cc: Benjamin Herrenschmidt

[patch 20/20] powerpc/cell: Prepare iic_ioexc_cascade for irq argument removal

2015-07-13 Thread Thomas Gleixner
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by:

[patch 01/20] powerpc/media5200: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 06/20] powerpc/spider-pic: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 09/20] powerpc/mpc7448: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 08/20] powerpc/holly: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 18/20] powerpc/mpc5121: Prepare cpld_pic_cascade for irq argument removal

2015-07-13 Thread Thomas Gleixner
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by:

[patch 04/20] powerpc/axon_msi: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 00/20] powerpc: Interrupt cleanups and API change preparation

2015-07-13 Thread Thomas Gleixner
The following patch series contains the following changes: - Consolidation of chained interrupt handler setup/removal - Switch to functions which avoid a redundant interrupt descriptor lookup - Preparation of interrupt flow handlers for the 'irq' argument removal The

[patch 07/20] powerpc/hlwd-pic: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 13/20] powerpc/irq: Use access helper irq_data_get_affinity_mask()

2015-07-13 Thread Thomas Gleixner
From: Jiang Liu jiang@linux.intel.com This is a preparatory patch for moving irq_data struct members. Signed-off-by: Jiang Liu jiang@linux.intel.com Cc: linuxppc-dev@lists.ozlabs.org Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Michael Ellerman m...@ellerman.id.au

[patch 15/20] powerpc/cpm2: Use irq_set_handler_locked()

2015-07-13 Thread Thomas Gleixner
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle. Signed-off-by: Thomas Gleixner t...@linutronix.de Cc: Jiang Liu jiang@linux.intel.com Cc: Julia Lawall julia.law...@lip6.fr Cc: Benjamin Herrenschmidt

[patch 17/20] powerpc/mpc8xx: Use irq_set_handler_locked()

2015-07-13 Thread Thomas Gleixner
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle. Signed-off-by: Thomas Gleixner t...@linutronix.de Cc: Jiang Liu jiang@linux.intel.com Cc: Julia Lawall julia.law...@lip6.fr Cc: Benjamin Herrenschmidt

Re: [PATCH] powerpc/fsl-booke: Add T1040D4RDB/T1042D4RDB board support

2015-07-13 Thread Scott Wood
On Sun, 2015-07-12 at 00:47 -0500, Priyanka Jain wrote: +/ { + model = fsl,T1040D4RDB; + compatible = fsl,T1040D4RDB; + #address-cells = 2; + #size-cells = 2; + interrupt-parent = mpic; + + ifc: localbus@ffe124000{ + cpld@3,0 { +

[patch 03/20] powerpc/pq2ads: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 10/20] powerpc/mpic: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 12/20] powerpc/uic: Consolidate chained IRQ handler install/remove

2015-07-13 Thread Thomas Gleixner
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc-lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King rmk+ker...@arm.linux.org.uk Signed-off-by: Thomas Gleixner

[patch 19/20] powerpc/85xx: Prepare cascade handlers for irq argument removal

2015-07-13 Thread Thomas Gleixner
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by:

[PATCH 2/2] Adding enable_kernel_vsx() to access VSX instructions

2015-07-13 Thread Leonidas S. Barbosa
vmx-crypto driver make use of some VSX instructions which are only available if VSX is enabled. Running in cases where VSX are not enabled vmx-crypto fails in a VSX exception. In order to fix this enable_kernel_vsx() was added to turn on VSX instructions for vmx-crypto. Signed-off-by: Leonidas

Re: [PATCH 5/6] [RFC] crypto/testmgr: add null test for 842 algorithm

2015-07-13 Thread Nishanth Aravamudan
On 13.07.2015 [17:05:36 -0700], Nishanth Aravamudan wrote: On 04.07.2015 [15:24:53 +0800], Herbert Xu wrote: On Thu, Jul 02, 2015 at 03:41:19PM -0700, Nishanth Aravamudan wrote: Currently, when the nx-842-pseries driver loads, the following message is emitted: alg: No test for 842

Re: [PATCH 5/6] [RFC] crypto/testmgr: add null test for 842 algorithm

2015-07-13 Thread Nishanth Aravamudan
On 04.07.2015 [15:24:53 +0800], Herbert Xu wrote: On Thu, Jul 02, 2015 at 03:41:19PM -0700, Nishanth Aravamudan wrote: Currently, when the nx-842-pseries driver loads, the following message is emitted: alg: No test for 842 (842-nx) It seems like the simplest way to fix this message

[PATCH 1/2] Uncomment and make enable_kernel_vsx() routine available

2015-07-13 Thread Leonidas S. Barbosa
enable_kernel_vsx() function was commented since anything was using it. However, vmx-crypto driver uses VSX instructions which are only available if VSX is enable. Otherwise it rises an exception oops. This patch uncomment enable_kernel_vsx() routine and makes it available. Signed-off-by:

[PATCH 0/2] Uncomment VSX enable routine for instructions access

2015-07-13 Thread Leonidas S. Barbosa
enable_kernel_vsx() was commented since anything was using it. It changes with vmx_crypto driver that call VSX instructions and need kernel_vsx enabled in order to do it properly. Without a way to enable VSX instruction vmx_crypto fails into an exception. These patches uncomment

Re: [PATCH 1/3] panic: Disable crash_kexec_post_notifiers if kdump is not available

2015-07-13 Thread Eric W. Biederman
dwal...@fifo99.com writes: On Fri, Jul 10, 2015 at 08:41:28AM -0500, Eric W. Biederman wrote: Hidehiro Kawai hidehiro.kawai...@hitachi.com writes: You can call panic notifiers and kmsg dumpers before kdump by specifying crash_kexec_post_notifiers as a boot parameter. However, it doesn't

Re: PASEMI: PA6T board doesn't boot with the RC1 of kernel 4.2 anymore

2015-07-13 Thread Benjamin Herrenschmidt
On Thu, 2015-07-09 at 12:52 +0300, Denis Kirjanov wrote: On 7/9/15, Christian Zigotzky chzigot...@xenosoft.de wrote: All I think you haven't received the SB600 patch yet. I have pasted it in this email directly. Thank you for your help. I am sorry because of this long patch but I hope

Re: PASEMI: PA6T board doesn't boot with the RC1 of kernel 4.2 anymore

2015-07-13 Thread Benjamin Herrenschmidt
On Fri, 2015-07-10 at 00:27 +0200, Christian Zigotzky wrote: Hi All, Many thanks for your help. You're right. It was something wrong with my last bisect. I did another bisect. I evaluated the one sometimes boots with good. .../... Now that makes more sense since the problem is around

Re: [PATCH V2] powerpc/irq: Enable some more exceptions in /proc/interrupts interface

2015-07-13 Thread Anshuman Khandual
On 07/13/2015 11:11 AM, Michael Ellerman wrote: On Mon, 2015-07-13 at 10:54 +0530, Anshuman Khandual wrote: On 07/10/2015 12:40 PM, Michael Neuling wrote: What's the performance impact of this? If you run this test with --fp, --altivec or --vector what is the impact of adding this patch?

Re: [PATCH 3/3] IRQ: Print unexpected IRQ messages consistently across architectures

2015-07-13 Thread Geert Uytterhoeven
On Mon, Jul 13, 2015 at 12:02 AM, Bjorn Helgaas bhelg...@google.com wrote: Many architectures use a variant of unexpected IRQ trap at vector %x to log unexpected IRQs. This is confusing because (a) it prints the Linux IRQ number, but vector more often refers to a CPU vector number, and (b) it

Re: [RFC v4 00/25] Re-use nvram module

2015-07-13 Thread Geert Uytterhoeven
Hi Finn, On Sun, Jul 12, 2015 at 12:25 PM, Finn Thain fth...@telegraphics.com.au wrote: The generic NVRAM module, drivers/char/generic_nvram, implements a /dev/nvram misc device. It is used only by 32-bit PowerPC platforms and isn't generic enough to be more widely used. [...] Thanks for

[PATCH V3] powerpc/irq: Enable some more exceptions in /proc/interrupts interface

2015-07-13 Thread Anshuman Khandual
This patch enables facility unavailable exceptions for generic facility, FPU, ALTIVEC and VSX in /proc/interrupts listing by incrementing their newly added IRQ statistical counters as and when these exceptions happen. This also adds couple of helper functions which will be called from within the