On Tue, Aug 11, 2015 at 12:39:02PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:29 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 07:31:11PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
The original implementation of pnv_ioda_setup_dma() iterates the
list of
From: Emil Medve emilian.me...@freescale.com
devm_ioremap_prot() was removed in commit dedd24a12,
and was introduced in commit b41e5fffe8.
This reverts commit dedd24a12fe6735898feeb06184ee346907abb5d.
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
arch/powerpc/include/asm/io.h |
From: Hai-Ying Wang haiying.w...@freescale.com
Add support for CPU hotplug for the DPAA 1.0 Queue Manager
driver.
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
Signed-off-by: Emil Medve emilian.me...@freescale.com
Signed-off-by: Roy Pledge roy.ple...@freescale.com
---
From: Hai-Ying Wang haiying.w...@freescale.com
Add support for CPU hotplug for the DPAA 1.0 Buffer Manager
driver
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
Signed-off-by: Emil Medve emilian.me...@freescale.com
Signed-off-by: Roy Pledge roy.ple...@freescale.com
---
Hi,
On Wed, Aug 12, 2015 at 10:42 PM, Boaz Harrosh b...@plexistor.com wrote:
On 08/12/2015 10:05 AM, Christoph Hellwig wrote:
It turns out most DMA mapping implementation can handle SGLs without
page structures with some fairly simple mechanical work. Most of it
is just about consistently
On Mon, Aug 10, 2015 at 07:21:12PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
For P7IOC, the whole available DMA32 space, which is below the
MEM32 space, is divided evenly into 256MB segments. The number
of continuous segments assigned to one particular PE depends
From: Geoff Thorpe geoff.tho...@freescale.com
Add debugfs support for querying the state of hardware based
Buffer Manager pools used in DPAA 1.0.
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Emil Medve emilian.me...@freescale.com
Signed-off-by: Roy Pledge
From: Madalin Bucur madalin.bu...@freescale.com
Add qman_delete_cgr_safe() that can be called from any CPU.
This in turn schedules qman_delete_cgr() on the proper CPU.
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
Signed-off-by: Roy Pledge roy.ple...@freescale.com
---
On Tue, Aug 11, 2015 at 12:32:13PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:12 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 05:40:08PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
There're 3 windows (IO, M32 and M64) for PHB, root port and upstream
From: Geoff Thorpe geoff.tho...@freescale.com
Add a self test for the DPAA 1.0 Buffer Manager driver. This
test ensures that the driver can properly acquire and release
buffers using the BMan portal infrastructure.
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Emil Medve
From: Geoff Thorpe geoff.tho...@freescale.com
This driver enables the Freescale DPAA 1.0 Buffer Manager block. BMan
is a hardware buffer pool manager that allows accelerators
connected to the SoC datapath to acquire and release buffers during
data processing.
Signed-off-by: Geoff Thorpe
The function above doesn't even use the 'rc' value.
Darn, you're right.
I'll fix that in a new version.
--
Regards,
Daniel
--
Regards,
Daniel
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On Wed, Aug 12, 2015 at 10:00 AM, James Bottomley
james.bottom...@hansenpartnership.com wrote:
On Wed, 2015-08-12 at 09:05 +0200, Christoph Hellwig wrote:
...
However the ccio (parisc) and sba_iommu (parisc ia64) IOMMUs seem
to be operate mostly on virtual addresses. It's a fairly odd concept
On Mon, Aug 10, 2015 at 07:43:48PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
On P7IOC, the whole DMA32 space is divided evenly to 256MB segments.
Each PE can consume one or multiple DMA32 segments. Current code
doesn't trace the available DMA32 segments and those
On Tue, Aug 11, 2015 at 12:47:25PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:38 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 07:53:02PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
Each PHB maintains an array helping to translate RID (Request
ID) to PE#
The Freescale Data Path Acceleration Architecture (DPAA) is a set of hardware
components on specific QorIQ multicore processors. This architecture provides
the infrastructure to support simplified sharing of networking interfaces and
accelerators by multiple CPU cores and the accelerators.
From: Geoff Thorpe geoff.tho...@freescale.com
Add debugfs sypport for querying the state of hardware based
queues managed by the DPAA 1.0 Queue Manager.
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Emil Medve emilian.me...@freescale.com
Signed-off-by: Madalin Bucur
Christoph,
On 12 August 2015 at 08:05, Christoph Hellwig h...@lst.de wrote:
Signed-off-by: Christoph Hellwig h...@lst.de
---
include/asm-generic/dma-mapping-common.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/asm-generic/dma-mapping-common.h
On Wed, Aug 12, 2015 at 10:57:33PM +1000, Alexey Kardashevskiy wrote:
On 08/12/2015 09:20 PM, Gavin Shan wrote:
On Wed, Aug 12, 2015 at 09:05:09PM +1000, Alexey Kardashevskiy wrote:
On 08/12/2015 08:45 PM, Gavin Shan wrote:
On Tue, Aug 11, 2015 at 12:23:42PM +1000, Alexey Kardashevskiy wrote:
On
From: Geoff Thorpe geoff.tho...@freescale.com
Add a self test for the DPAA 1.0 Queue Manager driver. The tests
ensure that the driver can properly enqueue and dequeue from frame
queues using the QMan portal infrastructure.
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by:
On Tue, Aug 11, 2015 at 12:50:33PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:43 AM, Gavin Shan wrote:
On Tue, Aug 11, 2015 at 12:39:02AM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
The available PE#, represented by a bitmap in the PHB, is allocated
in
On Wed, 2015-29-07 at 07:09:58 UTC, Anshuman Khandual wrote:
This patch just removes one redundant entry for one extern variable
'slb_compare_rr_to_size' from the scope. This patch does not change
any functionality.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Applied to
CXL accelerators are unfortunately not immune from failure. This patch
set enables them to particpate in the Extended Error Handling process.
This series starts with a number of preparatory patches:
- Patch 1 is cleanup: converting macros to static inlines.
- Patch 2 makes sure we don't touch
On Fri, 2015-07-08 at 03:18:17 UTC, Daniel Axtens wrote:
It's a good idea, and it brings us in line with the rest of arch/powerpc.
Signed-off-by: Daniel Axtens d...@axtens.net
Acked-by: Michael Neuling mi...@neuling.org
Applied to powerpc next, thanks.
On Wed, 2015-29-07 at 07:10:03 UTC, Anshuman Khandual wrote:
This patch just simplifies the existing code logic while fetching
the SLB size property from the device tree. This also changes the
function name from check_cpu_slb_size to init_mmu_slb_size as
it just initializes the mmu_slb_size
Check if an IRQ is mapped before releasing it.
This will simplify future EEH code by allowing unconditional unmapping
of IRQs.
Acked-by: Cyril Bur cyril...@gmail.com
Signed-off-by: Daniel Axtens d...@axtens.net
---
drivers/misc/cxl/irq.c | 9 +
1 file changed, 9 insertions(+)
diff
As with an adapter, some aspects of initialisation are done only once
in the lifetime of an AFU: for example, allocating memory, or setting
up sysfs/debugfs files.
However, we may want to be able to do some parts of the initialisation
multiple times: for example, in error recovery we want to be
- MMIO pointer unmapping is guarded by a null pointer check.
However, iounmap doesn't null the pointer, just invalidate it.
Therefore, explicitly null the pointer after unmapping.
- afu_desc_mmio also needs to be unmapped.
- PCI regions are allocated in cxl_map_adapter_regs.
CONFIG_CXL_EEH is for CXL's EEH related code.
Other drivers can depend on or #ifdef on this symbol to configure
PERST behaviour, allowing CXL to participate in the EEH process.
Reviewed-by: Cyril Bur cyril...@gmail.com
Signed-off-by: Daniel Axtens d...@axtens.net
---
drivers/misc/cxl/Kconfig |
On Tue, Aug 11, 2015 at 11:03:40PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
This adds the refcount to PE, which represents number of PCI
devices contained in the PE. When last device leaves from the
PE, the PE together with its consumed resources (IO, DMA,
On Fri, 2015-07-08 at 03:18:18 UTC, Daniel Axtens wrote:
A few declarations were identified by sparse as needing to be static:
/scratch/dja/linux-capi/drivers/misc/cxl/irq.c:408:6: warning: symbol
'afu_irq_name_free' was not declared. Should it be static?
On Wed, 2015-29-07 at 07:10:02 UTC, Anshuman Khandual wrote:
This patch adds some documentation to 'patch_slb_encoding' function
explaining about how it clears the existing immediate value in the
given instruction and inserts a new one there.
Signed-off-by: Anshuman Khandual
EEH (Enhanced Error Handling) allows a driver to recover from the
temporary failure of an attached PCI card. Enable basic CXL support
for EEH.
Signed-off-by: Daniel Axtens d...@axtens.net
---
drivers/misc/cxl/cxl.h | 1 +
drivers/misc/cxl/pci.c | 253
Some aspects of initialisation are done only once in the lifetime of
an adapter: for example, allocating memory for the adapter,
allocating the adapter number, or setting up sysfs/debugfs files.
However, we may want to be able to do some parts of the
initialisation multiple times: for example, in
On Wed, 2015-29-07 at 07:10:04 UTC, Anshuman Khandual wrote:
Value of the 'valid' variable is zero when 'esid' is zero and it does
not matter when 'esid' is non-zero. The variable 'valid' can be dropped
from the function 'dump_segments' by checking for validity of 'esid'
inside the nested code
If the PCI channel has gone down, don't attempt to poke the hardware.
We need to guard every time cxl_whatever_(read|write) is called. This
is because a call to those functions will dereference an offset into an
mmio register, and the mmio mappings get invalidated in the EEH
teardown.
Check in
Previously the SPA was allocated and freed upon entering and leaving
AFU-directed mode. This causes some issues for error recovery - contexts
hold a pointer inside the SPA, and they may persist after the AFU has
been detached.
We would ideally like to allocate the SPA when the AFU is allocated,
On Wed, 2015-29-07 at 07:09:59 UTC, Anshuman Khandual wrote:
These are essentially SLB individual slots with entries what we are
dealing with in these functions. Usage of both 'entry' and 'slot'
synonyms makes it real confusing sometimes. This patch makes it
uniform across the file by
On Fri, 2015-07-08 at 03:18:20 UTC, Daniel Axtens wrote:
An IO address, tagged with __iomem, is passed to debugfs_create_file
as private data. This requires that it be cast to void *. The cast
creates a sparse warning:
/scratch/dja/linux-capi/drivers/misc/cxl/debugfs.c:51:57: warning: cast
On Thu, 2015-06-08 at 13:05:07 UTC, Anshuman Khandual wrote:
This patch just replaces hard coded values with existing
DRCONF flags while procesing detected LMBs from the device
tree. This does not change any functionality.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
Applied
We're about to make these more complex, so make them functions
first.
Signed-off-by: Daniel Axtens d...@axtens.net
---
drivers/misc/cxl/cxl.h | 51 ++
1 file changed, 35 insertions(+), 16 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h
Provide a kernel API and a sysfs entry which allow a user to specify
that when a card is PERSTed, it's image will stay the same, allowing
it to participate in EEH.
cxl_reset is used to reflash the card. In that case, we cannot safely
assert that the image will not change. Therefore, disallow
If the driver doesn't participate in EEH, the AFUs will be removed
by cxl_remove, which will be invoked by EEH.
If the driver does particpate in EEH, the vPHB needs to stick around
so that the it can particpate.
In both cases, we shouldn't remove the AFU/vPHB.
Reviewed-by: Cyril Bur
On 08/11/2015 03:18 AM, Michael Ellerman wrote:
On Fri, 2015-08-07 at 07:49 +0530, Madhavan Srinivasan wrote:
On Thursday 06 August 2015 06:35 PM, Anshuman Khandual wrote:
This patch just replaces hard coded values with existing
Please drop This patch just and start with Replace
For the iommu offset we just need and offset into the page. Calculate
that using the physical address instead of using the virtual address
so that we don't require a virtual mapping.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/x86/kernel/pci-calgary_64.c | 10 --
1 file
Dan Williams started to look into addressing I/O to and from
Persistent Memory in his series from June:
http://thread.gmane.org/gmane.linux.kernel.cross-arch/27944
I've started looking into DMA mapping of these SGLs specifically instead
of the map_pfn method in there. In addition to
Use sg_phys() instead of __pa(sg_virt(sg)) so that we don't
require a kernel virtual address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/sparc/kernel/iommu.c| 2 +-
arch/sparc/kernel/iommu_common.h | 4 +---
arch/sparc/kernel/pci_sun4v.c| 2 +-
3 files changed, 3
Just remove a BUG_ON, the code handles them just fine as-is.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/mn10300/include/asm/dma-mapping.h | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/mn10300/include/asm/dma-mapping.h
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/ia64/hp/common/sba_iommu.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 344387a..9e5aa8e 100644
---
Make all cache invalidation conditional on sg_has_page().
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/xtensa/include/asm/dma-mapping.h | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/xtensa/include/asm/dma-mapping.h
Make all cache invalidation conditional on sg_has_page().
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/sh/kernel/dma-nommu.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
index 5b0bfcd..3b64dc7
On 08/12/2015 11:35 AM, Michael Ellerman wrote:
On Wed, 2015-07-29 at 12:40 +0530, Anshuman Khandual wrote:
This patch adds a set of new elements to the existing PACA dump list
inside an xmon session which can be listed below improving the overall
xmon debug support.
(1) hmi_event_available
On Wed, 12 Aug 2015 10:48:18 +1000
Daniel Axtens d...@axtens.net wrote:
Provide a kernel API and a sysfs entry which allow a user to specify
that when a card is PERSTed, it's image will stay the same, allowing
it to participate in EEH.
cxl_reset is used to reflash the card. In that case, we
On 08/12/2015 09:41 AM, Michael Ellerman wrote:
On Wed, 2015-29-07 at 07:10:01 UTC, Anshuman Khandual wrote:
This patch adds the following six helper functions to help improve
modularization and readability of the code.
(1) slb_invalidate_all:Invalidates the entire SLB
(2)
Signed-off-by: Christoph Hellwig h...@lst.de
---
include/linux/scatterlist.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
index 9b1ef0c..b1056bf 100644
--- a/include/linux/scatterlist.h
+++ b/include/linux/scatterlist.h
For the iommu offset we just need and offset into the page. Calculate
that using the physical address instead of using the virtual address
so that we don't require a virtual mapping.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/sparc/mm/io-unit.c | 23 ---
1 file
Switch from sg_virt to sg_phys as blackfin like all nommu architectures
has a 1:1 virtual to physical mapping.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/blackfin/kernel/dma-mapping.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly. To do this consolidate
the two platform callouts using pages and virtual addresses into a
single one using a physical address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
Make all cache invalidation conditional on sg_has_page().
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/powerpc/kernel/dma.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 35e4dcc..cece40b 100644
On 08/09/2015 07:57 AM, Benjamin Herrenschmidt wrote:
On Tue, 2015-08-04 at 19:57 +1000, Michael Ellerman wrote:
On Mon, 2015-13-07 at 08:16:06 UTC, Anshuman Khandual wrote:
This patch enables facility unavailable exceptions for generic facility,
FPU, ALTIVEC and VSX in /proc/interrupts
On Wed, 12 Aug 2015 10:48:11 +1000
Daniel Axtens d...@axtens.net wrote:
If the PCI channel has gone down, don't attempt to poke the hardware.
We need to guard every time cxl_whatever_(read|write) is called. This
is because a call to those functions will dereference an offset into an
mmio
Use sg_phys() instead of virt_to_phys(sg_virt(sg)) so that we don't
require a kernel virtual address, and switch a few debug printfs to
print physical instead of virtual addresses.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/alpha/kernel/pci_iommu.c | 36
Use sg_phys() instead of virt_to_phys(sg_virt(sg)) so that we don't
require a kernel virtual address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/c6x/kernel/dma.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/c6x/kernel/dma.c b/arch/c6x/kernel/dma.c
index
Pass a PFN to iommu_get_one instad of calculating it locall from a
page structure so that we don't need pages for every address we can
DMA to or from.
Also further restrict the cache flushing as we now have a non-highmem
way of not kernel virtual mapped physical addresses.
Signed-off-by:
Use sg_phys() instead of page_to_phys(sg_page(sg)) so that we don't
require a page structure for all DMA memory.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/s390/pci/pci_dma.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git
Make all cache invalidation conditional on sg_has_page().
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/metag/include/asm/dma-mapping.h | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/metag/include/asm/dma-mapping.h
On Tue, Aug 11, 2015 at 09:14:00PM -0700, Sukadev Bhattiprolu wrote:
| +static void __perf_read_group_add(struct perf_event *leader, u64
read_format, u64 *values)
| {
| + struct perf_event *sub;
| + int n = 1; /* skip @nr */
This n = 1 is to skip over the values[0] = 1 + nr_siblings
The paca display is already more than 24 lines, which can be problematic
if you have an old school 80x24 terminal, or more likely you are on a
virtual terminal which does not scroll for whatever reason.
We'd like to expand the paca display even more, so add a way to limit
the number of lines that
Use sg_pfn to get a the PFN and skip checks that require a kernel
virtual address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
lib/dma-debug.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index dace71f..a215a80 100644
---
Use
sg_phys(sg) PAGE_MASK
instead of
page_to_pfn(sg_page(sg)) PAGE_SHIFT
to get at the page-aligned physical address ofa SG entry, so that
we don't require a page backing for SG entries.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/sparc/kernel/ldc.c | 4 ++--
1 file
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/arc/include/asm/dma-mapping.h | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly, bypassing the noop
page_to_bus.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/avr32/include/asm/dma-mapping.h | 14 +++---
1 file changed, 7 insertions(+), 7
On 08/12/2015 12:27 PM, Michael Ellerman wrote:
The paca display is already more than 24 lines, which can be problematic
if you have an old school 80x24 terminal, or more likely you are on a
virtual terminal which does not scroll for whatever reason.
We'd like to expand the paca display even
On Wed, 2015-07-29 at 12:40 +0530, Anshuman Khandual wrote:
This patch adds a set of new elements to the existing PACA dump list
inside an xmon session which can be listed below improving the overall
xmon debug support.
(1) hmi_event_available
(2) dscr_default
(3) vmalloc_sllp
(4)
On Wed, 12 Aug 2015 10:48:10 +1000
Daniel Axtens d...@axtens.net wrote:
We're about to make these more complex, so make them functions
first.
Reviewed-by: Cyril Bur cyril...@gmail.com
Signed-off-by: Daniel Axtens d...@axtens.net
---
drivers/misc/cxl/cxl.h | 51
On Wed, 12 Aug 2015 10:48:19 +1000
Daniel Axtens d...@axtens.net wrote:
EEH (Enhanced Error Handling) allows a driver to recover from the
temporary failure of an attached PCI card. Enable basic CXL support
for EEH.
Looks like the only change since was the removal of the #ifdef, if that is
Just remove a BUG_ON, the code handles them just fine as-is.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/x86/kernel/pci-nommu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index da15918..a218059 100644
---
Use sg_phys() instead of virt_to_phys(sg_virt(sg)) so that we don't
require a kernel virtual address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/ia64/sn/pci/pci_dma.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/ia64/sn/pci/pci_dma.c
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/openrisc/kernel/dma.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/openrisc/kernel/dma.c
Signed-off-by: Christoph Hellwig h...@lst.de
---
include/asm-generic/dma-mapping-common.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/asm-generic/dma-mapping-common.h
b/include/asm-generic/dma-mapping-common.h
index 940d5ec..afc3eaf 100644
---
On Wed, 12 Aug 2015 10:48:15 +1000
Daniel Axtens d...@axtens.net wrote:
Some aspects of initialisation are done only once in the lifetime of
an adapter: for example, allocating memory for the adapter,
allocating the adapter number, or setting up sysfs/debugfs files.
However, we may want to
From: Dan Williams dan.j.willi...@intel.com
Coccinelle cleanup to replace open coded sg to physical address
translations. This is in preparation for introducing scatterlists that
reference __pfn_t.
// sg_phys.cocci: convert usage page_to_phys(sg_page(sg)) to sg_phys(sg)
// usage: make
Use sg_phys() instead of virt_to_phys(sg_virt(sg)) so that we don't
require a kernel virtual address.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/alpha/kernel/pci-noop.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/alpha/kernel/pci-noop.c
For the iommu offset we just need and offset into the page. Calculate
that using the physical address instead of using the virtual address
so that we don't require a virtual mapping.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/powerpc/kernel/iommu.c | 14 +++---
1 file
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/nios2/mm/dma-mapping.c | 29 +++--
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git
Only call kmap_atomic_primary when the SG entry is mapped into
kernel virtual space.
XXX: the code already looks odd due to the lack of pairing between
kmap_atomic_primary and kunmap_atomic_primary. Does it work either
before or after this patch?
Signed-off-by: Christoph Hellwig h...@lst.de
---
Just remove a BUG_ON, the code handles them just fine as-is.
Signed-off-by: Christoph Hellwig h...@lst.de
---
drivers/iommu/intel-iommu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 3541d65..ae10573 100644
---
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
Signed-off-by: Christoph Hellwig h...@lst.de
---
arch/parisc/kernel/pci-dma.c | 29 ++---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git
On Wednesday 12 August 2015 12:39 PM, Christoph Hellwig wrote:
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
Signed-off-by: Christoph Hellwig h...@lst.de
With a minor nit below.
Acked-by: Vineet Gupta vgu...@synopsys.com
---
On Tue, Aug 11, 2015 at 12:06:26PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 09:45 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 04:30:09PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
The patch enables M64 window on P7IOC, which has been enabled on
PHB3.
On Wed, Aug 12, 2015 at 09:05:09PM +1000, Alexey Kardashevskiy wrote:
On 08/12/2015 08:45 PM, Gavin Shan wrote:
On Tue, Aug 11, 2015 at 12:23:42PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:03 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 05:16:40PM +1000, Alexey Kardashevskiy wrote:
On
From: Cyril Bur
Sent: 11 August 2015 07:01
...
You have a dilema with the use of ugly if (rc = foo()). I don't like it but
the
file is littered with it.
Looks like the majority of uses in this file the conditional block is only
one line then it makes sense (or at least in terms of numbers
Around Wed 12 Aug 2015 09:05:39 +0200 or thereabout, Christoph Hellwig wrote:
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly, bypassing the noop
page_to_bus.
Signed-off-by: Christoph Hellwig h...@lst.de
Acked-by: Hans-Christian
On Tue, Aug 11, 2015 at 12:23:42PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:03 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 05:16:40PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
The patch is adding 6 bitmaps, three to PE and three to PHB, to track
The
On 08/12/2015 08:45 PM, Gavin Shan wrote:
On Tue, Aug 11, 2015 at 12:23:42PM +1000, Alexey Kardashevskiy wrote:
On 08/11/2015 10:03 AM, Gavin Shan wrote:
On Mon, Aug 10, 2015 at 05:16:40PM +1000, Alexey Kardashevskiy wrote:
On 08/06/2015 02:11 PM, Gavin Shan wrote:
The patch is adding 6
On Sun 09-08-15 01:22:52, Eric B Munson wrote:
With the refactored mlock code, introduce a new system call for mlock.
The new call will allow the user to specify what lock states are being
added. mlock2 is trivial at the moment, but a follow on patch will add
a new mlock state making it
On Wed, 2015-08-12 at 13:24 +0530, Anshuman Khandual wrote:
On 08/12/2015 12:27 PM, Michael Ellerman wrote:
@@ -2090,9 +2092,12 @@ static void dump_one_paca(int cpu)
printf( %-*s = %s\n, 16, present, cpu_present(cpu) ? yes : no);
printf( %-*s = %s\n, 16, online, cpu_online(cpu) ?
On Wed, 2015-08-12 at 09:05 +0200, Christoph Hellwig wrote:
Just remove a BUG_ON, the code handles them just fine as-is.
Signed-off-by: Christoph Hellwig h...@lst.de
Acked-by: David Woodhouse david.woodho...@intel.com
--
David WoodhouseOpen Source Technology
On Wed, Aug 12, 2015 at 12:05 AM, Christoph Hellwig h...@lst.de wrote:
+ for_each_sg(sg, s, nents, i) {
+ if (sg_has_page(s))
+ kmemcheck_mark_initialized(sg_virt(s), s-length);
+ }
[ Again, I'm responding to one random patch - this pattern was
On Wed, Aug 12, 2015 at 12:05 AM, Christoph Hellwig h...@lst.de wrote:
Make all cache invalidation conditional on sg_has_page() and use
sg_phys to get the physical address directly.
So this worries me a bit (I'm just reacting to one random patch in the series).
The reason?
I think this wants
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