On Mon, 4 Jan 2016 22:42:44 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jan 04, 2016 at 04:03:39PM +0100, Martin Schwidefsky wrote:
> > On Mon, 4 Jan 2016 14:20:42 +0100
> > Peter Zijlstra wrote:
> >
> > > On Thu, Dec 31, 2015 at 09:06:30PM +0200, Michael
On Mon, 4 Jan 2016 22:18:58 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jan 04, 2016 at 02:45:25PM +0100, Peter Zijlstra wrote:
> > On Thu, Dec 31, 2015 at 09:08:38PM +0200, Michael S. Tsirkin wrote:
> > > This defines __smp_xxx barriers for s390,
> > > for use by
On Tue, Jan 05, 2016 at 09:36:55AM +0800, Boqun Feng wrote:
> Hi Michael,
>
> On Thu, Dec 31, 2015 at 09:07:42PM +0200, Michael S. Tsirkin wrote:
> > This defines __smp_xxx barriers for powerpc
> > for use by virtualization.
> >
> > smp_xxx barriers are removed as they are
> > defined correctly
On Tue, Jan 05, 2016 at 09:13:19AM +0100, Martin Schwidefsky wrote:
> On Mon, 4 Jan 2016 22:18:58 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Jan 04, 2016 at 02:45:25PM +0100, Peter Zijlstra wrote:
> > > On Thu, Dec 31, 2015 at 09:08:38PM +0200, Michael S. Tsirkin wrote:
>
On Tue, Jan 05, 2016 at 10:51:17AM +0200, Michael S. Tsirkin wrote:
> On Tue, Jan 05, 2016 at 09:36:55AM +0800, Boqun Feng wrote:
> > Hi Michael,
> >
> > On Thu, Dec 31, 2015 at 09:07:42PM +0200, Michael S. Tsirkin wrote:
> > > This defines __smp_xxx barriers for powerpc
> > > for use by
On Tue, 2016-01-05 at 16:23 +0100, Rabin Vincent wrote:
> The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
> instructions since it XORs A with X while all the others replace A with
> some loaded value. All the BPF JITs fail to clear A if this is used as
> the first instruction
On Tue, Jan 05, 2016 at 05:36:47PM +0100, Daniel Borkmann wrote:
> On 01/05/2016 04:23 PM, Rabin Vincent wrote:
> >The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
> >instructions since it XORs A with X while all the others replace A with
> >some loaded value. All the BPF JITs
On Tue, Jan 05, 2016 at 05:53:41PM +0800, Boqun Feng wrote:
> On Tue, Jan 05, 2016 at 10:51:17AM +0200, Michael S. Tsirkin wrote:
> > On Tue, Jan 05, 2016 at 09:36:55AM +0800, Boqun Feng wrote:
> > > Hi Michael,
> > >
> > > On Thu, Dec 31, 2015 at 09:07:42PM +0200, Michael S. Tsirkin wrote:
> > >
On Tue, Jan 05, 2016 at 04:39:37PM +0100, Christian Borntraeger wrote:
> On 01/05/2016 10:30 AM, Michael S. Tsirkin wrote:
>
> >
> > arch/s390/kernel/vdso.c:smp_mb();
> >
> > Looking at
> > Author: Christian Borntraeger
> > Date: Fri Sep 11 16:23:06
On 01/05/2016 05:03 PM, Rabin Vincent wrote:
On Tue, Jan 05, 2016 at 08:00:45AM -0800, Eric Dumazet wrote:
On Tue, 2016-01-05 at 16:23 +0100, Rabin Vincent wrote:
The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
instructions since it XORs A with X while all the others
On 01/05/2016 04:23 PM, Rabin Vincent wrote:
The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
instructions since it XORs A with X while all the others replace A with
some loaded value. All the BPF JITs fail to clear A if this is used as
the first instruction in a filter.
On 01/05/2016 10:30 AM, Michael S. Tsirkin wrote:
>
> arch/s390/kernel/vdso.c:smp_mb();
>
> Looking at
> Author: Christian Borntraeger
> Date: Fri Sep 11 16:23:06 2015 +0200
>
> s390/vdso: use correct memory barrier
>
> By
Timur,
On Thu, Dec 24, 2015 at 2:12 PM, Timur Tabi wrote:
> On Sun, Dec 20, 2015 at 2:30 PM, Maciej S. Szmigiero
> wrote:
>> SACNT register should be marked volatile since
>> its WR and RD bits are cleared by SSI after
>> completing the relevant
On Wed, Dec 02, 2015 at 09:18:05AM +1100, Michael Ellerman wrote:
>
> I (still) haven't had a chance to have a good look at it, but I won't this
> week
> anyway. So post v5 and hopefully I can review that and it will be perfect :)
The perfect v5 is there now, for 4 weeks minus the holiday
On Tue, 5 Jan 2016 15:04:43 +0200
"Michael S. Tsirkin" wrote:
> On Tue, Jan 05, 2016 at 01:08:52PM +0100, Martin Schwidefsky wrote:
> > On Tue, 5 Jan 2016 11:30:19 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > On Tue, Jan 05, 2016 at 09:13:19AM +0100, Martin
On Mon, Jan 04, 2016 at 01:59:34PM +, Russell King - ARM Linux wrote:
> On Mon, Jan 04, 2016 at 02:54:20PM +0100, Peter Zijlstra wrote:
> > On Mon, Jan 04, 2016 at 02:36:58PM +0100, Peter Zijlstra wrote:
> > > On Sun, Jan 03, 2016 at 11:12:44AM +0200, Michael S. Tsirkin wrote:
> > > > On Sat,
Shilpasri G Bhat writes:
> In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
> CPU when the chip crosses its thermal and power limits. Currently,
> powernv-cpufreq driver detects and reports this event as a console
> message. Some boxes may not
From: Rabin Vincent
Date: Tue, 5 Jan 2016 16:23:07 +0100
> The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
> instructions since it XORs A with X while all the others replace A with
> some loaded value. All the BPF JITs fail to clear A if this is used as
> the
The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
instructions since it XORs A with X while all the others replace A with
some loaded value. All the BPF JITs fail to clear A if this is used as
the first instruction in a filter. This was found using american fuzzy
lop.
Add a
On 2016/1/5 4:47, Alex Williamson wrote:
On Thu, 2015-12-31 at 16:50 +0800, Yongji Xie wrote:
When vfio passthrough a PCI device of which MMIO BARs
are smaller than PAGE_SIZE, guest will not handle the
mmio accesses to the BARs which leads to mmio emulations
in host.
This is because vfio will
On Tue, Jan 05, 2016 at 01:08:52PM +0100, Martin Schwidefsky wrote:
> On Tue, 5 Jan 2016 11:30:19 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Tue, Jan 05, 2016 at 09:13:19AM +0100, Martin Schwidefsky wrote:
> > > On Mon, 4 Jan 2016 22:18:58 +0200
> > > "Michael S. Tsirkin"
As sparse suggests, these should be made static.
Signed-off-by: Daniel Axtens
---
These are random fixes in arch/powerpc/kernel: there's no real
pattern to them. It doesn't fix everything.
---
arch/powerpc/kernel/eeh_event.c | 2 +-
arch/powerpc/kernel/ibmebus.c | 2 +-
Sometimes when sparse warns about undefined symbols, it isn't
because they should have 'static' added, it's because they're
overriding __weak symbols defined elsewhere, and the header has
been missed.
Fix a few of them by adding appropriate headers.
Signed-off-by: Daniel Axtens
On Tue, Jan 05, 2016 at 08:00:45AM -0800, Eric Dumazet wrote:
> On Tue, 2016-01-05 at 16:23 +0100, Rabin Vincent wrote:
> > The SKF_AD_ALU_XOR_X ancillary is not like the other ancillary data
> > instructions since it XORs A with X while all the others replace A with
> > some loaded value. All
Am 31.12.2015 um 20:07 schrieb Michael S. Tsirkin:
> On x86/um CONFIG_SMP is never defined. As a result, several macros
> match the asm-generic variant exactly. Drop the local definitions and
> pull in asm-generic/barrier.h instead.
>
> This is in preparation to refactoring this code area.
>
>
On Tue, 5 Jan 2016 11:30:19 +0200
"Michael S. Tsirkin" wrote:
> On Tue, Jan 05, 2016 at 09:13:19AM +0100, Martin Schwidefsky wrote:
> > On Mon, 4 Jan 2016 22:18:58 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > On Mon, Jan 04, 2016 at 02:45:25PM +0100, Peter
On Tue, Jan 05, 2016 at 06:16:48PM +0200, Michael S. Tsirkin wrote:
[snip]
> > > > Another thing is that smp_lwsync() may have a third user(other than
> > > > smp_load_acquire() and smp_store_release()):
> > > >
> > > > http://article.gmane.org/gmane.linux.ports.ppc.embedded/89877
> > > >
> > >
Hi all,
I will resend this one to avoid a potential conflict with:
http://article.gmane.org/gmane.linux.kernel/2116880
by open coding smp_lwsync() with:
__asm__ __volatile__(PPC_ACQUIRE_BARRIER "" : : : "memory");
Regards,
Boqun
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On powerpc, acquire and release semantics can be achieved with
lightweight barriers("lwsync" and "ctrl+isync"), which can be used to
implement __atomic_op_{acquire,release}.
For release semantics, since we only need to ensure all memory accesses
that issue before must take effects before the
On 06/01/16 11:45, Daniel Axtens wrote:
As sparse suggests, these should be made static.
Signed-off-by: Daniel Axtens
Reviewed-by: Andrew Donnellan
--
Andrew Donnellan Software Engineer, OzLabs
andrew.donnel...@au1.ibm.com
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