RE: [PATCH 3/4] char/tpm: Improve a size determination in nine functions

> On Fri, Oct 20, 2017 at 12:01:39PM +0300, Jarkko Sakkinen wrote: > > On Thu, Oct 19, 2017 at 04:58:23PM +, > alexander.stef...@infineon.com wrote: > > > > On Tue, Oct 17, 2017 at 11:50:05AM +, > alexander.stef...@infineon.com > > > > wrote: > > > > > > > Replace the specification of data

Re: [PATCH v2] kernel/module_64.c: Add REL24 relocation support of livepatch symbols

On Wed, Oct 18, 2017 at 11:47:35AM +0530, Kamalesh Babulal wrote: > > Consider a trivial patch, supplied to kpatch tool for generating a > livepatch module: > > --- a/fs/proc/meminfo.c > +++ b/fs/proc/meminfo.c > @@ -132,7 +132,7 @@ static int meminfo_proc_show(struct seq_file *m, void *v) >

Re: [PATCH v2] kernel/module_64.c: Add REL24 relocation support of livepatch symbols

On Fri, 2017-10-20 at 14:07 +0200, Torsten Duwe wrote: > On Wed, Oct 18, 2017 at 11:47:35AM +0530, Kamalesh Babulal wrote: > > > > Consider a trivial patch, supplied to kpatch tool for generating a > > livepatch module: > > > > --- a/fs/proc/meminfo.c > > +++ b/fs/proc/meminfo.c > > @@ -132,7

Re: [PATCH 1/4] powerpc/tm: Add commandline option to disable hardware transactional memory

On Fri, 2017-10-20 at 09:45 -0200, Breno Leitao wrote: > Mikey, Cyril, > > On Thu, Oct 12, 2017 at 09:17:16PM +1100, Michael Ellerman wrote: > > From: Cyril Bur > > > > Currently the kernel relies on firmware to inform it whether or not the > > CPU supports HTM and as long

Re: [PATCH 1/4] powerpc/tm: Add commandline option to disable hardware transactional memory

On Fri, 2017-10-20 at 12:58 +, David Laight wrote: > > > This patch adds a simple commandline option so that HTM can be > > > disabled at boot time. > > ISTM that being able to disable it after boot would be more useful. > (ie in a startup script) I agree bug unfortunately that's impossible.

Re: [PATCH 1/2] mm/mmu_notifier: avoid double notification when it is useless v2

On Thu, 2017-10-19 at 12:58 -0400, Jerome Glisse wrote: > On Thu, Oct 19, 2017 at 09:53:11PM +1100, Balbir Singh wrote: > > On Thu, Oct 19, 2017 at 2:28 PM, Jerome Glisse wrote: > > > On Thu, Oct 19, 2017 at 02:04:26PM +1100, Balbir Singh wrote: > > > > On Mon, 16 Oct 2017

Re: [PATCH v2 5/5] of/fdt: only store the device node basename in full_name

Hi Frank, > On Oct 20, 2017, at 00:46 , Frank Rowand wrote: > > On 10/19/17 13:06, Moritz Fischer wrote: > > < snip > > >> We also have plenty of code that is just not aware of overlays, and >> assumes certain parts of the tree to stay static. > > I would state that

Re: [PATCH 3/4] char/tpm: Improve a size determination in nine functions

On Thu, Oct 19, 2017 at 04:58:23PM +, alexander.stef...@infineon.com wrote: > > On Tue, Oct 17, 2017 at 11:50:05AM +, alexander.stef...@infineon.com > > wrote: > > > > > Replace the specification of data structures by pointer dereferences > > > > > as the parameter for the operator

Re: [PATCH] soc/qbman: Simplify bman_release()

Ping. On 10/07/17 09:28, Sebastian Huber wrote: Get the affine portal only once for the complete transaction. Signed-off-by: Sebastian Huber -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189

Re: [PATCH 2/2] powerpc/64s: idle skip POWER9 DD1 and DD2.0 specific workarounds on DD2.1

* Nicholas Piggin [2017-10-20 14:54:44]: > DD2.1 does not have to flush the ERAT after a state-loss idle. It also > does not have to save and restore MMCR0. > > Performance testing was done on a DD2.1 using only the stop0 idle state > (the shallowest state which supports

Re: [PATCH v2 13/18] powerpc: Add support for setting SPRN_TIDR

Le 07/10/2017 à 04:28, Sukadev Bhattiprolu a écrit : We need the SPRN_TIDR to be set for use with fast thread-wakeup (core- to-core wakeup) and also with CAPI. Each thread in a process needs to have a unique id within the process. But as explained below, for now, we assign globally unique

Re: [PATCH 3/4] char/tpm: Improve a size determination in nine functions

On Fri, Oct 20, 2017 at 12:01:39PM +0300, Jarkko Sakkinen wrote: > On Thu, Oct 19, 2017 at 04:58:23PM +, alexander.stef...@infineon.com > wrote: > > > On Tue, Oct 17, 2017 at 11:50:05AM +, alexander.stef...@infineon.com > > > wrote: > > > > > > Replace the specification of data structures

Re: [PATCH 1/4] powerpc/tm: Add commandline option to disable hardware transactional memory

Mikey, Cyril, On Thu, Oct 12, 2017 at 09:17:16PM +1100, Michael Ellerman wrote: > From: Cyril Bur > > Currently the kernel relies on firmware to inform it whether or not the > CPU supports HTM and as long as the kernel was built with > CONFIG_PPC_TRANSACTIONAL_MEM=y then it

Re: [PATCHv3 6/7] symbol lookup: use new kernel and module dereference functions

On Thu 2017-10-19 15:42:35, Sergey Senozhatsky wrote: > Sorry for the delay and thanks for taking a look. > > I'll try to re-spin the patch set by the end of this week/early next > week. > > > On (10/04/17 13:53), Petr Mladek wrote: > [..] > > Note that kallsyms_lookup() and

RE: [PATCH 1/4] powerpc/tm: Add commandline option to disable hardware transactional memory

> > This patch adds a simple commandline option so that HTM can be > > disabled at boot time. ISTM that being able to disable it after boot would be more useful. (ie in a startup script) David

Re: [PATCHv3 1/7] switch dereference_function_descriptor() to `unsigned long'

On Thu 2017-10-19 15:50:04, Sergey Senozhatsky wrote: > On (10/04/17 10:24), Petr Mladek wrote: > [..] > > To make it clear. All these comments are not a big deal and I do > > not want to invalidate all the acked-by and tested-by just because > > of them. > > > > But please, consider removing this

[PATCH v2 0/8] powerpc: Support ibm,dynamic-memory-v2 property

This patch set provides a set of updates to de-couple the LMB information provided in the ibm,dynamic-memory device tree property from the device tree property format. A part of this patch series introduces a new device tree property format for dynamic memory, ibm-dynamic-meory-v2. By separating

[PATCH v2 1/8] powerpc/numa: Look up device node in of_get_assoc_arrays()

Look up the device node for the associativity array property instead of having it passed in as a parameter. This changes precedes an update in which the calling routines for of_get_assoc_arrays() will not have the device node pointer to pass in. Signed-off-by: Nathan Fontenot

[PATCH v2 2/8] powerpc/numa: Look up device node in of_get_usable_memory()

Look up the device node for the usable memory property instead of having it passed in as a parameter. This changes precedes an update in which the calling routines for of_get_usable_memory() will not have the device node pointer to pass in. Signed-off-by: Nathan Fontenot

[PATCH v2 4/8] powerpc/numa: Update numa code use drmem LMB array

Update code in powerpc/numa.c to use the array of dynamic reconfiguration memory LMBs instead of parsing the device tree property directly. This allows for the removal of several helper routines used to read dynamic reconfiguration memory device tree property information and eases the gathering of

[PATCH v2 5/8] powerpc/pseries: Update memory hotplug code to use drmem LMB array

Update the pseries memory hotplug code to use the newly added dynamic reconfiguration LMB array. Doing this is required for the upcoming support of version 2 of the dynamic reconfiguration device tree property. In addition, making this change cleans up the code that parses the LMB information as

[PATCH v2 6/8] powerpc: Move of_drconf_cell struct to asm/drmem.h

Now that the powerpc code parses dynamic reconfiguration memory LMB information from the LMB array and not the device tree directly we can move the of_drconf_cell struct to drmem.h where it fits better. In addition, the struct is renamed to of_drconf_cell_v1 in anticipation of upcoming support

[PATCH v2 7/8] powerpc/pseries: Add support for ibm, dynamic-memory-v2 property

The Power Hypervisor has introduced a new device tree format for the property describing the dynamic reconfiguration LMBs for a system. This new format condenses the size of the property, especially on large memory systems. Instead of the current format that contains an entry for every possible

[PATCH v2 3/8] powerpc/mm: Separate ibm, dynamic-memory data from DT format

We currently have code to parse the dynamic reconfiguration LMB information from the ibm,dynamic-meory device tree property in multiple locations (numa.c, prom.c, and pseries/hotplug-memory.c). In anticipation of adding support for a version 2 of the ibm,dynamic-memory property this patch aims to

[PATCH v2 8/8] powerpc: Enable support of ibm,dynamic-memory-v2

Add required bits to the architecture vector to enable support of the ibm,dynamic-memory-v2 device tree property. Signed-off-by: Nathan Fontenot --- arch/powerpc/include/asm/firmware.h |3 ++- arch/powerpc/include/asm/prom.h |1 +

[Part1 PATCH v7 09/17] resource: Provide resource struct in resource walk callback

From: Tom Lendacky In prep for a new function that will need additional resource information during the resource walk, update the resource walk callback to pass the resource structure. Since the current callback start and end arguments are pulled from the resource

[PATCH v9 07/10] mm: Add address parameter to arch_validate_prot()

A protection flag may not be valid across entire address space and hence arch_validate_prot() might need the address a protection bit is being set on to ensure it is a valid protection flag. For example, sparc processors support memory corruption detection (as part of ADI feature) flag on memory