Hi there,
What is this warning all about (system is Mac Mini G4) ? Thanks
[3.265537] pata-macio 0.0002:ata-3: Activating pata-macio
chipset KeyLargo ATA-3, Apple bus ID 0
[3.272686] WARNING: CPU: 0 PID: 1 at
./include/linux/dma-mapping.h:516 dmam_alloc_coherent+0xd8/0x118
[
Hello David,
Thank you for your review and the heads up about protocol.
On 02/01/2018 05:59 PM, David Miller wrote:
From: Desnes Augusto Nunes do Rosario
Date: Thu, 1 Feb 2018 16:04:30 -0200
Older versions of VIOS servers do not send the firmware level in the
Hello Tyrel,
I concur with your observations, but since this patch has already been
merged, I'll address them in another patch.
Thank you for your review,
On 02/01/2018 07:02 PM, Tyrel Datwyler wrote:
On 02/01/2018 10:04 AM, Desnes Augusto Nunes do Rosario wrote:
Older versions of VIOS
On Fri, Feb 2, 2018 at 6:46 PM, Christoph Hellwig wrote:
> On Fri, Feb 02, 2018 at 02:11:33PM +0100, Mathieu Malaterre wrote:
>> Hi there,
>>
>> What is this warning all about (system is Mac Mini G4) ? Thanks
>
> What kernel version is this?
I've synced with git/master this morning
Hmm. This adds a
static inline void pci_uevent_ers(struct pci_dev *pdev, ..
to include/linux/pci.h.
Why?
You do realize that that header file is included by almost every
driver out there. Why is that magical function *so* important that it
needs to be an inline function, and those strings
On Fri, Feb 02, 2018 at 02:11:33PM +0100, Mathieu Malaterre wrote:
> Hi there,
>
> What is this warning all about (system is Mac Mini G4) ? Thanks
What kernel version is this?
On Fri, Feb 02, 2018 at 07:06:14PM +0100, Mathieu Malaterre wrote:
> On Fri, Feb 2, 2018 at 6:46 PM, Christoph Hellwig wrote:
> > On Fri, Feb 02, 2018 at 02:11:33PM +0100, Mathieu Malaterre wrote:
> >> Hi there,
> >>
> >> What is this warning all about (system is Mac Mini G4) ?
On 01/12/2018 12:42 AM, Christoph Hellwig wrote:
> To implement the x86 forbid_dac and iommu_sac_force we want an arch hook
> so that it can apply the global options across all dma_map_ops
> implementations.
>
> Signed-off-by: Christoph Hellwig
> ---
>
On 02/02/2018 06:37 AM, Desnes Augusto Nunes do Rosário wrote:
> Hello Tyrel,
>
> I concur with your observations, but since this patch has already been
> merged, I'll address them in another patch.
Fair enough. I didn't realize David had already merged it till after I sent my
review.
-Tyrel
Hi Linus,
Please pull powerpc updates for 4.16.
We've added a new driver in drivers/misc, which Greg was OK for us to
merge via powerpc, though it has still resulted in a trivial
conflict in the Makefile and Kconfig.
There's also a conflict with the nvdimm tree, which you haven't merged
yet
On 2/1/2018 9:29 PM, ebied...@xmission.com wrote:
> Khalid Aziz writes:
>
>> V11 changes:
>> This series is same as v10 and was simply rebased on 4.15 kernel. Can
>> mm maintainers please review patches 2, 7, 8 and 9 which are arch
>> independent, and include/linux/mm.h
On 02/01/2018 07:29 PM, ebied...@xmission.com wrote:
Khalid Aziz writes:
V11 changes:
This series is same as v10 and was simply rebased on 4.15 kernel. Can
mm maintainers please review patches 2, 7, 8 and 9 which are arch
independent, and include/linux/mm.h and
The soft IRQ masking code has to hard-disable interrupts in cases
where the exception is not cleared by the masked handler. External
interrupts used this approach for soft masking. Now recently PMU
interrupts do the same thing.
The soft IRQ masking code additionally allowed for interrupt handlers
This is a new CPU feature advertising interface that is fine-grained,
extensible, aware of privilege levels, and gives control of features
to all levels of the stack (firmware, hypervisor, and OS).
The design and binding specification is described in detail in doc/.
Signed-off-by: Nicholas
On Sat, 3 Feb 2018 14:27:32 +1000
Nicholas Piggin wrote:
> diff --git a/core/cpufeatures.c b/core/cpufeatures.c
> new file mode 100644
> index 0..ca9df91f0
> --- /dev/null
> +++ b/core/cpufeatures.c
> @@ -0,0 +1,932 @@
> +/* Copyright 2017 IBM Corp.
> + *
> + *
These were intended for use by KVM, but it has its own LPID
flushing code and never used these.
Cc: Aneesh Kumar K.V
Signed-off-by: Nicholas Piggin
---
.../powerpc/include/asm/book3s/64/tlbflush-radix.h | 3 --
arch/powerpc/mm/tlb-radix.c
On Fri, Feb 02, 2018 at 11:30:18AM +1100, Paul Mackerras wrote:
> On Thu, Feb 01, 2018 at 04:15:38PM -0200, Jose Ricardo Ziviani wrote:
> > v5:
> > - Fixed the mask off of the effective address
> >
> > v4:
> > - Changed KVM_MMIO_REG_VMX to 0xc0 because there are 64 VSX registers
> >
> > v3:
>
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