On Tue, Mar 27, 2018 at 10:59:40AM +1100, Benjamin Herrenschmidt wrote:
> On Mon, 2018-03-26 at 16:50 -0600, Jason Gunthorpe wrote:
> > On Tue, Mar 27, 2018 at 09:36:11AM +1100, Benjamin Herrenschmidt wrote:
> > > On Mon, 2018-03-26 at 16:27 -0600, Jason Gunthorpe wrote:
> > > > > Otherwise almost
Return H_P2 on a h_set_mode(SET_DAWR) on POWER9 where the DAWR is
disabled.
Current Linux guests ignore this error, so they will silently not get
the DAWR (sigh). The same error code is being used by POWERVM in this
case.
Signed-off-by: Michael Neuling
---
On Mon, Mar 26, 2018 at 04:31:41PM -0700, Ram Pai wrote:
> Applications need the ability to associate an address-range with some
> key and latter revert to its initial default key. Pkey-0 comes close to
> providing this function but falls short, because the current
> implementation disallows
When mprotect(,PROT_EXEC) is called, the kernel allocates a
execute-only pkey and associates the pkey with the given address space.
The permission of this key should not be modifiable from userspace.
However a bug in the current implementation lets the permissions on the
key modifiable from
Add ppc_breakpoint_available() to determine if a breakpoint is
available currently via the DAWR or DABR.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/debug.h | 1 +
arch/powerpc/kernel/process.c| 12
2 files changed, 13 insertions(+)
diff
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the powerpc tree got a conflict in:
>
> arch/powerpc/include/asm/cputable.h
> arch/powerpc/kernel/dt_cpu_ftrs.c
>
> between commit:
>
> a5d4b5891c2f ("powerpc/mm: Fixup tlbie vs store ordering issue
thread_pkey_regs_init() initializes the pkey related registers
instead of initializing the fields in the task structures. Fortunately
those key related registers are re-set to zero when the task
gets scheduled on the cpu. However its good to fix this glaringly
visible error.
cc: Michael Ellermen
On Mon, Mar 26, 2018 at 4:37 PM, John Paul Adrian Glaubitz
wrote:
>
> What about a tarball with a minimal Debian x32 chroot? Then you can
> install interesting packages you would like to test yourself.
That probably works fine.
Linus
On Tue, Mar 27, 2018 at 1:36 PM, Ram Pai wrote:
> thread_pkey_regs_init() initializes the pkey related registers
> instead of initializing the fields in the task structures. Fortunately
> those key related registers are re-set to zero when the task
> gets scheduled on the
Using the DAWR on POWER9 can cause xstops, hence we need to disable
it.
The current CPU_FTR for DAWR is a bit messy. Despite having
CPU_FTR_DAWR, currently we assume DAWR exists in the KVM code based on
CPU_FTR_ARCH_207. In other places we assume DAWR exists if
CPU_FTR_DAWR is set.
This attempts
On Sun, Mar 25, 2018 at 8:44 PM, John Paul Adrian Glaubitz
wrote:
<
> FWIW, we are maintaining an x32 port in Debian and there are some people
> actually using it [1]. There is one build instance running on VMWare that
> I am hosting [2] and around 10800 out of 12900
On Mon, Mar 26, 2018 at 02:44:48PM -0700, David Rientjes wrote:
> On Tue, 13 Mar 2018, Laurent Dufour wrote:
>
> > Add support for the new speculative faults event.
> >
> > Signed-off-by: Laurent Dufour
>
> Acked-by: David Rientjes
>
> Aside:
On Tue, Mar 27, 2018 at 2:48 PM, Michael Ellerman wrote:
> Ram Pai writes:
>
>> On Fri, Mar 16, 2018 at 10:02:22PM +1100, Balbir Singh wrote:
>>> On Fri, Mar 16, 2018 at 9:33 PM, Ram Pai wrote:
>>> > Applications need the ability to
We've had dynamic ftrace support for over 9 years since Steve first
wrote it, all the distros use dynamic, and static is basically
untested these days, so drop support for static ftrace.
Signed-off-by: Michael Ellerman
---
arch/powerpc/Kconfig | 1
The 'bd' command will now print an error and not set the breakpoint on
P9.
Signed-off-by: Michael Neuling
---
arch/powerpc/xmon/xmon.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index a06cf6e389..047a682c6d
This updates the ptrace code to use ppc_breakpoint_available().
We now advertise via PPC_PTRACE_GETHWDBGINFO zero breakpoints when the
DAWR is missing (ie. POWER9). This results in GDB falling back to
software emulation of the breakpoint (which is slow).
For the features advertised by
POWER9 with the DAWR disabled causes problems for partition
migration. Either we have to fail the migration (since we lose the
DAWR) or we silently drop the DAWR and allow the migration to pass.
This patch does the latter and allows the migration to pass (at the
cost of silently losing the DAWR).
Using the DAWR on POWER9 can cause xstops, hence we need to disable
it.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/cputable.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/cputable.h
This disables the DAWR on all POWER9 CPUs via cpu feature quirk.
Using the DAWR on POWER9 can cause xstops, hence we need to disable
it.
Signed-off-by: Michael Neuling
---
arch/powerpc/kernel/dt_cpu_ftrs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
On 03/27/2018 12:40 PM, Linus Torvalds wrote:
> On Mon, Mar 26, 2018 at 4:37 PM, John Paul Adrian Glaubitz
> wrote:
>>
>> What about a tarball with a minimal Debian x32 chroot? Then you can
>> install interesting packages you would like to test yourself.
>
> That
Applications need the ability to associate an address-range with some
key and latter revert to its initial default key. Pkey-0 comes close to
providing this function but falls short, because the current
implementation disallows applications to explicitly associate pkey-0 to
the address range.
On 03/27/2018 10:03 AM, Linus Torvalds wrote:
> Hmm. Do you have a few statically built binaries that could be tested
> without installing a whole distribution? Something real and meaningful
> enough that it actually exercised a few real system calls, but not
> something that needs to bring in 50
Ram Pai writes:
> On Fri, Mar 16, 2018 at 10:02:22PM +1100, Balbir Singh wrote:
>> On Fri, Mar 16, 2018 at 9:33 PM, Ram Pai wrote:
>> > Applications need the ability to associate an address-range with some
>> > key and latter revert to its initial
POWER7 compat mode guests can use h_set_dabr on POWER9. POWER9 should
use the DAWR but since it's disabled there we can't.
This returns H_UNSUPPORTED on a h_set_dabr() on POWER9 where the DAWR
is disabled.
Current Linux guests ignore this error, so they will silently not get
the DAWR (sigh). The
On Mon, 2018-03-26 at 15:17 +1100, Michael Neuling wrote:
> The current EEH callbacks can race with a driver unbind. This
> can result in a backtraces like this:
>
> [7.573055] EEH: Frozen PHB#0-PE#1fc detected
> [7.573063] EEH: PE location: S09, PHB location: N/A
> [7.573069]
Now that we have feature flags for security related things, set or
clear them based on what we see in the device tree provided by
firmware.
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/powernv/setup.c | 56 ++
1 file changed, 56
For addresses above 512TB we allocate additional mmu contexts. To make
it all easy, addresses above 512TB are handled with IR/DR=1 and with
stack frame setup.
The mmu_context_t is also updated to track the new extended_ids. To
support upto 4PB we need a total 8 contexts.
Signed-off-by: Aneesh
Hi Yury,
On Sun, Mar 25, 2018 at 08:50:04PM +0300, Yury Norov wrote:
> kick_all_cpus_sync() forces all CPUs to sync caches by sending broadcast IPI.
> If CPU is in extended quiescent state (idle task or nohz_full userspace), this
> work may be done at the exit of this state. Delaying
On Mon, Mar 26, 2018 at 04:47:50AM +0100, Al Viro wrote:
> * mips n32 and x86 x32 can become an extra source of headache.
> That actually applies to any plans of passing struct pt_regs *. As it
> is, e.g. syscall 515 on amd64 is compat_sys_readv(). Dispatched via
> this:
> /*
>
Now that we have feature flags for security related things, set or
clear them based on what we receive from the hypercall.
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/pseries/setup.c | 43 ++
1 file changed, 43 insertions(+)
Add a definition for cpu_show_spectre_v2() to override the generic
version. This has several permuations, though in practice some may not
occur we cater for any combination.
The most verbose is:
Mitigation: Indirect branch serialisation (kernel only), Indirect
branch cache disabled, ori31
This patch increases the max virtual (effective) address value to 4PB.
With 4K page size config we continue to limit ourself to 64TB.
Signed-off-by: Aneesh Kumar K.V
[mpe: Keep the H_PGTABLE_RANGE test, update it to work]
Signed-off-by: Michael Ellerman
On Wed, 2018-03-21 at 10:31:59 UTC, Paul Mackerras wrote:
> This adds a CPU feature bit which is set for POWER9 "Nimbus" DD2.2
> processors which will be used to enable the hypervisor to assist
> hardware with the handling of checkpointed register values while the
> CPU is in suspend state, in
This landed in setup_64.c for no good reason other than we had nowhere
else to put it. Now that we have a security-related file, that is a
better place for it so move it.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/security.c | 12
Now that we have the security feature flags we can make the
information displayed in the "meltdown" file more informative.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/security_features.h | 1 +
arch/powerpc/kernel/security.c | 30
On Fri 23-03-18 20:55:49, Ilya Smith wrote:
>
> > On 23 Mar 2018, at 15:48, Matthew Wilcox wrote:
> >
> > On Thu, Mar 22, 2018 at 07:36:36PM +0300, Ilya Smith wrote:
> >> Current implementation doesn't randomize address returned by mmap.
> >> All the entropy ends with
In a following patch, on finding a free area we will need to do
allocatinon of extra contexts as needed. Consolidating the return path
for slice_get_unmapped_area() will make that easier.
Split into a separate patch to make review easy.
Signed-off-by: Aneesh Kumar K.V
On Sun, Mar 25, 2018 at 5:47 PM, Al Viro wrote:
>
> Linus, Dominik - how do you plan dealing with that fun?
Secretly, I was hoping to kill x32, because it's not being used afaik.
More realistically, I was thinking we'd just use a separate table or
system calls, and
This commit adds security feature flags to reflect the settings we
receive from firmware regarding Spectre/Meltdown mitigations.
The feature names reflect the names we are given by firmware on bare
metal machines. See the hostboot source for details.
Arguably these could be firmware features,
Add a definition for cpu_show_spectre_v1() to override the generic
version. Currently this just prints "Not affected" or "Vulnerable"
based on the firmware flag.
Although the kernel does have array_index_nospec() in a few places, we
haven't yet audited all the powerpc code to see where it's
We need to zero-out pgd table only if we share the slab cache with
pud/pmd level caches. With the support of 4PB, we don't share the slab
cache anymore. Instead of removing the code completely hide it within
an #ifdef. We don't need to do this with any other page table level,
because they all
On Mon, 2018-03-19 at 21:46:11 UTC, Paul Mackerras wrote:
> All PowerPC CPUs other than the original PPC601 have a timebase
> register rather than the "real-time clock" (RTC) register that the
> PPC601 (and the original POWER and POWER2 CPUs) had. Currently
> we have a CPU feature bit to indicate
Add some additional values which have been defined for the
H_GET_CPU_CHARACTERISTICS hypercall.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/hvcall.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/hvcall.h
Now that we have the security flags we can simplify the code in
pseries_setup_rfi_flush() because the security flags have pessimistic
defaults.
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/pseries/setup.c | 39 ++
1 file
Paul Mackerras writes:
> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> index fb9f58b..0590417 100644
> --- a/arch/powerpc/lib/sstep.c
> +++ b/arch/powerpc/lib/sstep.c
> @@ -2755,8 +2761,11 @@ int emulate_loadstore(struct pt_regs *regs, struct
>
This patch series extended the max virtual address space value from 512TB
to 4PB with 64K page size. We do that by allocating one vsid context for
each 512TB range. More details of that is explained in patch 3.
Changes from V5:
* Fix for loop segmentation fault.
* updates from Michael
Changes
On Sun, Mar 25, 2018 at 8:15 PM, Linus Torvalds
wrote:
>
> HOWEVER.
>
> I didn't actually test any of the compat or x32 ones, and the way I
> did it there also was no type-checking or other automated catching of
> getting it wrong. So it's almost certainly
Hi Linus!
On 03/26/2018 03:15 PM, Linus Torvalds wrote:
> Secretly, I was hoping to kill x32, because it's not being used afaik.
FWIW, we are maintaining an x32 port in Debian and there are some people
actually using it [1]. There is one build instance running on VMWare that
I am hosting [2] and
Now that we have the security flags we can significantly simplify the
code in pnv_setup_rfi_flush(), because we can use the flags instead of
checking device tree properties and because the security flags have
pessimistic defaults.
Signed-off-by: Michael Ellerman
---
On Fri, 2018-03-16 at 17:38 -0300, Thiago Jung Bauermann wrote:
> This patch actually implements the appraise_type=imasig|modsig option,
> allowing IMA to read and verify modsig signatures.
>
> In case both are present in the same file, IMA will first check whether the
> key used by the xattr
Hi Ben
On Sat, Mar 24, 2018 at 3:19 AM, Benjamin Herrenschmidt
wrote:
> On Fri, 2018-03-23 at 07:41 -0500, Jared Bents wrote:
>> Thank you for the advice. Looks like I get to try to rewrite the ath9k and
>> ath10k drivers to use dma_alloc_coherent() instead of
On Wed, Mar 21, 2018 at 2:58 PM, Sinan Kaya wrote:
> On 3/21/2018 8:53 AM, Sinan Kaya wrote:
>> BTW, I have no idea what compiler barrier does on PPC and if
>>
>> wrltel() == compiler barrier() + wrltel_relaxed()
>>
>> can be said.
>
> this should have been
>
>
> > This is a super performance critical operation for most drivers and
> > directly impacts network performance.
Perhaps there ought to be writel_nobarrier() (etc) that never contain
any barriers at all.
This might mean that they are always just the memory operation,
but it would make it more
Hi Ben,
I don't seem to have the beginning of this thread, so please bounce it over
if you'd like me to look at it!
On Fri, Mar 23, 2018 at 11:16:08AM +1100, Benjamin Herrenschmidt wrote:
> On Thu, 2018-03-22 at 12:51 -0500, Sinan Kaya wrote:
> > On 3/22/2018 8:52 AM, Benjamin Herrenschmidt
On 2018-03-26 07:44, Will Deacon wrote:
Hi Ben,
I don't seem to have the beginning of this thread, so please bounce it
over
if you'd like me to look at it!
https://www.spinics.net/lists/linux-rdma/msg62570.html
https://www.spinics.net/lists/linux-rdma/index.html#62666
On Fri, Mar 23,
On Fri, 2018-03-16 at 17:38 -0300, Thiago Jung Bauermann wrote:
> Define new "d-sig" template field which holds the digest that is expected
> to match the one contained in the modsig.
>
> Also add modsig support to the "sig" template field, allowing the the
> contents of the modsig to be included
On Sun, Mar 25, 2018 at 11:11:54PM +0300, Yury Norov wrote:
> On Sun, Mar 25, 2018 at 12:23:28PM -0700, Paul E. McKenney wrote:
> > On Sun, Mar 25, 2018 at 08:50:04PM +0300, Yury Norov wrote:
> > > kick_all_cpus_sync() forces all CPUs to sync caches by sending broadcast
> > > IPI.
> > > If CPU is
The number of interrupts requested for user contexts are stored in the
context specific structures and utilized to manage the interrupts. For the
master contexts, this number is only used once and therefore not saved.
To prepare for future commits where the number of interrupts will be
required
Allocate a file descriptor for an adapter context when requested. In order
to allocate inodes for the file descriptors, a pseudo filesystem is created
and used.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
The cxlflash userspace API requires that users be able to poll the adapter
context for any pending events or interrupts from the AFU. Support polling
on various events by implementing the AFU poll fop using a waitqueue.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R.
Similar to user contexts, master contexts also require that the per-context
LISN registers be programmed for certain AFUs. The mapped trigger page is
obtained from underlying transport and registered with AFU for each master
context.
Signed-off-by: Uma Krishnan
The following Oops can occur if an internal command sent to the AFU does
not complete within the timeout:
[c00ff101b810] c00816020d94 term_mc+0xfc/0x1b0 [cxlflash]
[c00ff101b8a0] c00816020fb0 term_afu+0x168/0x280 [cxlflash]
[c00ff101b930] c008160232ec
On Mon, Mar 26, 2018 at 11:08:45AM +, David Laight wrote:
> > > This is a super performance critical operation for most drivers and
> > > directly impacts network performance.
>
> Perhaps there ought to be writel_nobarrier() (etc) that never contain
> any barriers at all.
> This might mean
On 3/26/2018 8:11 AM, ok...@codeaurora.org wrote:
> On 2018-03-26 07:44, Will Deacon wrote:
>> Hi Ben,
>>
>> I don't seem to have the beginning of this thread, so please bounce it over
>> if you'd like me to look at it!
>>
>
> https://www.spinics.net/lists/linux-rdma/msg62570.html
>
>
From: "Matthew R. Ochs"
The SISLite specification originally defined the context control
register with a single field of bits to represent the LISN and
also stipulated that the register reset value be 0. The cxlflash
driver took advantage of this when programming the
When an adapter is initialized, transport specific configuration and MMIO
mapping details need to be saved. For CXL, this data is managed by the
underlying kernel module. To maintain a separation between the cxlflash
core and underlying transports, introduce a new structure to store data
specific
The host AFU configuration is read on the initialization path to identify
the features and configuration of the AFU. This data is cached for use in
later configuration steps.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
Per the OCXL specification, the maximum PASID supported by the AFU is
indicated by a field within the configuration space. Similar to acTags,
implementations can choose to use any sub-range of PASID within their
assigned range. For cxlflash, the entire range is used.
Signed-off-by: Uma Krishnan
Provide means to obtain the process element of an adapter context as well
as locate an adapter context by file.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
drivers/scsi/cxlflash/ocxl_hw.c | 26 ++
1
When the AFU is configured, the global and per process MMIO regions
are presented by the configuration space. Save these regions and
map the global MMIO region that is used to access all of the control
and provisioning data in the AFU.
Signed-off-by: Uma Krishnan
The first function of the link needs to configure the transaction layer
between the host and device. This is accomplished by a call to the OCXL
provider services.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
Add support to allocate and free AFU interrupts using the OCXL provider
services. The trigger page returned upon successful allocation will be
mapped and exposed to the cxlflash core in a future commit.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
The SISLite specification has been updated for OCXL to support
communicating data to generate AFU interrupts to the AFU. This includes
a new capability bit that is advertised for OCXL AFUs and new registers
to hold the object handle and translation PASID of each interrupt. For
Power, the object
In order to protect the OCXL hardware contexts from getting clobbered,
a simple state machine is added to indicate when a context is in open,
close or start state. The expected states are validated throughout the
code to prevent illegal operations on a context. A mutex is added to
protect writes
This patch series adds OCXL support to the cxlflash driver. With this
support, new devices using the OCXL transport will be supported by the
cxlflash driver along with the existing CXL devices. An effort is made
to keep this transport specific function independent of the existing
core driver that
Add initial infrastructure to support a new cxlflash transport, OCXL.
Claim a dependency on OCXL and add a new file, ocxl_hw.c, which will host
the backend routines that are specific to OCXL.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
Per the OCXL specification, the underlying host can have multiple AFUs
per function with each function supporting its own configuration. The host
function configuration is read on the initialization path to evaluate the
number of functions present and identify the features and configuration of
the
A range of PASIDs are used as identifiers for the adapter contexts. These
contexts may be destroyed and created randomly. Use an IDR to keep track
of contexts that are in use and assign a unique identifier to new ones.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R.
On a PERST, the AFU image can be reloaded or left intact. Provide means to
set this image reload policy.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
drivers/scsi/cxlflash/ocxl_hw.c | 13 +
Once the adapter context is created, it needs to be started by assigning
the MMIO space for the context and by enabling the process element in the
link. This commit adds the skeleton for starting the context and assigns
the context specific MMIO space. Master contexts have access to the global
Once the context is started, the assigned MMIO space can be mapped
and unmapped. Provide means to map and unmap the context MMIO space.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
drivers/scsi/cxlflash/ocxl_hw.c | 24
User contexts request interrupts and are started using the "start work"
interface. Populate the start_work() fop to allocate and map interrupts
before starting the user context. As part of starting the context, update
the user process identification logic to properly derive the data required
by
The cxlflash core fop API requires a way to invoke the fault and release
handlers of underlying transports using their native file-based APIs. This
provides the core with the ability to insert selectively itself into the
processing stream of these operations for cleanup. Implement these two
fops
The SISLite specification has been updated to define new synchronous
interrupt status bits. These bits are set by the AFU when a given PASID or
EA is bad and a synchronous interrupt is triggered.
The SISLite header file is updated to support these new bits. Note that
there are also some
While enabling a context on the link, a predefined callback can be
registered with the OCXL provider services to be notified on translation
errors. These errors can in turn be passed back to the user on a read
operation.
Signed-off-by: Uma Krishnan
Acked-by: Matthew
The following Oops can be encountered if a device removal or system
shutdown is initiated while an EEH recovery is in process:
[c00ff2f479c0] c00815256f18 cxlflash_pci_slot_reset+0xa0/0x100
[cxlflash]
[c00ff2f47a30] c0080dae22e0
The following Oops can occur when there is heavy I/O traffic and the host
is reset by a tool such as sg_reset.
[c000200fff3fbc90] c0081690117c process_cmd_doneq+0x104/0x500
[cxlflash] (unreliable)
[c000200fff3fbd80] c00816901648
The OCXL specification supports distributing acTags amongst different
AFUs and functions on the link. The platform-specific acTag range for the
link is obtained using the OCXL provider services and then assigned to the
host function based on implementation.
Signed-off-by: Uma Krishnan
The OCXL specification supports distributing acTags amongst different
AFUs and functions on the link. As cxlflash devices are expected to only
support a single AFU per function, the entire range that was assigned to
the function is also assigned to the AFU.
Signed-off-by: Uma Krishnan
Add support to create and release the adapter contexts for OCXL and
provide means to specify certain contexts as a master.
The existing cxlflash core has a design requirement that each host will
have a single host context available by default. To satisfy this
requirement, one host adapter context
The AFU should be enabled following a successful configuration and
disabled near the end of the cleanup path.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
Reviewed-by: Frederic Barrat
---
As part of the context lifecycle, the associated process element within
the Shared Process Area (SPA) of the link must be updated. Each process
is defined by various parameters (pid, tid, PASID mm) that are stored in
the SPA upon starting a context and invalidated when a context is stopped.
Use
Add support to map and unmap the irq space and manage irq registrations
with the kernel for each allocated AFU interrupt. Also support mapping
the physical trigger page to obtain an effective address that will be
provided to the cxlflash core in a future commit.
Signed-off-by: Uma Krishnan
The cxlflash userspace API requires that users be able to read the adapter
context for any pending events or interrupts from the AFU. Support reading
various events by implementing the AFU read fop to copy out event data.
Signed-off-by: Uma Krishnan
Acked-by: Matthew
OCXL requires that AFUs use an opaque object handle to represent
an AFU interrupt. The specification does not provide a common means
to communicate the object handle to the AFU - each AFU must define
this within the AFU specification. To support this model, the object
handle must be passed back to
The cxlflash core driver resets the AFU when the master contexts are
created in the initialization or recovery paths. Today, the OCXL
provider service to perform this operation is pending implementation.
To avoid a crash due to a missing fop, log an error once and return
success to continue with
Checkpatch throws a warning when the argument identifier names are not
included in the function definitions.
To avoid these warnings, argument identifiers are added in the existing
function definitions.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
Use the PCI VPD services to support reading the VPD data of the
underlying adapter.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
---
drivers/scsi/cxlflash/ocxl_hw.c | 15 +++
1 file changed, 15 insertions(+)
diff
After reading and modifying the function configuration, setup the OCXL
link using the OCXL provider services. The link is released when the
adapter is unconfigured.
Signed-off-by: Uma Krishnan
Acked-by: Matthew R. Ochs
Reviewed-by: Frederic
The cxlflash userspace API requires that users be able to mmap and release
the adapter context. Support mapping by implementing the AFU mmap fop to
map the context MMIO space and install the corresponding page table entry
upon page fault. Similarly, implement the AFU release fop to terminate and
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