On 23/08/18 21:56, Michael Ellerman wrote:
Christophe LEROY writes:
Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe LEROY wrote:
The only small problème I have is that some version of GCC seems to
complain about big memset() (132k and
On Thu, Aug 23, 2018 at 11:32:16PM +1000, Andrew Donnellan wrote:
> On 23/08/18 21:56, Michael Ellerman wrote:
> >Christophe LEROY writes:
> >
> >>Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
> >>>On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe LEROY wrote:
> The only small
On Thu, 2018-08-23 at 00:08:58 UTC, Paul Mackerras wrote:
> Commit 76fa4975f3ed ("KVM: PPC: Check if IOMMU page is contained in the
> pinned physical page", 2018-07-17) added some checks to ensure that guest
> DMA mappings don't attempt to map more than the guest is entitled to
> access. However,
On Wed, 2018-08-22 at 17:16:04 UTC, "Aneesh Kumar K.V" wrote:
> When splitting a huge pmd pte, we need to mark the pmd entry invalid. We
> can do that by clearing _PAGE_PRESENT bit. But then that will be taken as a
> swap pte. In order to differentiate between the two use a software pte bit
> when
On Thu, 2018-08-23 at 04:56:08 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> With the powrpc next commit e7e81847478 (poewrpc/mce: Fix SLB rebolting
> during MCE recovery path.), the SLB error recovery is broken. The new
> change now does not add index value to RB[52-63] that
> -Original Message-
> From: Rob Herring
> Sent: Wednesday, August 22, 2018 2:15 AM
> To: Vabhav Sharma
> Cc: linux-ker...@vger.kernel.org; devicet...@vger.kernel.org; Mark Rutland
> ; linuxppc-dev ;
> moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Le 23/08/2018 à 16:41, Segher Boessenkool a écrit :
On Thu, Aug 23, 2018 at 11:32:16PM +1000, Andrew Donnellan wrote:
On 23/08/18 21:56, Michael Ellerman wrote:
Christophe LEROY writes:
Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
On Thu, Aug 23, 2018 at 11:40:22AM +0200,
On Tue, 2018-08-21 at 13:03:23 UTC, Christophe Leroy wrote:
> Commit 5769beaf180a8 ("powerpc/mm: Add proper pte access check helper
> for other platforms") replaced generic pte_access_permitted() by an
> arch specific one.
>
> The generic one is defined as
> (pte_present(pte) && (!(write) ||
> -Original Message-
> From: Sudeep Holla
> Sent: Tuesday, August 21, 2018 3:47 PM
> To: Vabhav Sharma
> Cc: linux-ker...@vger.kernel.org; devicet...@vger.kernel.org;
> robh...@kernel.org; mark.rutl...@arm.com; linuxppc-dev@lists.ozlabs.org;
> linux-arm-ker...@lists.infradead.org;
On 08/23/2018 05:35 PM, Michael Ellerman wrote:
> Mahesh Jagannath Salgaonkar writes:
>
>> On 08/23/2018 12:14 PM, Michael Ellerman wrote:
>>> Mahesh J Salgaonkar writes:
>>>
From: Mahesh Salgaonkar
With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
On 23/08/2018 12:47, Benjamin Herrenschmidt wrote:
On Thu, 2018-08-23 at 06:43 -0500, Rob Herring wrote:
On Thu, Aug 23, 2018 at 4:02 AM Grant Likely wrote:
What problem are you trying to solve?
I'm looking at removing device_node.name and using full_name instead
(which now is only the
This series contains preliminary work to enable Secure Virtual Machines
(SVM) on powerpc. SVMs request to be migrated to secure memory very early in
the boot process (in prom_init()), so by default all of their memory is
inaccessible to the hypervisor. There is an ultravisor call that the VM can
From: Anshuman Khandual
LPPACA structures need to be shared with the host. Hence they need to be on
shared memory. Instead of allocating individual chunks of memory for given
structure from memblock, a contiguous chunk of memory is allocated and then
converted into shared memory. Subsequent
Helps document what the hard-coded number means.
Suggested-by: Alexey Kardashevskiy
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/kernel/paca.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index
On 23/08/2018 13:08, Rob Herring wrote:
On Thu, Aug 23, 2018 at 6:48 AM Benjamin Herrenschmidt
wrote:
On Thu, 2018-08-23 at 06:43 -0500, Rob Herring wrote:
On Thu, Aug 23, 2018 at 4:02 AM Grant Likely wrote:
What problem are you trying to solve?
I'm looking at removing device_node.name
From: Anshuman Khandual
Ultravisor based secure guest platforms will use generic SWIOTLB DMA API
(i.e swiotlb_dma_ops structure) available under the CONFIG_DMA_DIRECT_OPS
config. Also base CONFIG_SWIOTLB needs to be explicitly selected as well.
Select both these config options on powerpc server
From: Anshuman Khandual
Add the following helper functions to convert PAGE_SIZE aligned memory
buffers as shared or secure (i.e., accessible to the hypervisor or not) via
Ultravisor calls.
1. mem_convert_shared(unsigned long pfn, unsigned long npages)
2. mem_convert_secure(unsigned long pfn,
From: Anshuman Khandual
Hook the shared memory conversion functions into the ARCH_HAS_MEM_ENCRYPT
framework and call swiotlb_update_mem_attributes() to convert SWIOTLB's
buffers to shared memory.
Signed-off-by: Anshuman Khandual
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/Kconfig
On 09/08/2018 14:41, Alexey Kardashevskiy wrote:
>
>
> On 25/07/2018 19:50, Alexey Kardashevskiy wrote:
>> I am trying to pass through a 3D controller:
>> [0302]: NVIDIA Corporation GV100GL [Tesla V100 SXM2] [10de:1db1] (rev a1)
>>
>> which has a quite unique feature as coherent memory
From: Anshuman Khandual
SWIOTLB buffer default size (64MB) is not enough for large sequential write
operations which eventually leads to kernel crash like here.
virtio-pci :00:05.0: swiotlb buffer is full (sz: 327680 bytes)
virtio-pci :00:05.0: DMA: Out of SW-IOMMU space for 327680
On 23/08/2018 02:29, Benjamin Herrenschmidt wrote:
On Wed, 2018-08-22 at 20:26 -0500, Rob Herring wrote:
On Wed, Aug 22, 2018 at 8:14 PM Benjamin Herrenschmidt
wrote:
On Wed, 2018-08-22 at 19:47 -0500, Rob Herring wrote:
The default DT string handling in the kernel is node names and
From: Anshuman Khandual
A guest requests to be moved to secure memory early at the kernel
startup (in prom_init). Define a flag that can be easily checked by other
parts of the kernel so that they can set things up accordingly. This is
done by checking the MSR(S) bit, which is always set for
From: Anshuman Khandual
Even though SWIOTLB slab gets allocated and initialized on each powerpc
platform with swiotlb_init(), it gets released away again on all server
platforms because ppc_swiotlb_enable variable never gets set. Secure
guests would require SWIOTLB DMA API support for virtio
From: Anshuman Khandual
Secure guest memory (GPA range) is isolated and inaccessible from the host.
But virtio ring transactions require the back end drivers to process
incoming scatter gather buffers which require their access in host. Hence a
portion of guest memory can be converted to shared
From: Anshuman Khandual
On Ultravisor platform kmem_cache for DTL buffers must use a constructor
function which converts the underlying buddy allocated SLUB cache pages
into shared memory so that they are accessible to the hypervisor.
Signed-off-by: Anshuman Khandual
Signed-off-by: Thiago Jung
From: Anshuman Khandual
SWIOTLB checks range of incoming CPU addresses to be bounced and see if the
device can access it through it's DMA window without requiring bouncing. In
such cases it just chooses to skip bouncing. But for cases like secure
guests on powerpc platform all addresses need to
On 2018-08-22 21:04, Marcelo Henrique Cerri wrote:
That looks good to me. Maybe Paulo can help testing it.
--
Regards,
Marcelo
On Wed, Aug 22, 2018 at 08:26:31AM +0200, Ondrej Mosnacek wrote:
This patch fixes sleep-in-atomic bugs in AES-CBC and AES-XTS VMX
implementations. The problem is that
Segher Boessenkool writes:
> On Thu, Aug 23, 2018 at 11:32:16PM +1000, Andrew Donnellan wrote:
>> On 23/08/18 21:56, Michael Ellerman wrote:
>> >Christophe LEROY writes:
>> >
>> >>Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
>> >>>On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe
Rob Herring writes:
> The default DT string handling in the kernel is node names and
> compatibles are case insensitive and property names are case sensitive
> (Sparc is the the only variation and is opposite). It seems only PPC
> (and perhaps only Power Macs?) needs to support case insensitive
It seems like you only sent out 6 our of the actual 11 patches according
to the numbering, please resend the full series.
If the qman driver didn't probe, calling qman_alloc_fqid_range,
qman_alloc_pool_range or qman_alloc_cgrid_range (as done in dpaa_eth) will
pass a NULL pointer to gen_pool_alloc, leading to a NULL pointer
dereference.
Signed-off-by: Alexandre Belloni
---
drivers/soc/fsl/qbman/qman.c | 3 +++
1
On Thu, 2018-08-23 at 07:19 -0500, Segher Boessenkool wrote:
> If one implementation does case insensitive, it will most likely just work,
> because people do not make insane names differing only in case on purpose.
Apple did :-)
ide, vs IDE, ata vs ATA, I've seen all sort of crap there, esp. on
From: Breno Leitao
Function xive_native_get_ipi() might uses chip_id without it being
initialized.
This gives the following error on 'smatch' tool:
error: uninitialized symbol 'chip_id'
The suggestion is using xc->chip_id instead of consulting the OF for chip id,
which is safe since
If the qman driver (qman_ccsr) doesn't probe or fail to probe before
qman_portal, qm_ccsr_start will be either NULL or a stale pointer to an
unmapped page.
This leads to a crash when probing qman_portal as the init_pcfg function
calls qman_liodn_fixup that tries to read qman registers.
Assume
From: Mahesh Salgaonkar
With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
during MCE recovery path.), the SLB error recovery is broken. The new
change now does not add index value to RB[52-63] that selects the SLB
entry while rebolting, instead it assumes that the shadow
On Thu, 23 Aug 2018 12:06:53 +0530
Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
> during MCE recovery path.), the SLB error recovery is broken. The new
> change now does not add index value to RB[52-63] that
Mahesh J Salgaonkar writes:
> From: Mahesh Salgaonkar
>
> With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
> during MCE recovery path.),
That commit description is wrong, I'll fix it up.
cheers
> the SLB error recovery is broken. The new
> change now does not add
On Wed 22-08-18 11:58:02, Mike Kravetz wrote:
> On 08/22/2018 02:30 AM, Aneesh Kumar K.V wrote:
[...]
> > diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
> > index 4eb6e824a80c..f9bdea685cf4 100644
> > --- a/mm/memory_hotplug.c
> > +++ b/mm/memory_hotplug.c
> > @@ -1338,7 +1338,8 @@ static
4.4-stable review patch. If anyone has any objections, please let me know.
--
From: Randy Dunlap
[ Upstream commit c133459765fae249ba482f62e12f987aec4376f0 ]
CC [M] drivers/net/ethernet/freescale/fman/fman.o
In file included from
On 08/23/2018 10:26 AM, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> With the powrpc next commit e7e81847478 (poewrpc/mce: Fix SLB rebolting
> during MCE recovery path.), the SLB error recovery is broken. The new
> change now does not add index value to RB[52-63] that selects the SLB
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Randy Dunlap
[ Upstream commit c133459765fae249ba482f62e12f987aec4376f0 ]
CC [M] drivers/net/ethernet/freescale/fman/fman.o
In file included from
On 08/23/2018 12:14 PM, Michael Ellerman wrote:
> Mahesh J Salgaonkar writes:
>
>> From: Mahesh Salgaonkar
>>
>> With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
>> during MCE recovery path.),
>
> That commit description is wrong, I'll fix it up.
Ouch.. My bad.. :-(
>
4.17-stable review patch. If anyone has any objections, please let me know.
--
From: Randy Dunlap
[ Upstream commit c133459765fae249ba482f62e12f987aec4376f0 ]
CC [M] drivers/net/ethernet/freescale/fman/fman.o
In file included from
On Thu, 23 Aug 2018 14:13:13 +0530
Mahesh Jagannath Salgaonkar wrote:
> On 08/20/2018 05:04 PM, Nicholas Piggin wrote:
> > On Sun, 19 Aug 2018 22:38:39 +0530
> > Mahesh J Salgaonkar wrote:
> >
> >> From: Mahesh Salgaonkar
> >>
> >> Now that other platforms also implements real mode mce
Le 22/08/2018 à 16:20, Aneesh Kumar K.V a écrit :
On 08/17/2018 04:14 PM, Christophe LEROY wrote:
Le 17/08/2018 à 05:32, Aneesh Kumar K.V a écrit :
On 08/14/2018 08:24 PM, Christophe Leroy wrote:
While implementing TLB miss HW assistance on the 8xx, the following
warning was encountered:
On Wed, 22 Aug 2018 22:46:05 +0530
"Aneesh Kumar K.V" wrote:
> The Nest MMU workaround is only needed for RW upgrades. Avoid doing that
> for other pte updates.
>
> We also avoid clearing the pte while marking it invalid. This is because other
> page table walk will find this pte none and can
4.14-stable review patch. If anyone has any objections, please let me know.
--
From: Randy Dunlap
[ Upstream commit c133459765fae249ba482f62e12f987aec4376f0 ]
CC [M] drivers/net/ethernet/freescale/fman/fman.o
In file included from
On 08/20/2018 05:04 PM, Nicholas Piggin wrote:
> On Sun, 19 Aug 2018 22:38:39 +0530
> Mahesh J Salgaonkar wrote:
>
>> From: Mahesh Salgaonkar
>>
>> Now that other platforms also implements real mode mce handler,
>> lets consolidate the code by sharing existing powernv machine check
>> early
On Thu, Aug 23, 2018 at 4:02 AM Grant Likely wrote:
>
> On 23/08/2018 02:29, Benjamin Herrenschmidt wrote:
> > On Wed, 2018-08-22 at 20:26 -0500, Rob Herring wrote:
> >> On Wed, Aug 22, 2018 at 8:14 PM Benjamin Herrenschmidt
> >> wrote:
> >>>
> >>> On Wed, 2018-08-22 at 19:47 -0500, Rob Herring
On Thu, 2018-08-23 at 06:43 -0500, Rob Herring wrote:
> On Thu, Aug 23, 2018 at 4:02 AM Grant Likely wrote:
> >
> >
> > What problem are you trying to solve?
>
> I'm looking at removing device_node.name and using full_name instead
> (which now is only the local node name plus unit-address).
On Thu, 2018-08-23 at 19:23 +1000, Nicholas Piggin wrote:
> On Wed, 22 Aug 2018 22:46:05 +0530
> "Aneesh Kumar K.V" wrote:
>
> > The Nest MMU workaround is only needed for RW upgrades. Avoid doing that
> > for other pte updates.
> >
> > We also avoid clearing the pte while marking it invalid.
Nicholas Piggin writes:
> On Wed, 22 Aug 2018 22:46:05 +0530
> "Aneesh Kumar K.V" wrote:
>
>> The Nest MMU workaround is only needed for RW upgrades. Avoid doing that
>> for other pte updates.
>>
>> We also avoid clearing the pte while marking it invalid. This is because
>> other
>> page table
On Thu, Aug 23, 2018 at 6:48 AM Benjamin Herrenschmidt
wrote:
>
> On Thu, 2018-08-23 at 06:43 -0500, Rob Herring wrote:
> > On Thu, Aug 23, 2018 at 4:02 AM Grant Likely wrote:
> > >
> > >
> > > What problem are you trying to solve?
> >
> > I'm looking at removing device_node.name and using
On Thu, Aug 23, 2018 at 11:03:28AM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2018-08-22 at 19:47 -0500, Rob Herring wrote:
> > The default DT string handling in the kernel is node names and
> > compatibles are case insensitive and property names are case sensitive
> > (Sparc is the the only
Cédric Le Goater writes:
> On 08/23/2018 05:24 AM, Michael Ellerman wrote:
>> Breno Leitao writes:
>>> diff --git a/arch/powerpc/sysdev/xive/native.c
>>> b/arch/powerpc/sysdev/xive/native.c
>>> index 311185b9960a..fc56673a3c0f 100644
>>> --- a/arch/powerpc/sysdev/xive/native.c
>>> +++
On 08/23/2018 05:24 AM, Michael Ellerman wrote:
> Hi Breno,
>
> Breno Leitao writes:
>> Function xive_native_get_ipi() might uses chip_id without it being
>> initialized. This gives the following error on 'smatch' tool:
>>
>> error: uninitialized symbol 'chip_id'
>
> Which is correct, it
On Thu, Aug 23, 2018 at 11:29:01AM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2018-08-22 at 20:26 -0500, Rob Herring wrote:
> > On Wed, Aug 22, 2018 at 8:14 PM Benjamin Herrenschmidt
> > wrote:
> > >
> > > On Wed, 2018-08-22 at 19:47 -0500, Rob Herring wrote:
> > > > The default DT string
On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe LEROY wrote:
> The only small problème I have is that some version of GCC seems to
> complain about big memset() (132k and 256k ones). Is there a way to tell
> GCC we really want to do it ?
I'm not sure what you mean. Complain, is that a
Christophe LEROY writes:
> Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
>> On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe LEROY wrote:
>>> The only small problème I have is that some version of GCC seems to
>>> complain about big memset() (132k and 256k ones). Is there a way to tell
Mahesh Jagannath Salgaonkar writes:
> On 08/23/2018 12:14 PM, Michael Ellerman wrote:
>> Mahesh J Salgaonkar writes:
>>
>>> From: Mahesh Salgaonkar
>>>
>>> With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
>>> during MCE recovery path.),
>>
>> That commit description
Le 23/08/2018 à 12:36, Segher Boessenkool a écrit :
On Thu, Aug 23, 2018 at 11:40:22AM +0200, Christophe LEROY wrote:
The only small problème I have is that some version of GCC seems to
complain about big memset() (132k and 256k ones). Is there a way to tell
GCC we really want to do it ?
Nicholas Piggin writes:
> On Thu, 23 Aug 2018 12:06:53 +0530
> Mahesh J Salgaonkar wrote:
>> From: Mahesh Salgaonkar
>>
>> With the powerpc next commit e7e81847478 (powerpc/mce: Fix SLB rebolting
>> during MCE recovery path.), the SLB error recovery is broken. The new
>> change now does not
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