Segher Boessenkool writes:
> On Thu, Sep 20, 2018 at 03:29:22PM +0530, Madhavan Srinivasan wrote:
>> On Thursday 20 September 2018 03:11 PM, Michael Ellerman wrote:
>> >In power7_marked_instr_event() there is a switch case that is missing
>> >a break or an explicit fallthrough, it's not
On Thursday 20 September 2018 08:17 PM, Segher Boessenkool wrote:
On Thu, Sep 20, 2018 at 03:29:22PM +0530, Madhavan Srinivasan wrote:
On Thursday 20 September 2018 03:11 PM, Michael Ellerman wrote:
In power7_marked_instr_event() there is a switch case that is missing
a break or an explicit
> -Original Message-
> From: Li Yang [mailto:leoyang...@nxp.com]
> Sent: Saturday, September 22, 2018 1:15 AM
> To: Madalin-cristian Bucur
> Subject: Re: [PATCH 1/4] soc/fsl/qbman: Check if CPU is offline when
> initializing portals
>
> On Thu, Sep 20, 2018 at 10:09 AM Madalin Bucur
>
We can upgrade pte access (R -> RW transition) via mprotect or autonuma. We need
to make sure we follow the recommended pte update sequence as outlined in
commit: bd5050e38aec ("powerpc/mm/radix: Change pte relax sequence to handle
nest MMU hang")
for such updates. This patch series do that.
Nathan Fontenot writes:
> On 09/18/2018 05:32 AM, Gautham R Shenoy wrote:
>> Hi Nathan,
>> On Tue, Sep 18, 2018 at 1:05 AM Nathan Fontenot
>> wrote:
>>>
>>> When performing partition migrations all present CPUs must be online
>>> as all present CPUs must make the H_JOIN call as part of the
When we treclaim we store the userspace checkpointed r13 to a scratch
SPR and then later save the scratch SPR to the user thread struct.
Unfortunately, this doesn't work as accessing the user thread struct
can take an SLB fault and the SLB fault handler will write the same
scratch SPRG that now
Hi Michael,
On Mon, Sep 24, 2018 at 05:00:42PM +1000, Michael Ellerman wrote:
> Nathan Fontenot writes:
> > On 09/18/2018 05:32 AM, Gautham R Shenoy wrote:
> >> Hi Nathan,
> >> On Tue, Sep 18, 2018 at 1:05 AM Nathan Fontenot
> >> wrote:
> >>>
> >>> When performing partition migrations all
NestMMU requires us to mark the pte invalid and flush the tlb when we do a
RW upgrade of pte. We fixed a variant of this in the fault path in commit
Fixes: bd5050e38aec ("powerpc/mm/radix: Change pte relax sequence to handle
nest MMU hang")
Do the same for mprotect and autonuma upgrades.
Some architecture may want to call flush_tlb_range from these helpers.
Signed-off-by: Aneesh Kumar K.V
---
arch/s390/include/asm/pgtable.h | 4 ++--
arch/s390/mm/pgtable.c | 6 --
arch/x86/include/asm/paravirt.h | 7 +--
fs/proc/task_mmu.c | 4 ++--
Signed-off-by: Aneesh Kumar K.V
---
include/linux/hugetlb.h | 18 ++
mm/hugetlb.c| 8 +---
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 6b68e345f0ca..d39ba48f43b0 100644
---
On Mon, Sep 24, 2018 at 6:56 PM, Abdul Haleem
wrote:
> Greeting's
>
> bnx2x module load/unload test results in continuous hard LOCKUP trace on
> my powerpc bare-metal running mainline 4.19.0-rc4 kernel
>
> the instruction address points to:
>
> 0xc009d048 is in opal_interrupt
>
Architectures like ppc64 requires to do a conditional tlb flush based on the old
and new value of pte. Enable that by passing old pte value as the arg.
Signed-off-by: Aneesh Kumar K.V
---
arch/s390/include/asm/pgtable.h | 3 ++-
arch/s390/mm/pgtable.c | 2 +-
NestMMU requires us to mark the pte invalid and flush the tlb when we do a
RW upgrade of pte. We fixed a variant of this in the fault path in commit
Fixes: bd5050e38aec ("powerpc/mm/radix: Change pte relax sequence to handle
nest MMU hang")
Signed-off-by: Aneesh Kumar K.V
---
Greeting's
bnx2x module load/unload test results in continuous hard LOCKUP trace on
my powerpc bare-metal running mainline 4.19.0-rc4 kernel
the instruction address points to:
0xc009d048 is in opal_interrupt
(arch/powerpc/platforms/powernv/opal-irqchip.c:133).
128
129 static
From: Yogesh Gaur
Add clockgen support for lx2160a.
Added entry for compat 'fsl,lx2160a-clockgen'.
Signed-off-by: Tang Yuantian
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
Acked-by: Stephen Boyd
---
drivers/clk/clk-qoriq.c | 12
Changes for v3:
-Split clockgen support patch into below two patches:
- a)Updated array size of cmux_to_group[] with NUM_CMUX+1 to include -1
terminator and p4080 cmux_to_group[] array with -1 terminator
- b)Add clockgen support for lx2160a
Changes for v2:
- Modified cmux_to_group array to
LX2160A reference design board (RDB) is a high-performance
computing, evaluation, and development platform with LX2160A
SoC.
Signed-off-by: Priyanka Jain
Signed-off-by: Sriram Dash
Signed-off-by: Vabhav Sharma
---
arch/arm64/boot/dts/freescale/Makefile| 1 +
> -Original Message-
> From: Scott Wood
> Sent: Sunday, September 16, 2018 12:54 AM
> To: Vabhav Sharma ; sudeep.ho...@arm.com; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; robh...@kernel.org;
> mark.rutl...@arm.com; linuxppc-dev@lists.ozlabs.org; linux-arm-
>
Hi Aravinda,
Aravinda Prasad writes:
> This patch exports the raw per-CPU VPA data via debugfs.
> A per-CPU file is created which exports the VPA data of
> that CPU to help debug some of the VPA related issues or
> to analyze the per-CPU VPA related statistics.
Do we really need this in
Christophe Leroy writes:
> I'm trying to implement TLS based stack protector in the Linux Kernel.
> For that I need to give to GCC the offset at which it will find the
> canary (register r2 is pointing to the current task struct).
>
> I have been able to do it with the below patch, but it only
Add compatible for LX2160A SoC,QDS and RDB board
Signed-off-by: Vabhav Sharma
---
Documentation/devicetree/bindings/arm/fsl.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index
From: Yogesh Gaur
Increase size of cmux_to_group array, to accomdate entry of
-1 termination.
Added -1, terminated, entry for 4080_cmux_grpX.
Signed-off-by: Yogesh Gaur
Signed-off-by: Vabhav Sharma
---
drivers/clk/clk-qoriq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
LX2160A SoC is based on Layerscape Chassis Generation 3.2 Architecture.
LX2160A features an advanced 16 64-bit ARM v8 CortexA72 processor cores
in 8 cluster, CCN508, GICv3,two 64-bit DDR4 memory controller, 8 I2C
controllers, 3 dspi, 2 esdhc,2 USB 3.0, mmu 500, 3 SATA, 4 PL011 SBSA
UARTs etc.
On Mon, 2018-09-24 at 19:35 +1000, Oliver wrote:
> On Mon, Sep 24, 2018 at 6:56 PM, Abdul Haleem
> wrote:
> > Greeting's
> >
> > bnx2x module load/unload test results in continuous hard LOCKUP trace on
> > my powerpc bare-metal running mainline 4.19.0-rc4 kernel
> >
> > the instruction address
Adding compatible string "lx2160a-dcfg" to
initialize guts driver for lx2160
Signed-off-by: Vabhav Sharma
---
drivers/soc/fsl/guts.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
index 302e0c8..5e1e633 100644
--- a/drivers/soc/fsl/guts.c
+++
Hi Mikey,
On 09/24/2018 04:27 AM, Michael Neuling wrote:
> When we treclaim we store the userspace checkpointed r13 to a scratch
> SPR and then later save the scratch SPR to the user thread struct.
>
> Unfortunately, this doesn't work as accessing the user thread struct
> can take an SLB fault
This functionality was tentatively added in the past
(commit 6533b7c16ee5 ("powerpc: Initial stack protector
(-fstack-protector) support")) but had to be reverted
(commit f2574030b0e3 ("powerpc: Revert the initial stack
protector support") because of GCC implementing it differently
whether it had
On PPC64, as register r13 points to the paca_struct at all time,
this patch adds a copy of the canary there, which is copied at
task_switch.
That new canary is then used by using the following GCC options:
-mstack-protector-guard=tls
-mstack-protector-guard-reg=r13
Le 24/09/2018 à 14:10, Michael Ellerman a écrit :
Christophe Leroy writes:
I'm trying to implement TLS based stack protector in the Linux Kernel.
For that I need to give to GCC the offset at which it will find the
canary (register r2 is pointing to the current task struct).
I have been
The table of pointers 'current_set' has been used for retrieving
the stack and current. They used to be thread_info pointers as
they were pointing to the stack and current was taken from the
'task' field of the thread_info.
Now, the pointers of 'current_set' table are now both pointers
to
On 09/24/2018 03:56 AM, Gautham R Shenoy wrote:
> Hi Michael,
>
> On Mon, Sep 24, 2018 at 05:00:42PM +1000, Michael Ellerman wrote:
>> Nathan Fontenot writes:
>>> On 09/18/2018 05:32 AM, Gautham R Shenoy wrote:
Hi Nathan,
On Tue, Sep 18, 2018 at 1:05 AM Nathan Fontenot
wrote:
thread_info is not anymore in the stack, so the entire stack
can now be used.
In the meantime, all pointers to the stacks are not anymore
pointers to thread_info so this patch changes them to void*
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/irq.h | 10 +-
When switching powerpc to CONFIG_THREAD_INFO_IN_TASK, include/sched.h
has to be included in asm/smp.h for the following change, in order
to avoid uncomplete definition of task_struct:
-#define raw_smp_processor_id() (current_thread_info()->cpu)
+#define raw_smp_processor_id() (current->cpu)
But
The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if
Now that thread_info is similar to task_struct, it's address is in r2
so CURRENT_THREAD_INFO() macro is useless. This patch removes it.
At the same time, as the 'cpu' field is not anymore in thread_info,
this patch renames it to TASK_CPU.
Signed-off-by: Christophe Leroy
---
This patch cleans the powerpc kernel before activating
CONFIG_THREAD_INFO_IN_TASK:
- The purpose of the pointer given to call_do_softirq() and
call_do_irq() is to point the new stack ==> change it to void*
- current_pt_regs() is in the stack, not in thread_info.
- Don't use CURRENT_THREAD_INFO()
CURRENT_THREAD_INFO() now uses the PACA to retrieve 'current' pointer,
it doesn't use 'sp' anymore.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/exception-64s.h | 4 ++--
arch/powerpc/include/asm/thread_info.h | 2 +-
arch/powerpc/kernel/entry_64.S
At the time being, the thread_info struct is located in the beginning
of the stack. There is an asm const called THREAD_INFO which is the
offset of the stack pointer in the task_struct.
In preparation of moving thread_info into task_struct, this patch
renames the THREAD_INFO const to TASK_STACK.
This patch activates CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if stack addresses are
When activating CONFIG_THREAD_INFO_IN_TASK, linux/sched.h
includes asm/current.h. This generates a circular dependency.
To avoid that, asm/processor.h shall not be included in mmu-hash.h
In order to do that, this patch moves into a new header called
asm/task_size.h the information from
On 09/19/2018 11:38 PM, Michael Ellerman wrote:
> Nathan Fontenot writes:
>
>> When removing memory we need to remove the memory from the node
>> it was added to instead of looking up the node it should be in
>> in the device tree.
>>
>> During testing we have seen scenarios where the affinity
On Tue, Sep 18, 2018 at 7:59 PM Jason Gunthorpe wrote:
>
> On Tue, Sep 18, 2018 at 10:51:08AM -0700, Darren Hart wrote:
> > On Fri, Sep 14, 2018 at 09:57:48PM +0100, Al Viro wrote:
> > > On Fri, Sep 14, 2018 at 01:35:06PM -0700, Darren Hart wrote:
> > >
> > > > Acked-by: Darren Hart (VMware)
> >
On Mon, Sep 24, 2018 at 10:18:52PM +0200, Arnd Bergmann wrote:
> On Tue, Sep 18, 2018 at 7:59 PM Jason Gunthorpe wrote:
> >
> > On Tue, Sep 18, 2018 at 10:51:08AM -0700, Darren Hart wrote:
> > > On Fri, Sep 14, 2018 at 09:57:48PM +0100, Al Viro wrote:
> > > > On Fri, Sep 14, 2018 at 01:35:06PM
Le 24/09/2018 à 21:04, Corentin Labbe a écrit :
This patch adds setbits32/clrbits32/clrsetbits32 and
setbits64/clrbits64/clrsetbits64 in linux/setbits.h header.
Fix the patch subject and description.
Signed-off-by: Corentin Labbe
---
include/linux/setbits.h | 88
Christophe LEROY writes:
> Le 24/09/2018 à 14:10, Michael Ellerman a écrit :
>> Christophe Leroy writes:
>>
>>> I'm trying to implement TLS based stack protector in the Linux Kernel.
>>> For that I need to give to GCC the offset at which it will find the
>>> canary (register r2 is pointing to
Nathan Fontenot writes:
> On 09/19/2018 11:38 PM, Michael Ellerman wrote:
>> Nathan Fontenot writes:
>>> When removing memory we need to remove the memory from the node
>>> it was added to instead of looking up the node it should be in
>>> in the device tree.
>>>
>>> During testing we have seen
Le 25/09/2018 à 03:29, Michael Ellerman a écrit :
Christophe Leroy writes:
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 6ab66a88db14..4567eeb6524e 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -2090,8 +2082,9 @@ void
Fix the patch title.
Le 24/09/2018 à 21:04, Corentin Labbe a écrit :
Since setbits32/clrbits32 work on be32, it's better to remove ambiguity on
the used data type.
Signed-off-by: Corentin Labbe
---
arch/powerpc/include/asm/fsl_lbc.h | 2 +-
arch/powerpc/include/asm/io.h
Christophe Leroy writes:
> diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
> index 6ab66a88db14..4567eeb6524e 100644
> --- a/arch/powerpc/kernel/traps.c
> +++ b/arch/powerpc/kernel/traps.c
> @@ -2090,8 +2082,9 @@ void SPEFloatingPointRoundException(struct pt_regs
> *regs)
On Mon, 2018-09-17 at 09:32 +0200, David Hildenbrand wrote:
> Am 03.09.18 um 02:36 schrieb Rashmica:
> > Hi David,
> >
> >
> > On 21/08/18 20:44, David Hildenbrand wrote:
> >
> > > There seem to be some problems as result of 30467e0b3be ("mm,
> > > hotplug:
> > > fix concurrent memory hot-add
On Mon, 2018-09-24 at 11:32 -0300, Breno Leitao wrote:
> Hi Mikey,
>
> On 09/24/2018 04:27 AM, Michael Neuling wrote:
> > When we treclaim we store the userspace checkpointed r13 to a scratch
> > SPR and then later save the scratch SPR to the user thread struct.
> >
> > Unfortunately, this
Gautham R Shenoy writes:
> On Mon, Sep 24, 2018 at 05:00:42PM +1000, Michael Ellerman wrote:
>> Nathan Fontenot writes:
>> > On 09/18/2018 05:32 AM, Gautham R Shenoy wrote:
>> >> On Tue, Sep 18, 2018 at 1:05 AM Nathan Fontenot
>> >>> diff --git a/arch/powerpc/kernel/rtas.c
The Devicetree Microconference has been accepted into the 2018 Linux
Plumbers Conference, which will be held in Vancouver, British
Columbia, Canada from Tuesday, November 13 through Thursday, November
15. If you are interested in speaking, please contact myself, or
co-leader Frank Rowand (on CC),
Guenter Roeck writes:
> Hi,
>
> On Mon, Aug 27, 2018 at 10:47:11AM +0200, Christoph Hellwig wrote:
>> There is no reason to leave the per-device dma_ops around when
>> deconfiguring a device, so move this code from arm64 into the
>> common code.
>> Signed-off-by: Christoph Hellwig
>>
Arnd Bergmann writes:
> On Tue, Sep 18, 2018 at 2:15 PM Firoz Khan wrote:
>> On 14 September 2018 at 15:31, Arnd Bergmann wrote:
>> > On Fri, Sep 14, 2018 at 10:33 AM Firoz Khan wrote:
>> >
>> >> ---
>> >> arch/powerpc/kernel/syscalls/Makefile | 51
>> >>
Tyrel Datwyler writes:
> On 09/24/2018 07:30 AM, Nathan Fontenot wrote:
...
>>
>> Since we have not been able to re-create the failure with this patch would
>> it be ok to pull in this patch while other options are explored?
>
> I think mpe initially applied this to -next. Not sure if he dropped
Le 24/09/2018 à 17:52, Christophe Leroy a écrit :
When switching powerpc to CONFIG_THREAD_INFO_IN_TASK, include/sched.h
has to be included in asm/smp.h for the following change, in order
to avoid uncomplete definition of task_struct:
-#define raw_smp_processor_id()
On 09/24/2018 07:30 AM, Nathan Fontenot wrote:
> On 09/24/2018 03:56 AM, Gautham R Shenoy wrote:
>> Hi Michael,
>>
>> On Mon, Sep 24, 2018 at 05:00:42PM +1000, Michael Ellerman wrote:
>>> Nathan Fontenot writes:
On 09/18/2018 05:32 AM, Gautham R Shenoy wrote:
> Hi Nathan,
> On Tue,
On Tue, Sep 18, 2018 at 2:15 PM Firoz Khan wrote:
>
> On 14 September 2018 at 15:31, Arnd Bergmann wrote:
> > On Fri, Sep 14, 2018 at 10:33 AM Firoz Khan wrote:
> >
> >> ---
> >> arch/powerpc/kernel/syscalls/Makefile | 51
> >> arch/powerpc/kernel/syscalls/syscall_32.tbl | 378
>
On Mon, Sep 24, 2018 at 10:35 PM Jason Gunthorpe wrote:
> On Mon, Sep 24, 2018 at 10:18:52PM +0200, Arnd Bergmann wrote:
> > On Tue, Sep 18, 2018 at 7:59 PM Jason Gunthorpe wrote:
> > > On Tue, Sep 18, 2018 at 10:51:08AM -0700, Darren Hart wrote:
> > > > On Fri, Sep 14, 2018 at 09:57:48PM +0100,
Hello
This patchset adds a new set of functions which are open-coded in lot of
place.
Basicly the pattern is always the same, "read, modify a bit, write"
some driver and the powerpc arch already have thoses pattern them as functions.
(like ahci_sunxi.c or dwmac-meson8b)
The first patch rename
This patch adds setbits32/clrbits32/clrsetbits32 and
setbits64/clrbits64/clrsetbits64 in linux/setbits.h header.
Signed-off-by: Corentin Labbe
---
include/linux/setbits.h | 88 +
1 file changed, 88 insertions(+)
create mode 100644
This patch convert meson DRM driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/meson/meson_crtc.c | 14 ---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +
drivers/gpu/drm/meson/meson_plane.c | 13 ---
This patch convert meson stmmac glue driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
.../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56 +-
1 file changed, 22 insertions(+), 34 deletions(-)
diff --git
On 24/09/2018 21:04, Corentin Labbe wrote:
> This patch convert meson stmmac glue driver to use all xxxsetbits32 functions.
>
> Signed-off-by: Corentin Labbe
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56
> +-
> 1 file changed, 22 insertions(+), 34
On 09/24/2018 12:04 PM, Corentin Labbe wrote:
> This patch convert meson stmmac glue driver to use all xxxsetbits32 functions.
>
> Signed-off-by: Corentin Labbe
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56
> +-
> 1 file changed, 22 insertions(+), 34
Since setbits32/clrbits32 work on be32, it's better to remove ambiguity on
the used data type.
Signed-off-by: Corentin Labbe
---
arch/powerpc/include/asm/fsl_lbc.h | 2 +-
arch/powerpc/include/asm/io.h| 5 +-
arch/powerpc/platforms/44x/canyonlands.c |
This patch converts ahci_sunxi to use xxxsetbits32 functions
Signed-off-by: Corentin Labbe
---
drivers/ata/ahci_sunxi.c | 51
1 file changed, 12 insertions(+), 39 deletions(-)
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
This patch add a spatch which convert all open coded of
setbits32/clrbits32/clrsetbits32
and their 64 bits counterparts.
Note that 64 and 32_relaxed are generated via
cp scripts/coccinelle/misc/setbits32.cocci
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,readl,readl_relaxed,'
This patch convert dwmac-sun8i driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 ++-
1 file changed, 16 insertions(+), 46 deletions(-)
diff --git
Hi Corentin,
On 24/09/2018 21:04, Corentin Labbe wrote:
> This patch convert meson DRM driver to use all xxxsetbits32 functions.
>
> Signed-off-by: Corentin Labbe
> ---
> drivers/gpu/drm/meson/meson_crtc.c | 14 ---
> drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +
>
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