This patch changes to use rtnl_lock only during a reset to avoid
deadlock that could occur when a thread operating close is holding
rtnl_lock and waiting for reset_lock acquired by another thread,
which is waiting for rtnl_lock in order to set the number of tx/rx
queues during a reset.
Also, we
On Mon, 2018-11-19 at 10:44 -0200, Breno Leitao wrote:
> On a signal handler return, the user could set a context with MSR[TS] bits
> set, and these bits would be copied to task regs->msr.
>
> At restore_tm_sigcontexts(), after current task regs->msr[TS] bits are set,
> several __get_user() are
Alexey Kardashevskiy writes:
> The current implementation of the OPAL_PCI_EEH_FREEZE_STATUS call in
> skiboot's NPU driver does not touch the pci_error_type parameter so
> it might have garbage but the powernv code analyzes it nevertheless.
>
> This initializes pcierr and fstate to zero in all
On 11/19/2018 02:33 PM, Sinan Kaya wrote:
> True. I was trying to get it out in a rush. I omitted words.
Sounds like you'd make an top notch spec writer! :p
> However; table assumes governance about for which entities firmware first
> should be enabled. There is no cross reference to _OSC or
On 11/19/2018 6:49 PM, alex_gagn...@dellteam.com wrote:
On 11/19/2018 02:33 PM, Sinan Kaya wrote:
However; table assumes governance about for which entities firmware first
should be enabled. There is no cross reference to _OSC or permission
negotiation like _OST.
Well, from an OSPM
Hi Michael,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.20-rc3 next-20181119]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
From: Juliet Kim
Date: Mon, 19 Nov 2018 15:59:22 -0600
> This patch changes to use rtnl_lock only during a reset to avoid
> deadlock that could occur when a thread operating close is holding
> rtnl_lock and waiting for reset_lock acquired by another thread,
> which is waiting for rtnl_lock in
On Tue, 20 Nov 2018 at 05:24, Nick Desaulniers wrote:
> >
> > The only functional change I noticed was this in udiv_qrnnd.
> >
> > __r1 = (n1) % __d1;
> > __q1 = (n1) / __d1;
> >
> > Becomes this:
> >
> > __q1 = (n1) / __d1;
> > __r1 = (n1) - __q1 * __d1;
> >
> > This is
On Mon, Nov 19, 2018 at 03:25:17PM +1100, Alexey Kardashevskiy wrote:
> The current implementation of the OPAL_PCI_EEH_FREEZE_STATUS call in
> skiboot's NPU driver does not touch the pci_error_type parameter so
> it might have garbage but the powernv code analyzes it nevertheless.
>
> This
On Tue, Nov 20, 2018 at 01:51:06PM +1100, Michael Ellerman wrote:
> Alexey Kardashevskiy writes:
>
> > The current implementation of the OPAL_PCI_EEH_FREEZE_STATUS call in
> > skiboot's NPU driver does not touch the pci_error_type parameter so
> > it might have garbage but the powernv code
On 20/11/2018 14:51, Sam Bobroff wrote:
> On Tue, Nov 20, 2018 at 01:51:06PM +1100, Michael Ellerman wrote:
>> Alexey Kardashevskiy writes:
>>
>>> The current implementation of the OPAL_PCI_EEH_FREEZE_STATUS call in
>>> skiboot's NPU driver does not touch the pci_error_type parameter so
>>> it
On Mon, Nov 19, 2018 at 5:50 PM Robin Murphy wrote:
>
> On 19/11/2018 14:18, Ramon Fried wrote:
> > On Tue, Oct 9, 2018 at 8:02 AM Benjamin Herrenschmidt
> > wrote:
> >>
> >> On Wed, 2018-10-03 at 16:10 -0700, Alexander Duyck wrote:
> -* Because 32-bit DMA masks are so common we
On Tue, 2018-11-20 at 17:55 +1100, Alexey Kardashevskiy wrote:
>
> On 20/11/2018 14:51, Sam Bobroff wrote:
> > On Tue, Nov 20, 2018 at 01:51:06PM +1100, Michael Ellerman wrote:
> > > Alexey Kardashevskiy writes:
> > >
> > > > The current implementation of the OPAL_PCI_EEH_FREEZE_STATUS
> > > >
On Wed, Nov 14, 2018 at 11:04 AM Firoz Khan wrote:
> Adding a new table entry consisting of:
> - System call number.
> - ABI.
> - System call name.
> - Entry point name.
> - Compat entry name, if required.
>
> syscallhdr.sh and syscalltbl.sh will generate
On 11/19/2018 12:32 PM, Sinan Kaya wrote:
But we're not using HEST as a fine grain control. We disable native AER
handling if *any* device has FF set in HEST, and that just forces people
to use pcie_ports=native to get around that.
I don't see *any* in the code. aer_hest_parse() does the
On Mon, Nov 19, 2018 at 11:53:05AM -0500, Tyler Baicar wrote:
> On Thu, Nov 15, 2018 at 8:49 PM Sinan Kaya wrote:
> >
> > On 11/15/2018 3:16 PM, Alexandru Gagniuc wrote:
> > > I've asked around a few people at Dell and they unanimously agree that
> > > _OSC is the correct way to determine
On 11/19/2018 11:53 AM, Keith Busch wrote:
On Mon, Nov 19, 2018 at 11:53:05AM -0500, Tyler Baicar wrote:
On Thu, Nov 15, 2018 at 8:49 PM Sinan Kaya wrote:
On 11/15/2018 3:16 PM, Alexandru Gagniuc wrote:
I've asked around a few people at Dell and they unanimously agree that
_OSC is the
On Mon, Nov 19, 2018 at 12:32:42PM -0500, Sinan Kaya wrote:
> On 11/19/2018 11:53 AM, Keith Busch wrote:
> > On Mon, Nov 19, 2018 at 11:53:05AM -0500, Tyler Baicar wrote:
> > > On Thu, Nov 15, 2018 at 8:49 PM Sinan Kaya wrote:
> > > >
> > > > On 11/15/2018 3:16 PM, Alexandru Gagniuc wrote:
> > >
On 11/19/2018 01:32 PM, Sinan Kaya wrote:
> ACPI 6.2:
>
> 18.3.2.4 PCI Express Root Port AER Structure
>
> Flags:
>
> Bit [0] - FIRMWARE_FIRST: If set, this bit indicates to the OSPM that system
> firmware will handle errors from this source first.
> Bit [1] - GLOBAL: If set, indicates that the
On Mon, Nov 19, 2018 at 12:26:46PM +0100, Daniel Borkmann wrote:
> On 11/10/2018 07:58 PM, Michał Mirosław wrote:
> > Signed-off-by: Michał Mirosław
>
> Why you have empty commit messages for non-trivial changes like this in
> 4 out of 6 of your patches ...
>
> How was it tested on the JITs you
On 11/19/2018 3:16 PM, alex_gagn...@dellteam.com wrote:
On 11/19/2018 01:32 PM, Sinan Kaya wrote:
ACPI 6.2:
18.3.2.4 PCI Express Root Port AER Structure
Flags:
Bit [0] - FIRMWARE_FIRST: If set, this bit indicates to the OSPM that system
firmware will handle errors from this source first.
Bit
On 11/19/2018 12:24 PM, Sinan Kaya wrote:
On 11/19/2018 1:10 PM, Keith Busch wrote:
We can't really turn off firmware first in the kernel without asking
help
from the firmware.
The _OSC method this patch utilizes is the ACPI spec defined way for
the kernel to wrest control from firmware. BIOS
UEFI HEST table specification also claims that it should be the ultimate
table for when PCI firmware-first should be disabled/enabled.
IIRC, EFI absorbed ACPI before FFS was a thing. Could you point me to the UEFI
chapter that says HEST is authoritative?
(not being a smartie, just that my free
On 11/19/2018 1:10 PM, Keith Busch wrote:
We can't really turn off firmware first in the kernel without asking help
from the firmware.
The _OSC method this patch utilizes is the ACPI spec defined way for
the kernel to wrest control from firmware. BIOS specific menu settings
shouldn't be our
On Mon, Nov 19, 2018 at 12:42:25PM -0500, Sinan Kaya wrote:
> On 11/19/2018 12:32 PM, Sinan Kaya wrote:
> > >
> > > But we're not using HEST as a fine grain control. We disable native AER
> > > handling if *any* device has FF set in HEST, and that just forces people
> > > to use pcie_ports=native
On 11/19/2018 12:41 PM, Keith Busch wrote:
Still, breaking existing systems that rely on HEST table is not cool.
I'd rather have users specify "pcie_ports=native" to skip FF rather than
having broken systems by default to be honest.
The pcie_ports=native work-around ignores FF to potentially
On Mon, Nov 19, 2018 at 12:56:56PM -0500, Sinan Kaya wrote:
> On 11/19/2018 12:41 PM, Keith Busch wrote:
> > > Still, breaking existing systems that rely on HEST table is not cool.
> > > I'd rather have users specify "pcie_ports=native" to skip FF rather than
> > > having broken systems by default
On Tue, Oct 9, 2018 at 8:02 AM Benjamin Herrenschmidt
wrote:
>
> On Wed, 2018-10-03 at 16:10 -0700, Alexander Duyck wrote:
> > > -* Because 32-bit DMA masks are so common we expect every
> > > architecture
> > > -* to be able to satisfy them - either by not supporting more
> > >
On Thu, Nov 15, 2018 at 8:49 PM Sinan Kaya wrote:
>
> On 11/15/2018 3:16 PM, Alexandru Gagniuc wrote:
> > I've asked around a few people at Dell and they unanimously agree that
> > _OSC is the correct way to determine ownership of AER. In linux, we
> > use the result of _OSC to enable AER
Hi Christoph,
On Thu, Nov 15, 2018 at 08:05:31PM +0100, Christoph Hellwig wrote:
> This option is always selected from LOONGSON_MACH3X. Switch to just
> seleting PCI from that option and definining LOONGSON_PCIIO_BASE based
> on CONFIG_LOONGSON_MACH3X.
>
> Signed-off-by: Christoph Hellwig
>
On Mon, Nov 19, 2018 at 01:01:41PM -0800, Paul Burton wrote:
> On Thu, Nov 15, 2018 at 08:05:31PM +0100, Christoph Hellwig wrote:
> > This option is always selected from LOONGSON_MACH3X. Switch to just
> > seleting PCI from that option and definining LOONGSON_PCIIO_BASE based
> > on
From: Elvira Khabirova
Arch code should use tracehook_*() helpers as documented
in include/linux/tracehook.h,
ptrace_report_syscall() is not expected to be used outside that file.
Co-authored-by: Dmitry V. Levin
Fixes: 5521eb4bca2d ("powerpc/ptrace: Add support for PTRACE_SYSEMU")
Hi Christoph,
On Thu, Nov 15, 2018 at 08:05:32PM +0100, Christoph Hellwig wrote:
> There is no good reason to duplicate the PCI menu in every architecture.
> Instead provide a selectable HAVE_PCI symbol that indicates availability
> of PCI support, and a FORCE_PCI symbol to for PCI on and the
On 11/17/2018 07:57 PM, Ard Biesheuvel wrote:
> Commit ede95a63b5e84 ("bpf: add bpf_jit_limit knob to restrict unpriv
> allocations") added a call to bpf_jit_uncharge_modmem() to the routine
> bpf_jit_binary_free() which is called from the __weak bpf_jit_free().
> This function is overridden by
On 11/10/2018 10:47 PM, David Miller wrote:
> From: Michał Mirosław
> Date: Sat, 10 Nov 2018 19:58:29 +0100
>
>> Fix BPF code/JITs to allow for separate VLAN_PRESENT flag
>> storage and finally move the flag to separate storage in skbuff.
>>
>> This is final step to make CLAN.CFI transparent to
On Fri, 16 Nov 2018 23:11:04 +0100,
Rob Herring wrote:
>
> Remove directly accessing device_node.type pointer and use the accessors
> instead. This will eventually allow removing the type pointer.
>
> Replace the open coded iterating over child nodes with
> for_each_child_of_node() while we're
On 11/10/2018 07:58 PM, Michał Mirosław wrote:
> Signed-off-by: Michał Mirosław
Why you have empty commit messages for non-trivial changes like this in
4 out of 6 of your patches ...
How was it tested on the JITs you were changing? Did you test on both,
big and little endian machines?
> ---
>
On a signal handler return, the user could set a context with MSR[TS] bits
set, and these bits would be copied to task regs->msr.
At restore_tm_sigcontexts(), after current task regs->msr[TS] bits are set,
several __get_user() are called and then a recheckpoint is executed.
This is a problem
On Fri, Nov 16, 2018 at 10:24:04AM +, Andrew Murray wrote:
> Add a macro that tests if any of the perf event exclusion flags
> are set on a given event.
It is in fact an inline function, not a CPP macro.
> Signed-off-by: Andrew Murray
> ---
> include/linux/perf_event.h | 9 +
> 1
On Fri, Nov 16, 2018 at 10:24:03AM +, Andrew Murray wrote:
> Many PMU drivers do not have the capability to exclude counting events
> that occur in specific contexts such as idle, kernel, guest, etc. These
> drivers indicate this by returning an error in their event_init upon
> testing the
On Sun, Nov 18, 2018 at 05:19:04PM -0800, Matthew Wilcox wrote:
> On Mon, Nov 19, 2018 at 09:08:20AM +0800, kernel test robot wrote:
> > Greetings,
> >
> > 0day kernel testing robot got the below dmesg and the first bad commit is
>
> Umm. I don't see a 'suspicious RCU usage' message in here. I
On Mon, 19 Nov 2018 at 02:37, Daniel Borkmann wrote:
>
> On 11/17/2018 07:57 PM, Ard Biesheuvel wrote:
> > Commit ede95a63b5e84 ("bpf: add bpf_jit_limit knob to restrict unpriv
> > allocations") added a call to bpf_jit_uncharge_modmem() to the routine
> > bpf_jit_binary_free() which is called
On 19/11/2018 14:18, Ramon Fried wrote:
On Tue, Oct 9, 2018 at 8:02 AM Benjamin Herrenschmidt
wrote:
On Wed, 2018-10-03 at 16:10 -0700, Alexander Duyck wrote:
-* Because 32-bit DMA masks are so common we expect every architecture
-* to be able to satisfy them - either by not
On Fri, Nov 16, 2018 at 10:24:04AM +, Andrew Murray wrote:
> Add a macro that tests if any of the perf event exclusion flags
> are set on a given event.
>
> Signed-off-by: Andrew Murray
Aside from the s/macro/function, or s/macro/helper/, this looks sound to
me.
Assuming you fix that up
On Fri, Nov 16, 2018 at 10:24:12AM +, Andrew Murray wrote:
> Replace checking of perf event exclusion flags with perf macro.
>
> This is a functional change as exclude_host and exclude_guest are added
> in the following files:
>
> - drivers/perf/qcom_l2_pmu.c
> - drivers/perf/qcom_l3_pmu.c
On Wed, Nov 14, 2018 at 11:04 AM Firoz Khan wrote:
> diff --git a/arch/powerpc/include/asm/systbl.h
> b/arch/powerpc/include/asm/systbl.h
> index 01b5171..c4321b9 100644
> --- a/arch/powerpc/include/asm/systbl.h
> +++ b/arch/powerpc/include/asm/systbl.h
> @@ -76,7 +76,6 @@
>
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