Hi Christophe,
On Wed, 2020-02-05 at 12:03 +, Christophe Leroy wrote:
> [0.00] ioremap() called early from
> find_legacy_serial_ports+0x3cc/0x474. Use early_ioremap() instead
>
I was just about to dig into this error message and found you patch. I
applied it to a v5.5 base.
>
Jordan Niethe's on March 24, 2020 9:45 am:
> On Mon, Mar 23, 2020 at 6:37 PM Nicholas Piggin wrote:
>>
>> Jordan Niethe's on March 20, 2020 3:18 pm:
>> I'm a bit against using partially constructed opaque type for things
>> like this, even if it is in the code that knows about the type. We
>>
> -Original Message-
> From: Thomas Gleixner
...
> Subject: [patch V3 08/20] hexagon: Remove mm.h from asm/uaccess.h
>
> From: Sebastian Andrzej Siewior
>
> The defconfig compiles without linux/mm.h. With mm.h included the include
> chain leands to:
> | CC
On 18/3/20 9:02 pm, Frederic Barrat wrote:
From: Philippe Bergheaud
Some opencapi FPGA images allow to control if the FPGA should be reloaded
on the next adapter reset. If it is supported, the image specifies it
through a Vendor Specific DVSEC in the config space of function 0.
Signed-off-by:
On Fri, Mar 20, 2020 at 2:25 AM Aneesh Kumar K.V
wrote:
>
>
> Hi Dan,
>
>
> Dan Williams writes:
>
> ...
>
>
> >
> >>
> >> Or are you suggesting that application should not infer any of those
> >> details looking at persistence_domain value? If so what is the purpose
> >> of exporting that
On 24/03/2020 04:20, Christoph Hellwig wrote:
> On Mon, Mar 23, 2020 at 07:58:01PM +1100, Alexey Kardashevskiy wrote:
0x100.. .. 0x101..
2x4G, each is 1TB aligned. And we can map directly only the first 4GB
(because of the maximum IOMMU table size) but not
Christophe Leroy writes:
> ping
>
>
> Le 18/02/2020 à 20:38, Christophe Leroy a écrit :
>> When a program check exception happens while MMU translation is
>> disabled, following Oops happens in kprobe_handler() in the following
>> code:
>
> Michael, we have several traps in assembly while MMU is
While running ndctl[1] tests against 5.6.0-rc7 following crash is encountered.
Bisect leads me to commit d41e2f3bd546
mm/hotplug: fix hot remove failure in SPARSEMEM|!VMEMMAP case
Reverting this commit helps and the tests complete without any crash.
pmem0: detected capacity change from 0 to
This adds new tests validating arch page table helpers for these following
core memory features. These tests create and test specific mapping types at
various page table levels.
1. SPECIAL mapping
2. PROTNONE mapping
3. DEVMAP mapping
4. SOFTDIRTY mapping
5. SWAP mapping
6. MIGRATION mapping
7.
On 24/03/2020 14:37, Alexey Kardashevskiy wrote:
>
>
> On 24/03/2020 04:20, Christoph Hellwig wrote:
>> On Mon, Mar 23, 2020 at 07:58:01PM +1100, Alexey Kardashevskiy wrote:
> 0x100.. .. 0x101..
>
> 2x4G, each is 1TB aligned. And we can map directly only the first
This series adds more arch page table helper tests. The new tests here are
either related to core memory functions and advanced arch pgtable helpers.
This also creates a documentation file enlisting all expected semantics as
suggested by Mike Rapoport (https://lkml.org/lkml/2020/1/30/40).
This
Ganesh Goudar writes:
> If we hit UE at an instruction with a fixup entry, flag to
> ignore the event and set nip to continue execution at the
> fixup entry.
You don't explain why we would want to do that. Or what the consequences
are if we *don't* do it.
As such it's unclear if this is an
This adds new tests validating for these following arch advanced page table
helpers. These tests create and test specific mapping types at various page
table levels.
1. pxxp_set_wrprotect()
2. pxxp_get_and_clear()
3. pxxp_set_access_flags()
4. pxxp_get_and_clear_full()
5.
Jordan Niethe's on March 24, 2020 12:54 pm:
> On Mon, Mar 23, 2020 at 9:21 PM Nicholas Piggin wrote:
>>
>> Jordan Niethe's on March 23, 2020 7:25 pm:
>> > On Mon, Mar 23, 2020 at 5:22 PM Nicholas Piggin wrote:
>> >>
>> >> Jordan Niethe's on March 20, 2020 3:17 pm:
>> >> > A future revision of
Chris Packham writes:
> Hi All,
>
> Just booting up v5.5.11 on a Freescale T2080RDB and I'm seeing the
> following mesage.
>
> kern.warning linuxbox kernel: Argh, can't find dcache properties !
> kern.warning linuxbox kernel: Argh, can't find icache properties !
>
> This was changed from DBG() to
On Mon, Mar 23, 2020 at 6:37 PM Nicholas Piggin wrote:
>
> Jordan Niethe's on March 20, 2020 3:18 pm:
> > For powerpc64, redefine the ppc_inst type so both word and prefixed
> > instructions can be represented. On powerpc32 the type will remain the
> > same. Update places which had assumed
Nicholas Piggin writes:
> Jordan Niethe's on March 23, 2020 7:28 pm:
>> On Mon, Mar 23, 2020 at 5:27 PM Nicholas Piggin wrote:
>>> Jordan Niethe's on March 20, 2020 3:17 pm:
>>> > Currently unsigned ints are used to represent instructions on powerpc.
>>> > This has worked well as instructions
On Fri, Mar 20, 2020 at 11:26:41AM +0100, Laurent Dufour wrote:
> This series is fixing a SVM hang occurring when starting a SVM requiring
> more secure memory than available. The hang happens in the SVM when calling
> UV_ESM.
>
> The following is happening:
>
> 1. SVM calls UV_ESM
> 2.
When building ppc64 defconfig, Clang errors (trimmed for brevity):
arch/powerpc/platforms/maple/setup.c:365:1: error: attribute declaration
must precede definition [-Werror,-Wignored-attributes]
machine_device_initcall(maple, maple_cpc925_edac_setup);
^
machine_device_initcall expands to
On 3/23/20 5:01 PM, Mina Almasry wrote:
> On Wed, Mar 18, 2020 at 3:07 PM Mike Kravetz wrote:
>>
>> The routine hugetlb_add_hstate prints a warning if the hstate already
>> exists. This was originally done as part of kernel command line
>> parsing. If 'hugepagesz=' was specified more than once,
On Fri, Mar 20, 2020 at 01:22:48PM +0100, Greg Kurz wrote:
> On Fri, 20 Mar 2020 11:26:42 +0100
> Laurent Dufour wrote:
>
> > The Hcall named H_SVM_* are reserved to the Ultravisor. However, nothing
> > prevent a malicious VM or SVM to call them. This could lead to weird result
> > and should be
Daniel Axtens writes:
> Michael Ellerman writes:
>> Daniel Axtens writes:
>>> Haren Myneni writes:
diff --git a/arch/powerpc/platforms/powernv/vas-api.c
b/arch/powerpc/platforms/powernv/vas-api.c
new file mode 100644
index 000..7d049af
--- /dev/null
+++
On Thu, Mar 19, 2020 at 07:55:10PM -0300, Fabiano Rosas wrote:
> kvmppc_uvmem_init checks for Ultravisor support and returns early if
> it is not present. Calling kvmppc_uvmem_free at module exit will cause
> an Oops:
>
> $ modprobe -r kvm-hv
>
> Oops: Kernel access of bad area, sig: 11 [#1]
>
On Mon, Mar 23, 2020 at 9:21 PM Nicholas Piggin wrote:
>
> Jordan Niethe's on March 23, 2020 7:25 pm:
> > On Mon, Mar 23, 2020 at 5:22 PM Nicholas Piggin wrote:
> >>
> >> Jordan Niethe's on March 20, 2020 3:17 pm:
> >> > A future revision of the ISA will introduce prefixed instructions. A
> >> >
On Tue, Mar 24, 2020 at 1:54 PM Jordan Niethe wrote:
>
> On Mon, Mar 23, 2020 at 9:21 PM Nicholas Piggin wrote:
> >
> > Jordan Niethe's on March 23, 2020 7:25 pm:
> > > On Mon, Mar 23, 2020 at 5:22 PM Nicholas Piggin wrote:
> > >>
> > >> Jordan Niethe's on March 20, 2020 3:17 pm:
> > >> > A
On Mon, Mar 23, 2020 at 10:13 PM Balamuruhan S wrote:
>
> On Fri, 2020-03-20 at 16:18 +1100, Jordan Niethe wrote:
> > In preparation for prefixed instructions where all instructions are no
> > longer words, use an accessor for getting a word instruction as a u32
> > from the instruction data
On Tue, Mar 24, 2020 at 1:58 PM Michael Ellerman wrote:
>
> Nicholas Piggin writes:
> > Jordan Niethe's on March 23, 2020 7:28 pm:
> >> On Mon, Mar 23, 2020 at 5:27 PM Nicholas Piggin wrote:
> >>> Jordan Niethe's on March 20, 2020 3:17 pm:
> >>> > Currently unsigned ints are used to represent
On Mon, Mar 23, 2020 at 8:28 PM Cédric Le Goater wrote:
>
> On 3/23/20 10:06 AM, Cédric Le Goater wrote:
> > On 3/19/20 7:14 AM, Haren Myneni wrote:
> >>
> >> Alloc IRQ and get trigger port address for each VAS instance. Kernel
> >> register this IRQ per VAS instance and sets this port for each
On 24/03/2020 04:22, Christoph Hellwig wrote:
> On Mon, Mar 23, 2020 at 09:07:38PM +0530, Aneesh Kumar K.V wrote:
>>
>> This is what I was trying, but considering I am new to DMA subsystem, I
>> am not sure I got all the details correct. The idea is to look at the
>> cpu addr and see if that
"Naveen N. Rao" writes:
> Segher Boessenkool wrote:
>> On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
>>> Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
>>> designs prior to PowerPC architecture version 2.01 and got obsolete
>>> from version 2.01.
We still
On 2020/3/24 8:43, Mina Almasry wrote:
> On Wed, Mar 18, 2020 at 3:07 PM Mike Kravetz wrote:
>>
>> With all hugetlb page processing done in a single file clean up code.
>
> Now that all hugepage page processing is done in a single file, clean
> up the code.
>
>> - Make code match desired
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