On Wed, Apr 12, 2023 at 03:37:50PM +0200, Uros Bizjak wrote:
> On Wed, Apr 12, 2023 at 1:33 PM Peter Zijlstra wrote:
> >
> > On Wed, Apr 05, 2023 at 04:17:08PM +0200, Uros Bizjak wrote:
> > > diff --git a/arch/powerpc/include/asm/local.h
> > > b/arch/powerpc/include/asm/local.h
> > > index
On Wed, Dec 28, 2022 at 03:51:29PM +0100, Uwe Kleine-König wrote:
> The four exported functions mpc52xx_lpbfifo_submit(),
> mpc52xx_lpbfifo_abort(), mpc52xx_lpbfifo_poll(), and
> mpc52xx_lpbfifo_start_xfer() are not used. So they can be dropped and the
> definitions needed to call them can be
On 11-04-23, 14:43, Sean Anderson wrote:
> This adds support for the Lynx 10G "SerDes" devices found on various NXP
> QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
> supporting up to eight lanes. Protocol support for each SerDes is highly
> heterogeneous, with each SoC
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 7d8214bba44c1aa6a75921a09a691945d26a8d43 Add linux-next specific
files for 20230412
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303161521.jbgbafjj-...@intel.com
https
On Tue, Apr 04, 2023 at 06:50:01AM -0500, Justin Forbes wrote:
> On Tue, Apr 4, 2023 at 2:22 AM Mike Rapoport wrote:
> > On Wed, Mar 29, 2023 at 10:55:37AM -0500, Justin Forbes wrote:
> > > On Sat, Mar 25, 2023 at 1:09 AM Mike Rapoport wrote:
> > > >
> > > > From: "Mike Rapoport (IBM)"
> > > >
On Wed, Apr 12, 2023 at 1:33 PM Peter Zijlstra wrote:
>
> On Wed, Apr 05, 2023 at 04:17:08PM +0200, Uros Bizjak wrote:
> > diff --git a/arch/powerpc/include/asm/local.h
> > b/arch/powerpc/include/asm/local.h
> > index bc4bd19b7fc2..45492fb5bf22 100644
> > --- a/arch/powerpc/include/asm/local.h
>
Hello,
On Fri, Mar 10, 2023 at 11:41:22PM +0100, Uwe Kleine-König wrote:
> Hello,
>
> many bus remove functions return an integer which is a historic
> misdesign that makes driver authors assume that there is some kind of
> error handling in the upper layers. This is wrong however and returning
On Wed, Apr 12, 2023 at 8:32 PM wrote:
>
> include/linux/compiler_attributes.h | 12
Acked-by: Miguel Ojeda
Cheers,
Miguel
On Tue, Apr 11, 2023 at 01:03:02PM -0500, Terry Bowman wrote:
> From: Robert Richter
>
> RCEC AER corrected and uncorrectable internal errors (CIE/UIE) are
> disabled by default.
"Disabled by default" just means "the power-up state of CIE/UIC is
that they are masked", right? It doesn't mean
> -Original Message-
> From: Uwe Kleine-König
> Sent: Wednesday, April 12, 2023 12:11 PM
> To: Stuart Yoder ; Laurentiu Tudor
> ; Roy Pledge ; Leo Li
> ; Horia Geanta ; Pankaj
> Gupta ; Gaurav Jain ;
> Herbert Xu ; David S. Miller
> ; Vinod Koul ; Ioana Ciornei
> ; Eric Dumazet ; Jakub
On Tue, Apr 11, 2023 at 01:03:01PM -0500, Terry Bowman wrote:
> From: Robert Richter
>
> In Restricted CXL Device (RCD) mode a CXL device is exposed as an
> RCiEP, but CXL downstream and upstream ports are not enumerated and
> not visible in the PCIe hierarchy. Protocol and link errors are sent
On Wed, Apr 12, 2023 at 11:32:12AM -0700, ndesaulni...@google.com wrote:
> Back during the discussion of
> commit a9a3ed1eff36 ("x86: Fix early boot crash on gcc-10, third try")
> we discussed the need for a function attribute to control the omission
> of stack protectors on a per-function basis;
On Wed, Mar 01, 2023 at 03:47:29PM -0800, Ricardo Neri wrote:
> Hi x86 trusted reviewers,
>
> This is the seventh version of this patchset. I acknowledge that it took me
> a long time to post a new version. Sorry! I will commit time to continue
> working on this series with high priority and I
Hello Christophe,
Thanks for the review.
On 07/04/23 11:31 am, Christophe Leroy wrote:
Le 06/04/2023 à 09:35, Hari Bathini a écrit :
Since commit 85e031154c7c ("powerpc/bpf: Perform complete extra passes
to update addresses"), two additional passes are performed to avoid
space and CPU time
Back during the discussion of
commit a9a3ed1eff36 ("x86: Fix early boot crash on gcc-10, third try")
we discussed the need for a function attribute to control the omission
of stack protectors on a per-function basis; at the time Clang had
support for no_stack_protector but GCC did not. This was
Hi Vinod,
On 4/12/23 12:10, Vinod Koul wrote:
On 11-04-23, 14:43, Sean Anderson wrote:
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is
Hi Vinod,
On 4/12/23 12:10, Vinod Koul wrote:
On 11-04-23, 14:43, Sean Anderson wrote:
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is
Uwe Kleine-König writes:
> On Wed, Dec 28, 2022 at 03:51:29PM +0100, Uwe Kleine-König wrote:
>> The four exported functions mpc52xx_lpbfifo_submit(),
>> mpc52xx_lpbfifo_abort(), mpc52xx_lpbfifo_poll(), and
>> mpc52xx_lpbfifo_start_xfer() are not used. So they can be dropped and the
>> definitions
memalign() is obsolete according to its manpage.
Replace memalign() with posix_memalign() and remove malloc.h include
that was there for memalign().
As a pointer is passed into posix_memalign(), initialize *s to NULL
to silence a warning about the function's return value being used as
prevent_tail_call_optimization was added in
commit a9a3ed1eff36 ("x86: Fix early boot crash on gcc-10, third try")
to work around stack canaries getting inserted into functions that would
initialize the stack canary in the first place.
Now that we have no_stack_protector function attribute
Hi Vinod,
On 4/12/23 12:10, Vinod Koul wrote:
On 11-04-23, 14:43, Sean Anderson wrote:
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is
On Wed, Apr 12, 2023 at 11:32:13AM -0700, ndesaulni...@google.com wrote:
> prevent_tail_call_optimization was added in
> commit a9a3ed1eff36 ("x86: Fix early boot crash on gcc-10, third try")
> to work around stack canaries getting inserted into functions that would
> initialize the stack canary
er_attributes.h | 12
init/main.c | 8 +++-
3 files changed, 20 insertions(+), 1 deletion(-)
---
base-commit: 0bcc4025550403ae28d2984bddacafbca0a2f112
change-id: 20230412-no_stackp-a98168a2bb0a
Best regards,
--
Nick Desaulniers
Hi,
On 2023-04-11 16:35:10, Michael Ellerman wrote:
> Kautuk Consul writes:
> > On 2023-04-07 09:01:29, Sean Christopherson wrote:
> >> On Fri, Apr 07, 2023, Bagas Sanjaya wrote:
> >> > On Fri, Apr 07, 2023 at 05:31:47AM -0400, Kautuk Consul wrote:
> >> > > I used the unlikely() macro on the
Thomas Zimmermann writes:
> Replace the architecture's fb_is_primary_device() with the generic
> one from . No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Michael Ellerman
> Cc: Nicholas Piggin
> Cc: Christophe Leroy
> ---
> arch/powerpc/include/asm/fb.h | 8 +++-
> 1
memalign() is obsolete according to its manpage.
Replace memalign() with posix_memalign() and remove malloc.h include
that was there for memalign().
As a pointer is passed into posix_memalign(), initialize *s to NULL
to silence a warning about the function's return value being used as
On Wed, Apr 05, 2023 at 04:17:08PM +0200, Uros Bizjak wrote:
> diff --git a/arch/powerpc/include/asm/local.h
> b/arch/powerpc/include/asm/local.h
> index bc4bd19b7fc2..45492fb5bf22 100644
> --- a/arch/powerpc/include/asm/local.h
> +++ b/arch/powerpc/include/asm/local.h
> @@ -90,6 +90,17 @@ static
On 11/04/2023 20:43, Sean Anderson wrote:
> This is a generic binding for simple MMIO GPIO controllers. Although we
> have a single driver for these controllers, they were previously spread
> over several files. Consolidate them. The register descriptions are
> adapted from the comments in the
Deming Wang writes:
> memalign() is obsolete according to its manpage.
>
> Replace memalign() with posix_memalign() and remove malloc.h include
> that was there for memalign().
>
> As a pointer is passed into posix_memalign(), initialize *s to NULL
> to silence a warning about the function's
Hamza Mahfooz writes:
> On 4/4/23 06:28, Michael Ellerman wrote:
>> The amdgpu driver builds some of its code with hard-float enabled,
>> whereas the rest of the kernel is built with soft-float.
>>
>> When building with 64-bit long double, if soft-float and hard-float
>> objects are linked
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