On Wed, Sep 05, 2007 at 03:27:31PM -0700, Dan Malek wrote:
> On Sep 5, 2007, at 1:59 PM, Scott Wood wrote:
>
> >BTW, it seems I misremembered what the conflict was -- it's not with
> >ioremap space, but with the default location of the consistent memory
> >pool (at 0xff10).
>
> Change the con
On Wed, Sep 05, 2007 at 03:42:03PM -0700, Dan Malek wrote:
> On Sep 5, 2007, at 3:23 PM, Scott Wood wrote:
>
> >The IMMRs I've seen from the bootloader are ff00 (Freescale
> >boards)
> >and fa20 (Embedded Planet). AFAICT, the number of fixed TLB
> >entries
> >is fixed at 4 on these ch
Oops!
Could you give us a live show version? :D
Cheers!
- zw
> -Original Message-
> From: [EMAIL PROTECTED]
> [mailto:[EMAIL PROTECTED]
> g] On Behalf Of Timur Tabi
> Sent: Wednesday, September 05, 2007 10:54 AM
> To: linuxppc-dev@ozlabs.org
> Subject: Keep On Debugging You
>
> I wrot
On Wed, Sep 05, 2007 at 09:30:16PM +0400, Valentine Barshak wrote:
> The patch adds support for the 64-bit resources to the PCI
> iomap code.
>
> Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
Acked-by: David Gibson <[EMAIL PROTECTED]>
--
David Gibson| I'll have my mus
Hi all,
I noticed in the ALSA tree:
-- sound/sparc/dbri.c --
index 12d11fc..e96023f 100644
@@ -66,6 +66,7 @@
#include
#include
+#include
#include
#include
(I don't mean to pick on this particular example, it is just what was in
f
On Sep 5, 2007, at 3:23 PM, Scott Wood wrote:
> The IMMRs I've seen from the bootloader are ff00 (Freescale
> boards)
> and fa20 (Embedded Planet). AFAICT, the number of fixed TLB
> entries
> is fixed at 4 on these chips, so using the fourth for flash
> wouldn't take
> away any gen
On Sep 5, 2007, at 1:59 PM, Scott Wood wrote:
> BTW, it seems I misremembered what the conflict was -- it's not with
> ioremap space, but with the default location of the consistent memory
> pool (at 0xff10).
Change the configuration option to move this somewhere
else, outside of the wired m
On Wed, Sep 05, 2007 at 03:08:28PM -0700, Dan Malek wrote:
> All of this worked in 2.4, many changes were part
> of the evolution in 2.6... configurable pinned entries,
> large page sizes, variations, I didn't keep track of
> all of this. I just assumed I'd have to fix it all if I
> ever needed t
On Sep 5, 2007, at 1:53 PM, Scott Wood wrote:
> Where is the code that checks for pinned TLB entries on 8xx when doing
> ioremap?
I don't know. I haven't been the maintainer for the 2.6
changes.
> Why could this not be done with a 512K mapping? How was this
> even tested, given the obvious
This allows platform suspend code to re-use the generic state saving
code, passing a pointer to the low-level suspend code.
The resume path is modified so that non-hibernate callers skip
hibernate-specific bits, and so that callers can specify that the MMU is
off (and thus BATs should be restored)
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/6xx-suspend.S | 52 +
arch/powerpc/sysdev/Makefile |4 +++
include/asm-powerpc/mpc6xx.h |6
3 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 arch/
The e300 core (and probably most other 6xx chips) can only come out of
sleep mode with an interrupt. However, interrupts are logically disabled
by the power management layer.
This hack extends the existing doze/nap hack to also suppress the running
of the interrupt handler when in sleep mode.
Si
These hooks ensure that a decrementer interrupt is not pending when
suspending; otherwise, problems may occur. For example, with deep sleep
on the 831x, a pending decrementer will cause a system freeze because the
SoC thinks the decrementer interrupt would have woken the system, but the
core must
Previously, the TLB miss handlers assumed that pages above KERNELBASE are
always present and read/write. This assumption is false in the case of
CONFIG_DEBUG_PAGEALLOC.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/head_32.S | 12 ++--
1 files changed, 6 inserti
On Wed, Sep 05, 2007 at 04:57:08PM -0500, Olof Johansson wrote:
> On Wed, Sep 05, 2007 at 02:13:13PM -0500, Scott Wood wrote:
> > As suggested by David Gibson, now that we have a separate node
> > for the baud rate generators, it's better to use the standard
> > clock-frequency property than a cpm-
On Wed, Sep 05, 2007 at 02:13:13PM -0500, Scott Wood wrote:
> As suggested by David Gibson, now that we have a separate node
> for the baud rate generators, it's better to use the standard
> clock-frequency property than a cpm-node-level fsl,brg-frequency
> property.
>
> This patch updates existin
On Wed, 5 Sep 2007 14:21:10 -0500
Scott Wood <[EMAIL PROTECTED]> wrote:
> This will be needed by PlanetCore firmware support.
Bamboo would like to use this too. And probably anything else that has
PIBS as a bootloader. I could forsee Holly using this too.
josh
_
On Wed, 5 Sep 2007 22:17:03 +0400
Valentine Barshak <[EMAIL PROTECTED]> wrote:
> Is anybody working on the device-tree-aware ppc 44x NAND flash controller
> (ndfc) driver?
Not to my knowledge. We sort of need a decent binding for NAND flash
in general first. And David's recent flash binding d
On Wed, Sep 05, 2007 at 03:53:01PM -0500, Scott Wood wrote:
> I didn't change it on a whim, I changed it because ioremap() wasn't
> working the way it currently is.
BTW, it seems I misremembered what the conflict was -- it's not with
ioremap space, but with the default location of the consistent m
On Wed, Sep 05, 2007 at 01:36:43PM -0700, Dan Malek wrote:
>
> On Sep 5, 2007, at 12:27 PM, Scott Wood wrote:
>
> >1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting
> >with
> >the default ioremap region.
>
> The original reason to map 8M was so ioremap()
> could use the same w
On Sep 5, 2007, at 12:27 PM, Scott Wood wrote:
> 1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting
> with
> the default ioremap region.
The original reason to map 8M was so ioremap()
could use the same wired TLB rather than allocate
page table entries. It should also cover al
On 5 Sep, Andrew Morton wrote:
>> On Wed, 05 Sep 2007 19:47:42 +0200 Stefan Richter <[EMAIL PROTECTED]> wrote:
>> >>> Trying to free already-free IRQ 40
>> >>> pci_set_power_state(): 0002:20:0e.0: state=3, current state=5
>> >>> firewire_ohci: pci_set_power_state failed with
>> >>> -22<3>pci_devi
> On Wed, 05 Sep 2007 19:47:42 +0200 Stefan Richter <[EMAIL PROTECTED]> wrote:
> Andrew Morton wrote:
> >>> Trying to free already-free IRQ 40
> >>> pci_set_power_state(): 0002:20:0e.0: state=3, current state=5
> >>> firewire_ohci: pci_set_power_state failed with
> >>> -22<3>pci_device_suspend():
1. PCI and reset are factored out into pq2.c. I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).
2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-p
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/pq2fads.dts | 236
arch/powerpc/configs/pq2fads_defconfig | 1003
arch/powerpc/platforms/82xx/Kconfig| 11 +
arch/powerpc/platforms/82xx/Makefile |1 +
arch/powerpc/p
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/mpc8272_ads.c | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c
b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 64e8ca9..994a
This is just a rename patch; internal references to mpc82xx_ads will be
changed in the next one.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/Kconfig|8
arch/powerpc/platforms/82xx/Makefile |2 +-
.../82xx/{mpc82xx_ad
m82xx_calibrate_decr(), mpc82xx_ads_show_cpuinfo(), and mpc82xx_halt() do
anything useful beyond what the generic code does.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/Makefile |1 -
arch/powerpc/platforms/82xx/mpc82xx.c | 109 -
The 8272 (and presumably other PCI PQ2 chips) appear to have the
same issue as the 83xx regarding PCI streaming DMA.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
include/asm-powerpc/cputable.h | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/asm-power
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 33 +
include/asm-powerpc/cpm2.h|9 +
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 100 +++--
include/asm-powerpc/cpm2.h|5 ++-
2 files changed, 99 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c
b/arch/powerpc/sysdev/c
The hardware adds one to the BRG value to get the divider, so it must
be subtracted by software. Without this patch, characters will occasionally
be corrupted.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c |2 +-
1 files changed, 1 insertions(+), 1 delet
Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 56 +---
arch/powerpc/sysdev/cpm2_pic.c|2 +-
inclu
This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile|4 +-
arch/powerpc/boot/dts/ep88xc.dts | 191 +
arch/powerpc/boot/ep88xc.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/adder875.dts| 159 +++
arch/powerpc/configs/adder875_config | 794 +
arch/powerpc/platforms/8xx/Kconfig|9 +
arch/powerpc/platforms/8xx/Makefile |1 +
arch/powerpc/platf
It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/mpc885ads.dts | 191 ++-
arch/powerpc/configs/mpc885_ads_defconfig| 297 +
arch/p
From: John Traill <[EMAIL PROTECTED]>
The 8xx can only support a max of 8M during early boot (it seems a lot of
8xx boards only have 8M so the bug was never triggered), but the early
allocator isn't aware of this. The following change makes it able to run
with larger memory.
Signed-off-by: Vital
On arch/ppc, Soft_emulate_8xx was used when full math emulation was
turned off to emulate a minimal subset of floating point load/store
instructions, to avoid needing a soft-float toolchain. This function
is called, but not present, on arch/powerpc, causing a build error
if floating point emulatio
The CPU15 erratum on MPC8xx chips can cause incorrect code execution
under certain circumstances, where there is a conditional or indirect
branch in the last word of a page, with a target in the last cache line
of the next page. This patch implements one of the suggested
workarounds, by forcing a
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.
The clock function is mostly duplicated from the cpm2 version;
hopefully this stuff can be merged at some point.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/comm
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kerne
1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting with
the default ioremap region.
2. The wrong register was being loaded into SPRN_MD_RPN.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/head_8xx.S | 10 +-
1 files changed, 5 insertions(+), 5 dele
Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/serial/cpm_uart/cpm_uart.h | 42 +++--
drivers/serial/cpm_uart/cpm_uart_core.c | 299 -
This prevents some bootloader/bootwrapper characters from being lost.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/serial/cpm_uart/cpm_uart_core.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_
The existing OF glue code was crufty and broken. Rather than fix it,
it has been removed, and the serial driver now talks to the device tree
directly.
The non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM platforms
are dropped from arch/ppc (which will hopefully be soon), and existing
arch
These I/O accessors will be used in code under drivers/,
which is expected to still work in arch/ppc.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
include/asm-ppc/io.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index
fsl_get_immr() is equivalent to the kernel's get_immrbase() function.
mpc885_get_clock() transforms a crystal frequency into a system frequency
according to the PLL register settings.
pq2_get_clocks() does the same as the above for the PowerQUICC II,
except that it produces several different cloc
It will be needed for PlanetCore firmware support.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/flatdevtree_env.h | 14 +-
arch/powerpc/boot/string.S | 13 +
arch/powerpc/boot/string.h |1 +
3 files changed, 15 insertions(+)
Some firmwares (such as PlanetCore) only provide a base MAC address, and
expect the kernel to set certain bits to generate the addresses for the
other ports. As such, MAC addresses are generated that may not correspond
to actual hardware.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/po
This target produces a flat binary rather than an ELF file,
fixes the entry point at the beginning of the image, and takes
a complete device tree with no fixups needed.
The device tree must have labels on /#address-cells, the timebase
frequency, and the memory size.
Signed-off-by: Scott Wood <[EM
This is a library that board code can use to extract information from the
PlanetCore configuration keys. PlanetCore is used on various boards from
Embedded Planet.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile |2 +-
arch/powerpc/boot/planetcore.c | 164 ++
This will be needed by PlanetCore firmware support.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile |2 +-
arch/powerpc/boot/stdlib.c | 45
arch/powerpc/boot/stdlib.h |6 +
3 files changed, 52 insertions(+), 1
This will be used by the PlanetCore firmware support to construct
a linux,stdout-path from the serial node that it finds.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/flatdevtree.c | 59 ++
arch/powerpc/boot/flatdevtree.h |1 +
Kumar insisted on not splitting the PCI ito bus and control nodes,
but rather hacking extra entries into the soc node's ranges.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/cuboot-pq2.c | 25 -
1 files changed, 8 insertions(+), 17 deletions(-)
dif
1. ft_create_node was returning the internal pointer rather than a phandle.
2. ft_find_device_rel was treating a "top" phandle of NULL as an error,
rather than as the root of the tree. The old, absolute ft_find_device
is removed, and the relative version is renamed to ft_find_device().
Signed-off
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/cuboot-pq2.c |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/cuboot-pq2.c b/arch/powerpc/boot/cuboot-pq2.c
index b150bd4..fef2d15 100644
--- a/arch/powerpc/boot/cuboot-pq2.c
+++ b/
This is the latest set of bootwrapper patches... I'm sending it
via Kumar rather than Paul, even though there are several non-fsl-soc
patches, because later 8xx and 82xx patchsets will depend on them.
-Scott
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This code assumes that the ports have been previously set up, with
buffers in DPRAM.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/Kconfig.debug | 21
arch/powerpc/kernel/head_32.S | 16
arch/powerpc/kernel/udbg.c |2 +
a
This introduces a new device binding for the CPM and other devices on
these boards. Some of the changes include:
1. Proper namespace scoping for Freescale compatibles and properties.
2. Use compatible rather than things like device_type and model
to determine which particular variant of a device
On Wed, Sep 05, 2007 at 09:12:30PM +0200, Guennadi Liakhovetski wrote:
> On Thu, 12 Jul 2007, Scott Wood wrote:
>
> > Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
> > ---
> > arch/powerpc/sysdev/6xx-pm.S | 52
> > ++
> > arch/powerpc/sysdev/Makefile |
As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.
This patch updates existing places where fsl,brg-frequency is
used.
Signed-off-by: Scott Wood <[E
On Thu, 12 Jul 2007, Scott Wood wrote:
> Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
> ---
> arch/powerpc/sysdev/6xx-pm.S | 52
> ++
> arch/powerpc/sysdev/Makefile |4 +++
> include/asm-powerpc/mpc6xx.h |6 +
> 3 files changed, 62 insertion
>>> On 30 Aug 2007 22:42:46 +0200 "Tim Teulings" <[EMAIL PROTECTED]> wrote:
>>> The kernel is:
Linux kismet 2.6.22-1-powerpc #1 Sun Jul 29 13:58:06 CEST 2007 ppc
GNU/Linux
>>> The relveant debian package:
linux-image-2.6.22-1-powerpc_2.6.22-3_powerpc.deb
>>> I'm running a mixture of
Stefan Richter wrote:
> Randy Dunlap wrote:
>> On Wed, 5 Sep 2007 10:07:54 -0700 Andrew Morton wrote:
So here is the output from dmesg that suggested to me that firewire
might be a problem:
>>> Straightforward regression, two reporters, nothing happening.
>> (material for ksummit discuss
Rogério Brito wrote on 2007-08-27:
> If things progress well, I will incrementally include features on the
> kernel that I need (I left out, for instance, the Firewire subsystem, so
> that compilation wouldn't take more than an hour here, despite the fact
> that I do need Firewire support on the ke
Is anybody working on the device-tree-aware ppc 44x NAND flash controller
(ndfc) driver?
Thanks,
Valentine.
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From: Stefan Richter <[EMAIL PROTECTED]>
Subject: firewire: fw-ohci: ignore failure of pci_set_power_state (fix suspend
regression)
Fixes "Sleep problems with kernels >= 2.6.21 on powerpc",
http://lkml.org/lkml/2007/8/25/155.
Like it was suggested earlier in http://lkml.org/lkml/2006/10/24/13,
w
Andrew Morton wrote:
>> On 30 Aug 2007 22:42:46 +0200 "Tim Teulings" <[EMAIL PROTECTED]> wrote:
>> Hello!
>>
>>> I don't have traces at hand and due to lack of time cannot reproduce it
>>> up to tomorrow. However this hint may speed up your analysis!
>> Sorry for the delay, but my desktop PC had a
Randy Dunlap wrote:
> On Wed, 5 Sep 2007 10:07:54 -0700 Andrew Morton wrote:
>>> So here is the output from dmesg that suggested to me that firewire
>>> might be a problem:
>> Straightforward regression, two reporters, nothing happening.
>
> (material for ksummit discussion, e.g.)
It's a simple
On Wed, 29 Aug 2007 17:35:20 +0400
Valentine Barshak <[EMAIL PROTECTED]> wrote:
> The following patches add initial PowerPC 440EPx Sequoia board support.
> The code is based mainly on the Bamboo board support by Josh Boyer.
> These patches have been modified according the comments for the previous
On Wed, Sep 05, 2007 at 11:39:57AM +0400, Vitaly Bordug wrote:
> > Note that this code is mostly duplicated from the existing CPM2
> > version.
> >
> Then it would be good to mention that in short comment block before function.
The code would very quickly become unreadable if we kept comments aro
PCI memory space may have a 64-bit offset on some architectures
and the actual PCI memory address has to fixed up before remapping.
So, pci_iomap should be used instead of reading and remapping PCI BAR
directly.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
--- linux-2.6.orig/drivers/p
The patch adds support for the 64-bit resources to the PCI
iomap code.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
--- linux-2.6.orig/arch/powerpc/kernel/iomap.c 2007-09-04 21:15:13.0
+0400
+++ linux-2.6.bld/arch/powerpc/kernel/iomap.c 2007-09-05 21:06:39.0
+0400
On Wed, 5 Sep 2007 10:07:54 -0700 Andrew Morton wrote:
> > On 30 Aug 2007 22:42:46 +0200 "Tim Teulings" <[EMAIL PROTECTED]> wrote:
> > Hello!
> >
> > > I don't have traces at hand and due to lack of time cannot reproduce it
> > > up to tomorrow. However this hint may speed up your analysis!
> >
Vitaly Bordug wrote:
> In fact, loosely move of arch/ppc bits, though regions are
> set up using values from ranges property. This also adds
> setup_indirect_pci_noremap() function to handle indirect
> PCI without one more ioremap.
>
> Signed-off-by: Vitaly Bordug <[EMAIL PROTECTED]>
> Signed-off-
> On 30 Aug 2007 22:42:46 +0200 "Tim Teulings" <[EMAIL PROTECTED]> wrote:
> Hello!
>
> > I don't have traces at hand and due to lack of time cannot reproduce it
> > up to tomorrow. However this hint may speed up your analysis!
>
> Sorry for the delay, but my desktop PC had an urgent hard disk pr
Updated patch below. NOTE: This relies on Scott Wood's strtoull patch
as PIBS stores the MAC addresses as ASCII strings in flash.
Add a cuboot wrapper for the Bamboo board. This also removes some obsoleted
linker declarations that have been moved into ops.h
Signed-off-by: Josh Boyer <[EMAIL PR
Updated patch below
Add zImage wrapper for walnut board
Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile |3
arch/powerpc/boot/dcr.h |5 +
arch/powerpc/boot/treeboot-walnut.c | 131
3 files changed,
Updated DTS below
Device tree source file for the PPC405 Walnut evaluation board.
Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/walnut.dts | 183 +++
1 file changed, 183 insertions(+)
--- /dev/null
+++ linux-2.6/arch/powerpc/boot/d
Convert the io_req_t members to kio_addr_t, to allow use on machines with
more than 16 bits worth of IO port address space (ppc64 in this case,
but it applies to others as well).
Signed-off-by: Olof Johansson <[EMAIL PROTECTED]>
---
I'm not at home in the PCMCIA stack, so I'd appreciate som
On Sep 4, 2007, at 9:40 AM, Ben Buchli wrote:
> On Wednesday 22 August 2007 15:52:09 Kumar Gala wrote:
>> On Aug 22, 2007, at 1:37 PM, Ben Buchli wrote:
>>> Hello everybody,
>>> I was wondering what the status was on supporting floating-point
>>> instructions
>>> for the mpc8548. I found the sug
On Wed, Sep 05, 2007 at 03:40:23PM +0400, Anton Vorontsov wrote:
> On Tue, Sep 04, 2007 at 01:20:28PM -0500, Scott Wood wrote:
> > The kernel is of course welcome to do so -- and this may be a valid
> > reason to attach pin information to specific device nodes, if it actually
> > saves a non-neglig
On Wed, 2007-09-05 at 15:46 +1000, David Gibson wrote:
> > > > > There must surely be a way to get the MAC addresses out of OpenBIOS...
> > > >
> > > > Probably. I just need to find out where they are stored.
> > >
> > > It's not buried somewhere in the arch/ppc/boot code?
> >
> > It's not Open
Original-Nachricht
> Datum: Wed, 5 Sep 2007 12:48:05 +1000
> Von: David Gibson <[EMAIL PROTECTED]>
> An: Gerhard Pircher <[EMAIL PROTECTED]>
> CC: Segher Boessenkool <[EMAIL PROTECTED]>, linuxppc-dev@ozlabs.org
> Betreff: Re: [RFC] AmigaOne device tree source v2
> That looks tot
>> Hrm.. I'm still slightly uneasy though. In my Ebony device tree, the
>> POB's ranges exists to embed the 32-bit OPB space into the 64-bit PLB
>> space by tacking on a 0x1 in bits 32:35. In your 405gp ranges, you're
>> describing just the address range used by OPB peripherals
>> (0xef60-0xf
On Tue, Sep 04, 2007 at 01:20:28PM -0500, Scott Wood wrote:
> On Tue, Sep 04, 2007 at 02:47:50PM +0400, Anton Vorontsov wrote:
> > > _and system GPIOs_ :-)
> >
> > Yup, firmware should set up gpios, to make initial kernel boot.
>
> No, it should set all pins and similar setup-once type initializa
Grant Likely wrote:
> On 9/4/07, Thomas Gerlach <[EMAIL PROTECTED]> wrote:
>
>> hi folks,
>>
>>
>> my name is thomas trying to make embedded linux run on a powerpc, but we've
>> got special boards here, although we use a xilinx virtex4 fpga...
>>
>> as you said in the nabble-thread (see subject
On Fri, 31 Aug 2007 15:44:18 -0500
Scott Wood wrote:
> > > + u32 mask = 7;
> > > +
> > gotta at least briefly explain the clue here, too.
>
> I'm not sure what you mean... what exactly are you asking me to
> explain?
>
> Note that this code is mostly duplicated from the existing CPM2
> versi
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