On Thu, 29 Nov 2007 12:01:08 +0530 Kamalesh Babulal [EMAIL PROTECTED] wrote:
Andrew Morton wrote:
On Wed, 28 Nov 2007 12:47:19 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Andrew Morton wrote:
On Wed, 28 Nov 2007 11:59:00 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Hi,
Hi Andrew,
While running file system stress on nfs and cifs mounted partitions, the machine
drops to xmon
1:mon e
cpu 0x1: Vector: 300 (Data Access) at [c00080a9f880]
pc: c01392c8: .inotify_inode_queue_event+0x50/0x158
lr: c01074d0: .vfs_link+0x204/0x298
sp:
Andrew Morton wrote:
On Thu, 29 Nov 2007 12:01:08 +0530 Kamalesh Babulal [EMAIL PROTECTED] wrote:
Andrew Morton wrote:
On Wed, 28 Nov 2007 12:47:19 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Andrew Morton wrote:
On Wed, 28 Nov 2007 11:59:00 +0530 Kamalesh Babulal [EMAIL PROTECTED]
On Thursday 29 November 2007, Tony Breeds wrote:
why not?
In the past I've seen run-time problems because some parts of the
code kmalloc NR_CPUS sized arrays, which can easily grow beyond
the kmalloc limit of 128kb. Have you tried running some tests
on a small machine with the big NR_CPUS?
On Wed, Nov 28, Linas Vepstas wrote:
On Wed, Nov 28, 2007 at 12:00:37PM +0100, Olaf Hering wrote:
On Tue, Nov 27, Will Schmidt wrote:
- if (panic_timeout)
- return;
This change is wrong. Booting with panic=123 really means the system
has to reboot in 123
Hi,
hwclock --debug tells me:
hwclock: Open of /dev/rtc failed, errno=19: No such device.
Well... did you check how your /dev/rtc is set up? It used to be a
misc device with MAJ=10 MIN=135 in old kernel versions, but now it's
MAJ=254 MIN=4, i. e. it should look like this:
On Wed, 28 Nov 2007 21:06:36 -0700
Alan Bennett wrote:
It comes from uboot. Can you point me in the right direction to make
sure its right?
PowerPC,[EMAIL PROTECTED] {
device_type = cpu;
reg = 0;
Andrew Morton wrote:
On Thu, 29 Nov 2007 14:30:14 +0530 Kamalesh Babulal [EMAIL PROTECTED] wrote:
Hi Andrew,
While running file system stress on nfs and cifs mounted partitions, the
machine
drops to xmon
1:mon e
cpu 0x1: Vector: 300 (Data Access) at [c00080a9f880]
pc:
My uboot is new-ish, but I don't have the fdt commands? U-Boot 1.3.0
g992742a5-dirty
u-boot:clock configuration
===
MPC8248 Clock Configuration
- Bus-to-Core Mult 3.5x, VCO Div 2, 60x Bus Freq 30-85 , Core Freq 100-300
- dfbrg 1, corecnf 0x1e, busdf 3, cpmdf 1, plldf
Jan Kara wrote:
On Thu 29-11-07 17:27:08, Kamalesh Babulal wrote:
Andrew Morton wrote:
On Thu, 29 Nov 2007 14:30:14 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Hi Andrew,
While running file system stress on nfs and cifs mounted partitions, the
machine
drops to xmon
1:mon e
cpu
Hello folks,
The following patch sequence is Emerson KatanaQp board support reworked after
initial review/discussion.
The patches are incremental to minor mv64x60 code fixups sent by
Mark A. Greer on 11/08/07.
Let me know if you think that some updates/changes needed.
As for Vitaly's and
Michael, thanks for your reply...
I am seeing the segmentation fault both on the default SLES10 initrd and
the default RHEL5.1 initrd. Therefore, I am reasonably sure this is a
problem with my kernel build and not the initrd itself.
On Thu, 2007-11-29 at 10:39 +1100, Michael Ellerman wrote:
On
On Wed, 28 Nov 2007, Geert Uytterhoeven wrote:
+static inline void warn_emulated_sysctl_register(void)
+{
+ int res = register_sysctl_table(warn_emulated_sysctl_root);
^^
+ printk(@@@ register_sysctl_table() returned %d\n, res);
This patch adds new functionality to MV64x60 boot code. The changes are required
to access DevCS windows registers and set PCI bus and devfn numbers for MV644x60
PCI/PCI-X interfaces.
Signed-off-by: Andrei Dolnikov [EMAIL PROTECTED]
---
mv64x60.c | 74
Bootwrapper sources for Emerson Katana Qp
Signed-off-by: Andrei Dolnikov [EMAIL PROTECTED]
---
Makefile |3
cuboot-katanaqp.c | 470 ++
2 files changed, 472 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/Makefile
Device tree source file for the Emerson Katana Qp board
Signed-off-by: Andrei Dolnikov [EMAIL PROTECTED]
---
katanaqp.dts | 360 +++
1 files changed, 360 insertions(+)
diff --git a/arch/powerpc/boot/dts/katanaqp.dts
Emerson Katana Qp platform specific code
Signed-off-by: Andrei Dolnikov [EMAIL PROTECTED]
---
Kconfig|9 +++
Makefile |1
katanaqp.c | 168 +
3 files changed, 178 insertions(+)
diff --git
Default kernel config for Emerson Katana Qp board
Signed-off-by: Andrei Dolnikov [EMAIL PROTECTED]
---
katanaqp_defconfig | 941 +
1 files changed, 941 insertions(+)
diff --git a/arch/powerpc/configs/katanaqp_defconfig
On Thu 29-11-07 17:27:08, Kamalesh Babulal wrote:
Andrew Morton wrote:
On Thu, 29 Nov 2007 14:30:14 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Hi Andrew,
While running file system stress on nfs and cifs mounted partitions, the
machine
drops to xmon
1:mon e
cpu 0x1:
On Thu 29-11-07 17:27:08, Kamalesh Babulal wrote:
Andrew Morton wrote:
On Thu, 29 Nov 2007 14:30:14 +0530 Kamalesh Babulal [EMAIL PROTECTED]
wrote:
Hi Andrew,
While running file system stress on nfs and cifs mounted partitions, the
machine
drops to xmon
1:mon e
cpu 0x1:
On Wed, 2007-11-28 at 14:18 -0600, Linas Vepstas wrote:
On Tue, Nov 27, 2007 at 06:15:59PM -0600, Will Schmidt wrote:
(resending with the proper from addr this time).
I'm seeing some funky behavior on power5/power6 partitions with this
patch.A /sbin/reboot is now behaving much
This is a cleanup patch set. It does convert for(...)/while(...) cycles
into appropriate for_each_...() macros calls.
The patch set is splitted up in idea to hold changes localy
to a specified platform.
Any comments are welcome.
Cyrill
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.c |7 +++
arch/powerpc/sysdev/mv64x60_dev.c | 24 ++--
arch/powerpc/sysdev/mv64x60_pci.c |4 ++--
arch/powerpc/sysdev/mv64x60_udbg.c
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/kernel/btext.c |2 +-
arch/powerpc/kernel/legacy_serial.c |8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/btext.c
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/platforms/82xx/pq2.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/pq2.c
b/arch/powerpc/platforms/82xx/pq2.c
index
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/platforms/celleb/scc_sio.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/celleb/scc_sio.c
b/arch/powerpc/platforms/celleb/scc_sio.c
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/platforms/powermac/low_i2c.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c
Updated guts_set_dmacr() to enumerate the DMA controllers at 0, instead of 1,
so that it now matches other related functions. Added function
guts_set_pmuxcr_dma() to set the external DMA control bits in the PMUXCR
register of the global utilities structure.
Signed-off-by: Timur Tabi [EMAIL
Function qe_muram_init() was only looking for a node called data-only,
instead of making sure it is the correct node. This patch modifies
qe_muram_init() to find the QE node first, then the MURAM node inside it,
and then the data-only node. It also reports errors.
Signed-off-by: Timur Tabi
On Thu, 2007-11-29 at 22:46 +0300, Cyrill Gorcunov wrote:
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
Ack.
arch/powerpc/platforms/powermac/low_i2c.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git
From: Cyrill Gorcunov [EMAIL PROTECTED]
Signed-off-by: Cyrill Gorcunov [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.c |7 +++
arch/powerpc/sysdev/mv64x60_dev.c | 24 ++--
arch/powerpc/sysdev/mv64x60_pci.c |4 ++--
On Wed, 28 Nov 2007 20:03:22 +0530
Kamalesh Babulal [EMAIL PROTECTED] wrote:
Hi Andrew,
while running tbench on the powerpc with 2.6.24-rc3-mm2 softlock up occurs
BUG: soft lockup - CPU#0 stuck for 11s! [tbench:12183]
NIP: c00ac978 LR: c00acff0 CTR: c005c648
REGS:
qe_setbrg() currently takes an integer to indicate the BRG number. Change that
to take an enum qe_clock instead, since this enum is intended to represent
clock sources.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch applies to Kumar's for-2.6.25 branch. You might need to apply my
On Nov 29, 2007, at 3:56 PM, Timur Tabi wrote:
qe_setbrg() currently takes an integer to indicate the BRG number.
Change that
to take an enum qe_clock instead, since this enum is intended to
represent
clock sources.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch
On Nov 29, 2007, at 2:29 PM, Timur Tabi wrote:
Function qe_muram_init() was only looking for a node called data-
only,
instead of making sure it is the correct node. This patch modifies
qe_muram_init() to find the QE node first, then the MURAM node
inside it,
and then the data-only
qe_setbrg() currently takes an integer to indicate the BRG number. Change that
to take an enum qe_clock instead, since this enum is intended to represent
clock sources.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch applies to Kumar's for-2.6.25 branch. You might need to apply my
On Nov 6, 2007, at 12:11 PM, Jon Loeliger wrote:
From: Jon Loeliger [EMAIL PROTECTED]
Signed-off-by: Jon Loeliger [EMAIL PROTECTED]
Acked-by: Stephen Rothwell [EMAIL PROTECTED]
---
Chip away at some janitor work.
Catch both asm/of_platform.h and asm/of_device.h this time.
Add sfr's ACK.
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
These interrupts are introduced by the latest Freescale SoC such as
MPC837x.
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/sysdev/ipic.c | 138 +++
+++--
arch/powerpc/sysdev/ipic.h |7 +-
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
The MPC837x MDS is a new member of Freescale MDS reference system.
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/platforms/83xx/Kconfig | 12 +++
arch/powerpc/platforms/83xx/Makefile |1 +
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
Updated pci node.
arch/powerpc/boot/dts/mpc8377_mds.dts | 282
+++
arch/powerpc/boot/dts/mpc8378_mds.dts | 264
+
On Nov 29, 2007, at 5:26 PM, Timur Tabi wrote:
qe_setbrg() currently takes an integer to indicate the BRG number.
Change that
to take an enum qe_clock instead, since this enum is intended to
represent
clock sources.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
IPIC controller doesn't support ack operations. The pending registers
are read-only. The patch removes ack operations which are not needed.
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/sysdev/ipic.c | 40 +
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/configs/mpc837x_mds_defconfig | 878 +++
+
1 files changed, 878 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/configs/mpc837x_mds_defconfig
On Nov 29, 2007, at 2:19 PM, Timur Tabi wrote:
Updated guts_set_dmacr() to enumerate the DMA controllers at 0,
instead of 1,
so that it now matches other related functions. Added function
guts_set_pmuxcr_dma() to set the external DMA control bits in the
PMUXCR
register of the global
On Oct 19, 2007, at 6:38 AM, Li Yang wrote:
Signed-off-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/kernel/cputable.c | 13 -
1 files changed, 12 insertions(+), 1 deletions(-)
applied.
- k
___
Linuxppc-dev mailing list
The IPIC MSI is introduced on MPC837x chip.
Implements the IPIC MSI as two level interrupt controller.
Signed-off-by: Tony Li [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8377_mds.dts | 14 ++
arch/powerpc/boot/dts/mpc8378_mds.dts | 14 ++
arch/powerpc/boot/dts/mpc8379_mds.dts
The PCIE controller is initiated in u-boot.
This patch is based on Leo`s mpc837xe patches.
Signed-off-by: Tony Li [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8377_mds.dts | 56 --
arch/powerpc/boot/dts/mpc8378_mds.dts | 56 --
arch/powerpc/platforms/83xx/Kconfig
Hi,
On Fri, Nov 30, 2007 at 11:45:34AM +0800, Li Li wrote:
+ [EMAIL PROTECTED] {
Why call it pci2@ (and pci3@ below)? They are clearly identifiable with
their unit addresses anyway.
+config PPC_MPC83XX_PCIE
+ bool MPC837X PCI Express support
+ depends on PCIEPORTBUS
From: Valentine Barshak [EMAIL PROTECTED]
The EMAC4_MR1_OBCI(freq) macro expects freg in MHz,
while opb_bus_freq is kept in Hz. Correct this.
Signed-off-by: Valentine Barshak [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
diff -pruN
This updates the copyright notices of the new EMAC driver to
avoid confusion as who is to be blamed for new bugs.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
drivers/net/ibm_newemac/core.c |5 +
drivers/net/ibm_newemac/core.h |5 +
From: Valentine Barshak [EMAIL PROTECTED]
The patch moves dev_set_drvdata(ofdev-dev, dev) up before tah_reset(ofdev)
is called to avoid a NULL pointer dereference, since tah_reset uses drvdata.
Signed-off-by: Valentine Barshak [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL
There are a few variants of the STACR register that affect more than
just the AXON version of EMAC. Replace the current test of various
chip models with tests for generic properties in the device-tree.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Acked-by: Stefan Roese [EMAIL
More than just AXON version of EMAC RGMII supports MDIO, so replace
the current test with a generic property in the device-tree that
indicates such support.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Acked-by: Stefan Roese [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/sequoia.dts |
When using ZMII for MDIO only (such as 440GX with RGMII for data and ZMII for
MDIO), the ZMII code would fail to properly refcount, thus triggering a
BUG_ON().
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Acked-by: Stefan Roese [EMAIL PROTECTED]
---
drivers/net/ibm_newemac/zmii.c |
From: Stefan Roese [EMAIL PROTECTED]
This adds support for the Agere ET1011c PHY as found on the AMCC Taishan
board.
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
drivers/net/ibm_newemac/phy.c | 37
From: Stefan Roese [EMAIL PROTECTED]
This patch adds BCM5248 and Marvell 88E PHY support to NEW EMAC driver.
These PHY chips are used on PowerPC 440EPx boards.
The PHY code is based on the previous work by Stefan Roese [EMAIL PROTECTED]
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
Here are the patches I have pending for EMAC. With those, along with
some other powerpc patches scheduled for 2.6.25 for adding support
for those various boards, I have EMAC now working properly on a
variety of platforms, such as Taishan (440GX), Katmai (440SP),
EP405 (405GP), Bamboo (440EP),
[POWERPC] Consolidate compatible-to-i2c_boardinfo mapping code
Move the mapping from device tree compatible field to i2c_boardinfo
structures for powerpc, since several platforms now use this.
Signed-off-by: Olof Johansson [EMAIL PROTECTED]
---
arch/powerpc/sysdev/Makefile |1
[POWERPC] pasemi: Register i2c_board_info
Setup i2c_board_info based on device tree contents. This has to be
a device_initcall since we need PCI to be probed by the time we
run it, but before the actual driver is initialized.
Signed-off-by: Olof Johansson [EMAIL PROTECTED]
Index:
Andrew Morton wrote:
On Wed, 28 Nov 2007 20:03:22 +0530
Kamalesh Babulal [EMAIL PROTECTED] wrote:
Hi Andrew,
while running tbench on the powerpc with 2.6.24-rc3-mm2 softlock up occurs
BUG: soft lockup - CPU#0 stuck for 11s! [tbench:12183]
NIP: c00ac978 LR: c00acff0 CTR:
From: Hugh Blemings [EMAIL PROTECTED]
Signed-off-by: Hugh Blemings [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This needs a bit of cleanup still, probably not to be merged as-is
just yet (like using mtdcri/mfdcri for CPR access).
arch/powerpc/Kconfig.debug
With some PHYs, when the link goes away, the EMAC reset fails due
to the loss of the RX clock I believe.
The old EMAC driver worked around that using some internal chip-specific
clock force bits that are different on various 44x implementations.
This is an attempt at doing it differently, by
From: Valentine Barshak [EMAIL PROTECTED]
This patch fixes a typo in ibm_newemac/core.c
(tah_port should be used instead of tah_ph)
Signed-off-by: Valentine Barshak [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
drivers/net/ibm_newemac/core.c |2 +-
1 file
On Tue, 27 Nov 2007 18:15:59 -0600 Will Schmidt [EMAIL PROTECTED] wrote:
(resending with the proper from addr this time).
I'm seeing some funky behavior on power5/power6 partitions with this
patch.A /sbin/reboot is now behaving much more like a
/sbin/halt.
Anybody else seeing
This patch merges the 32 and 64 bits implementations of
pci_process_bridge_OF_ranges(). The new function is cleaner than both
the old ones supports 64 bits ranges on ppc32 which is necessary for
the 4xx port.
It also adds some better (hopefully) output to the kernel log which
should help
Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD
comes from a device-tree property, PCI is working to the point where
I can see the video card, USB device, and south bridge.
This should work with both EP405 and EP405PC.
I've not totally figured out how IRQs are wired on this
This adds some basic real mode based early udbg support for 40x
in order to debug things more easily
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/Kconfig.debug | 13 +++
arch/powerpc/kernel/misc_32.S | 39
This wires up the 4xx PCI support device tree bits for
440GP based Ebony platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/ebony.dts | 41 +++-
1 file changed, 36 insertions(+), 5 deletions(-)
Index:
This adds the device-tree bits call to ppc4xx_pci_find_bridges()
to make PCI work on the Bamboo board
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/bamboo.dts | 40 ++-
1 file changed, 39 insertions(+), 1 deletion(-)
The 440SPE has a 440A core, and thus needs a setup_cpu function to
fixup its machine check handler.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/kernel/cpu_setup_44x.S |1 +
arch/powerpc/kernel/cputable.c |3 +++
2 files changed, 4 insertions(+)
Index:
This patch makes the early debug option force the console loglevel
to the max. The early debug option is meant to catch messages very
early in the kernel boot process, in many cases, before the kernel
has a chance to parse the debug command line argument. Thus it
makes sense when
This adds base support code for the 4xx PCI-X bridge. It also provides
placeholders for the PCI and PCI-E version but they aren't supported
with this patch.
The bridges are configured based on device-tree properties.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Tested on 440GP
This adds a function to xmon to dump the content of the 44x processor
TLB with a little bit of decoding (but not much).
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Did that to track down some machine checks I was having while working
on PCI support due to 32/64 bits resource
The 32 bits PCI code will display a rather scary error message
PCI: Cannot allocate resource region N of device XXX
at boot when the existing setup of a device as left by the
firmware doesn't match the kernel needs and the device needs
to be moved. This is often not an error at all, as the
This adds a variant of of_translate_address that uses the dma-ranges
property instead of ranges, it's to be used by PCI code in parsing
the dma-ranges property.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/kernel/prom_parse.c | 20
This adds the definition of the on-chip OHCI controller to the
Bamboo board's device-tree. This is enough to get it probed and
working, though a separate patch fixing a bug in the OHCI driver
is needed to make it reliable.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Accessing indirect DCRs is done via a pair of address/data DCRs.
Such accesses are thus inherently racy, vs. interrupts, preemption
and possibly SMP if 4xx SMP cores are ever used.
This updates the mfdcri/mtdcri macros in dcr-native.h (which were
so far unused) to use a spinlock.
In addition,
The 32bits powerpc resource fixup code uses unsigned longs to do the
offseting of resources which overflows on platforms such as 4xx where
resources can be 64 bits.
This fixes it by using resource_size_t instead.
However, the IO stuff does rely on some 32 bits arithmetic, so we hack
by cropping
This removes CONFIG_440A which was a problem for multiplatform
kernels and instead fixes up the IVOR at runtime from a setup_cpu
function. The A version of the machine check also tweaks the
regs-trap value to differenciate the 2 versions at the C level.
Signed-off-by: Benjamin Herrenschmidt
This adds to the previous patch the support for the 4xx PCI 2.x
bridges.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This version implement the basic support for the 405GP bridge,
I haven't yet looked at differences that other implementations
may have for the PCI 2.x part.
This adds to the previous 2 patches the support for the 4xx PCI Express
cells as found in the 440SPe revA, revB and 405EX.
Unfortunately, due to significant differences between these, and other
interesting features of those pieces of HW, the code isn't as simple
as it is for PCI and PCI-X and
This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
As for Taishan, the bootwrapper code can be simplified. In fact,
we probably don't need to probe clocks memsize off the chip
The 4xx bootwrapper occasionally needs to access SPR registers,
this adds mfspr/mtspr wrappers to it.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
===
--- linux-work.orig/arch/powerpc/boot/reg.h 2007-11-27
This reworks the boot wrapper library function that probes
the chip clocks. Better separate the base function that is
used on 440GX,SPe,EP,... from the uart fixups as those need
different device-tree path on different processors.
Also, rework the function itself based on the arch/ppc code
from
On Thu, Nov 29, 2007 at 12:35:33AM -0800, Andrew Morton wrote:
ten million is close enough to infinity for me to assume that we broke the
driver and that's never going to terminate.
how about this? doesn't break things on my pa8800:
diff --git a/drivers/scsi/sym53c8xx_2/sym_hipd.c
On Thu, 29 Nov 2007 23:00:47 -0800 Andrew Morton [EMAIL PROTECTED] wrote:
On Fri, 30 Nov 2007 01:39:29 -0500 Kyle McMartin [EMAIL PROTECTED] wrote:
On Thu, Nov 29, 2007 at 12:35:33AM -0800, Andrew Morton wrote:
ten million is close enough to infinity for me to assume that we broke the
Andrew Morton wrote:
On Thu, 29 Nov 2007 23:00:47 -0800 Andrew Morton [EMAIL PROTECTED] wrote:
On Fri, 30 Nov 2007 01:39:29 -0500 Kyle McMartin [EMAIL PROTECTED] wrote:
On Thu, Nov 29, 2007 at 12:35:33AM -0800, Andrew Morton wrote:
ten million is close enough to infinity for me to assume
On Nov 29, 2007, at 9:45 PM, Li Li wrote:
The PCIE controller is initiated in u-boot.
This patch is based on Leo`s mpc837xe patches.
Signed-off-by: Tony Li [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8377_mds.dts | 56 --
arch/powerpc/boot/dts/mpc8378_mds.dts | 56
On Fri, Nov 30, 2007 at 04:40:23PM +1100, Benjamin Herrenschmidt wrote:
From: Stefan Roese [EMAIL PROTECTED]
This patch adds BCM5248 and Marvell 88E PHY support to NEW EMAC driver.
These PHY chips are used on PowerPC 440EPx boards.
The PHY code is based on the previous work by Stefan
89 matches
Mail list logo
