John == John Linn [EMAIL PROTECTED] writes:
Hi John,
+config PPC_FPU
+ depends on XILINX_VIRTEX_5_FXT
+ bool Enable Xilinx Soft FPU
+ help
+This option enables the Xilinx Soft FPU attached to the APU
+interface of the PPC440 (requires DP_FULL FPU pcore).
There is
From: Julia Lawall [EMAIL PROTECTED]
As noted by Akinobu Mita in patch b1fceac2b9e04d278316b2faddf276015fc06e3b,
alloc_bootmem and related functions never return NULL and always return a
zeroed region of memory. Thus a NULL test or memset after calls to these
functions is unnecessary.
A double
Adrian Bunk [EMAIL PROTECTED] wrote:
This patch contains the following cleanups for the asm/ptrace.h
userspace headers:
- include/asm-generic/Kbuild.asm already lists ptrace.h, remove
the superfluous listings in the Kbuild files of the following
architectures:
...
- frv
...
-
The following set of patches adds Vector Scalar Extentions (VSX)
support for POWER7. Includes context switch, ptrace and signals support.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
Paulus: please consider for your 2.6.27 tree.
Updates this post
- Comment on VMX vs SPE as
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |
Move the altivec_unavailable code, to make room at 0xf40 where the
vsx_unavailable exception will be.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/head_64.S |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Index:
Make load_up_fpu and load_up_altivec callable so they can be reused by
the VSX code.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/fpu.S|2 +-
arch/powerpc/kernel/head_32.S|6 --
arch/powerpc/kernel/head_64.S| 10 +++---
If we set the SPE MSR bit in save_user_regs we can blow away the VEC
bit. This doesn't matter in reality as they are infact the same bit
but looks bad.
Also, when we add VSX in a later patch, we need to be able to set two
separate MSR bits here.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Add a VSX CPU feature. Also add code to detect if VSX is available
from the device tree.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Signed-off-by: Joel Schopp [EMAIL PROTECTED]
---
arch/powerpc/kernel/prom.c |4
include/asm-powerpc/cputable.h | 15 ++-
2 files
This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.
Also add VSX register save/restore macros and vsr[0-63] register definitions.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
include/asm-powerpc/ppc_asm.h | 127
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
Add CONFIG_VSX config build option. Must compile with POWER4, FPU and ALTIVEC.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/platforms/Kconfig.cputype | 16
1 file changed, 16 insertions(+)
Index: linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype
This patch extends the floating point save and restore code to use the
VSX load/stores when VSX is available. This will make FP context
save/restore marginally slower on FP only code, when VSX is available,
as it has to load/store 128bits rather than just 64bits.
Mixing FP, VMX and VSX code will
Adrian Bunk wrote:
This patch contains the following cleanups for the asm/ptrace.h
userspace headers:
- xtensa: cosmetical change to remove empty
#ifndef __ASSEMBLY__ #else #endif
from the userspace headers
Signed-off-by: Adrian Bunk [EMAIL PROTECTED]
The Xtensa part
Hi,
On Mon, Jun 23, 2008 at 07:48:09PM +0200, Adrian Bunk wrote:
This patch contains the following cleanups for the asm/ptrace.h
userspace headers:
- include/asm-generic/Kbuild.asm already lists ptrace.h, remove
the superfluous listings in the Kbuild files of the following
architectures:
On Tue, Jun 24, 2008 at 09:45:32AM +1000, Jeremy Kerr wrote:
Somehow I expect that I am doing something wrong, because nobody else
has reported something like this yet.
Seems to work fine here - just booted 945754a on a QS22 with
cell_defconfig:
[EMAIL PROTECTED] ~]$ cat /proc/version
Michael Ellerman wrote:
Currently create_branch() creates a branch instruction for you, and patches
it into the call site. In some circumstances it would be nice to be able to
create the instruction and patch it later, and also some code might want
to check for errors in the branch creation
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
Because function pointers point to different things on 32-bit vs 64-
bit,
add a macro that deals with dereferencing the OPD on 64-bit. The
soon to
be merged ftrace wants this, as well as other code I am working on.
Signed-off-by: Michael
On Jun 23, 2008, at 8:33 PM, Michael Ellerman wrote:
This patch adds the logic to patch alternative sections. This is
fairly
straight forward, except for branches. Relative branches that jump
from
inside the else section to outside of it, need to be translated as
they're
moved, otherwise
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
This commit adds some new routines for patching code, they will be
used
in a following commit.
Signed-off-by: Michael Ellerman [EMAIL PROTECTED]
---
arch/powerpc/lib/code-patching.c| 107 ++
+
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
Add tests of the existing code patching routines, as well as the new
routines added in the last commit. The self-tests are run late in boot
when CONFIG_CODE_PATCHING_SELFTEST=y, which depends on DEBUG_KERNEL=y.
Signed-off-by: Michael
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
A bunch of code has hard-coded the value for a nop instruction, it
would be nice to have a #define for it.
Signed-off-by: Michael Ellerman [EMAIL PROTECTED]
Acked-by: Kumar Gala [EMAIL PROTECTED]
- k
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
The CPU and firmware feature fixup macros are currently spread across
three files, firmware.h, cputable.h and asm-compat.h. Consolidate them
into their own file, feature-fixups.h
Signed-off-by: Michael Ellerman [EMAIL PROTECTED]
Acked-by:
Yes it is compatible with the normal powerpc FPU.
Thanks,
John
-Original Message-
From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter
Korsgaard
Sent: Tuesday, June 24, 2008 12:46 AM
To: John Linn
Cc: Josh Boyer; linuxppc-dev@ozlabs.org
Subject: Re: [PATCH] [RFC] powerpc:
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
We currently have a few routines for patching code in asm/system.h,
because
they didn't fit anywhere else. I'd like to clean them up a little
and add
some more, so first move them into a dedicated C file - they don't
need to
be
John == John Linn [EMAIL PROTECTED] writes:
John Yes it is compatible with the normal powerpc FPU.
Ahh, great - That didn't used to be the case with the earlier fpu
stuff afaik.
--
Bye, Peter Korsgaard
___
Linuxppc-dev mailing list
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
Make load_up_fpu and load_up_altivec callable so they can be reused by
the VSX code.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Acked-by: Kumar Gala [EMAIL PROTECTED]
- k
___
Linuxppc-dev
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
The logic to patch CPU feature sections lives in cputable.c, but
these days
it's used for CPU features as well as firmware features. Move it into
it's own file for neatness and as preparation for some additions.
While we're moving the
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
Currentl we have three versions of MAKE_FTR_SECTION_ENTRY(), the
macro that
generates a feature section entry. There is 64bit version, a 32bit
version
and version for 32bit code built with a 64bit kernel.
typo in 'currentl'
Rather
I put in a link to the Xilinx FPU documentation that describes it.
http://www.xilinx.com/support/documentation/ip_documentation/apu_fpu_vir
tex5.pdf
Thanks,
John
-Original Message-
From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter
Korsgaard
Sent: Tuesday, June 24, 2008
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
Add a VSX CPU feature. Also add code to detect if VSX is available
from the device tree.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Signed-off-by: Joel Schopp [EMAIL PROTECTED]
Acked-by: Kumar Gala [EMAIL PROTECTED]
- k
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
Add CONFIG_VSX config build option. Must compile with POWER4, FPU
and ALTIVEC.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Acked-by: Kumar Gala [EMAIL PROTECTED]
- k
___
Linuxppc-dev
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
If you pass a target value to create_branch() which is more than
32MB - 4,
or - 32MB away from the branch site, then it's impossible to create an
immediate branch. The current code doesn't check, which will lead to
us
creating a branch
Just a few minor nits.
+/**
+ * h_get_mpp
+ * H_GET_MPP hcall returns info in 7 parms
+ */
+int h_get_mpp(struct hvcall_mpp_data *mpp_data)
+{
+int rc;
+unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
Should be tabs instead of spaces in this function and a few others
in this
On Jun 11, 2008, at 6:42 PM, Anton Vorontsov wrote:
It was discussed that global arch_initcall() is preferred way to probe
QE GPIOs, so let's use it.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
applied to powerpc-next.
- k
___
On Jun 11, 2008, at 7:30 PM, Vitaly Bordug wrote:
Ports B and C pins programming is changed to get SCC2 UART and FCC3
ethernet work.
Signed-off-by: Vitaly Bordug [EMAIL PROTECTED]
---
applied to powerpc-next.
- k
___
Linuxppc-dev mailing list
v4 of this patch, updates to correct whitespace, spelling issues pointed out by
Brian King. Also made the long a signed long per Brian's suggestion.
Update /proc/ppc64/lparcfg to enable displaying of Cooperative Memory
Overcommitment statistics as reported by the H_GET_MPP hcall. This also
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
Currently create_branch() creates a branch instruction for you, and
patches
it into the call site. In some circumstances it would be nice to be
able to
create the instruction and patch it later, and also some code might
want
to check
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
If we set the SPE MSR bit in save_user_regs we can blow away the VEC
bit. This doesn't matter in reality as they are infact the same bit
but looks bad.
Also, when we add VSX in a later patch, we need to be able to set two
separate MSR bits
return user_regset_copyout(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
is there a reason we can drop the ''?
Yes, .fpr is an array. C is _such_ a fun language, heh.
Segher
Update the Freescale DIU driver to use page_alloc_exact() to allocate a
DMA buffer. This also eliminates the rheap-based memory allocator. We
can do this now because commit 6ccf61f9 allows us to allocate 8MB physically-
contiguous memory blocks.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
Nick Piggin wrote:
On Tue, May 13, 2008 at 12:25:27PM -0500, Jon Tollefson wrote:
Instead of using the variable mmu_huge_psize to keep track of the huge
page size we use an array of MMU_PAGE_* values. For each supported
huge page size we need to know the hugepte_shift value and have a
HI all,
Has anyone tried using a Graphic card on Freescale MPC837x-rdb board? If
so I appreciate any hints and information that I can use.
Many thanks in advance,
Bizhan
___
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Linuxppc-dev@ozlabs.org
On Jun 24, 2008, at 12:17 PM, Bizhan Gholikhamseh (bgholikh) wrote:
HI all,
Has anyone tried using a Graphic card on Freescale MPC837x-rdb
board? If so I appreciate any hints and information that I can use.
Nope, but you'll most likely need some form of x86 emulation for the
video bios
On Mon, Jun 23, 2008 at 06:13:41PM -0700, jumpingProgrammer wrote:
Thanks a lot for answer my question.
But i am newhand and not very clear about it.
Do you mean:
1. in this case i do not need to include DMA when i make menuconfig ?
The path is Device Drivers-DMA.
Right, that's for
On Mon, Jun 23, 2008 at 10:54:28PM -0700, jumpingProgrammer wrote:
I use this in 8313erdb.dts, but can not find DMA info in
/proc/interrupts.why?
Is the driver enabled, and did it call request_irq?
-Scott
___
Linuxppc-dev mailing list
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
Added the fsl,mpc8313-wakeup-timer property.
Documentation/powerpc/booting-without-of.txt | 196 --
1 files changed, 155 insertions(+), 41 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
Hi Grant,
It appears that you designed the simpleImage around Xilinx FPGAs.
Since we have to initialize the 16550 UART in the bootstrap and there's
no boot loader, were you thinking we would add the 16550 initialization
to simpleboot.c?
Why do we want a flat binary rather than an elf file for
I am trying to understand exit points from kernel mode to user mode. I believe
this happens when the scheduler is invoked, there are interrupts, exceptions,
or the kernel is executing system call in process context.
Is there a single function which is called in the ppc kernel when the mode is
The defconfigs for Freescale 85xx and 86xx SOCs had bad choices for some
audio related options. In particular, OSS emulation should be enabled,
and the old ALSA API should be disabled.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
Kumar, this patch is for 2.6.27.
The following patches contain updates for MPC5121
1/8
No change since last submission.
Updates the device tree.
2/8
Adds a clock driver. Cleanup based on input from Stephen Rothwell.
3/8
No change since last submission.
Adds support for generic boards. This is nearly
Move shared code from mpc5121_ads.c to mpc512x_shared.c.
Add new generic board setup mpc5121_generic.c
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig | 15 -
arch/powerpc/platforms/512x/Makefile |3 +-
Add a interrupt host for the interrupt
controller in the mpc5121ads cpld.
PCI interrupts are 0-7 the rest are 8-15
Touchscreen pendown irq is hardwired to irq1
All other irqs are chainged to irq0
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig|
Implements the api defined in include/clk.h
Current only getting frequencies is supported
not setting.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Makefile |1 +
arch/powerpc/platforms/512x/clock.c | 720 ++
2 files changed,
change
bool PCI support if long ugly expression
to
bool PCI support if PPC_HAS_PCI
and add select PPC_HAS_PCI to all the config nodes that
were previously in the PCI if expression
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/Kconfig |9 +
Uses mpc83xx_add_bridge in fsl_pci.c
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig |2 ++
arch/powerpc/platforms/512x/mpc5121_ads.c | 10 ++
arch/powerpc/platforms/512x/mpc512x.h |1 +
arch/powerpc/sysdev/fsl_pci.c |
The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
while other freescale host bridges have class set to
PCI_CLASS_PROCESSOR_POWERPC.
This patch makes fixup_hide_host_resource_fsl match
PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: John Rigby
This allows other platforms with the same pci
block like MPC5121 to use it.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/83xx/Kconfig |2 +-
arch/powerpc/platforms/83xx/Makefile |1 -
arch/powerpc/platforms/83xx/mpc831x_rdb.c |1 +
Hello.
John Rigby wrote:
The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
while other freescale host bridges have class set to
PCI_CLASS_PROCESSOR_POWERPC.
This patch makes fixup_hide_host_resource_fsl match
PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
On Tue, 2008-06-24 at 15:22 -0600, Mitesh wrote:
I am trying to understand exit points from kernel mode to user mode.
I believe this happens when the scheduler is invoked, there are
interrupts, exceptions, or the kernel is executing system call in
process context.
Is there a single
On Tue, 2008-06-24 at 12:32 -0500, Kumar Gala wrote:
On Jun 24, 2008, at 12:17 PM, Bizhan Gholikhamseh (bgholikh) wrote:
HI all,
Has anyone tried using a Graphic card on Freescale MPC837x-rdb
board? If so I appreciate any hints and information that I can use.
Nope, but you'll most
The defconfigs for Freescale 85xx and 86xx SOCs had bad choices for some
audio related options. In particular, OSS emulation should be enabled,
and the old ALSA API should be disabled.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
Kumar, this version excludes the change for the 8610, which
The i2c_devices[] array in fsl_soc.c lists new-style I2C drivers that have
device tree nodes. The CS4270 driver is not a new-style driver, and won't be
in 2.6.27, so it should not appear in this array. Its presence in this array
blocks the old-style driver from finding the device.
This patch
Adrian Bunk writes:
This patch contains the following cleanups for the asm/ptrace.h
userspace headers:
Acked-by: Paul Mackerras [EMAIL PROTECTED]
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https://ozlabs.org/mailman/listinfo/linuxppc-dev
I'm trying to write a function that gets a list of all aliases
aliases {
serial0 = serial0;
serial1 = serial1;
pci0 = pci0;
pci1 = pci1;
pci2 = pci2;
};
That is, I do not know which aliases are in the
On Tue, 2008-06-24 at 18:13 -0500, Timur Tabi wrote:
I'm trying to write a function that gets a list of all aliases
aliases {
serial0 = serial0;
serial1 = serial1;
pci0 = pci0;
pci1 = pci1;
pci2 = pci2;
};
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs
In message [EMAIL PROTECTED] you wrote
:
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.
Also add VSX register save/restore macros and vsr[0-63] register
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs
In message [EMAIL PROTECTED] you wrote
:
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use
On Jun 24, 2008, at 7:06 PM, Michael Neuling wrote:
In message
[EMAIL PROTECTED] you wrote
:
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.
Also add VSX register
Currently, dtc defines Linux-like names for various fixed-size integer
types. There's no good reason to do this; even Linux itself doesn't
use these names for externally visible things any more. This patch
replaces these with the C99 standardized type names from stdint.h.
Signed-off-by: David
The following set of patches adds Vector Scalar Extentions (VSX)
support for POWER7. Includes context switch, ptrace and signals support.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
Paulus: please consider for your 2.6.27 tree.
Updates this post
- White space change in
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |
If we set the SPE MSR bit in save_user_regs we can blow away the VEC
bit. This doesn't matter in reality as they are infact the same bit
but looks bad.
Also, when we add VSX in a later patch, we need to be able to set two
separate MSR bits here.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Move the altivec_unavailable code, to make room at 0xf40 where the
vsx_unavailable exception will be.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/head_64.S |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Index:
Make load_up_fpu and load_up_altivec callable so they can be reused by
the VSX code.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/fpu.S|2 +-
arch/powerpc/kernel/head_32.S|6 --
arch/powerpc/kernel/head_64.S| 10 +++---
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.
Also add VSX register save/restore macros and vsr[0-63] register definitions.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/fpu.S | 23 +
This patch extends the floating point save and restore code to use the
VSX load/stores when VSX is available. This will make FP context
save/restore marginally slower on FP only code, when VSX is available,
as it has to load/store 128bits rather than just 64bits.
Mixing FP, VMX and VSX code will
Add CONFIG_VSX config build option. Must compile with POWER4, FPU and ALTIVEC.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/platforms/Kconfig.cputype | 16
1 file changed, 16 insertions(+)
Index: linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype
Add a VSX CPU feature. Also add code to detect if VSX is available
from the device tree.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Signed-off-by: Joel Schopp [EMAIL PROTECTED]
---
arch/powerpc/kernel/prom.c |4
include/asm-powerpc/cputable.h | 15 ++-
2 files
Currently both libfdt and dtc define a set of endian conversion macros
for accessing the device tree blob which is always big-endian. libfdt
uses names like cpu_to_fdt32() and dtc uses names like cpu_to_be32 (as
the Linux kernel). This patch switches dtc over to using the libfdt
macros
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