Re: [Cbe-oss-dev] 2.6.26-rc6 kernel bug on PS3?
[EMAIL PROTECTED] wrote on 06/26/2008 12:56:36 AM: With 2.6.24 (your version from early february) the PS3 hangs completely... you have to power cycle the ps3. so, it looks like 2.6.26 is a little better... but you have to power off/on as well to get rid of the zombie. Looks like an issue with spufs. Though from your traces, it looks like it's something that happens when apps quit. Does your workload involves SPU apps quitting regulary ? Yes, we have about 10 demos that we run in a loop from a script. Stefan ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/2] powerpc/kprobes: Some minor fixes
* Mark __flush_icache_range as a function that can't be probed since its
used by the kprobe code.
* Fix an issue with single stepping and async exceptions. We need to
ensure that we dont get an async exception (external, decrementer, etc)
while we are attempting to single step the probe point.
Added a check to ensure we only handle a single step if its really
intended for the instruction in question.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
arch/powerpc/kernel/kprobes.c |9 +
arch/powerpc/kernel/misc_32.S |2 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 23545a2..74693d9 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -95,6 +95,11 @@ void __kprobes arch_remove_kprobe(struct kprobe *p)
static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs
*regs)
{
+ /* We turn off async exceptions to ensure that the single step will
+* be for the instruction we have the kprobe on, if we dont its
+* possible we'd get the single step reported for an exception handler
+* like Decrementer or External Interrupt */
+ regs-msr = ~MSR_EE;
regs-msr |= MSR_SE;
/*
@@ -376,6 +381,10 @@ static int __kprobes post_kprobe_handler(struct pt_regs
*regs)
if (!cur)
return 0;
+ /* make sure we got here for instruction we have a kprobe on */
+ if (((unsigned long)cur-ainsn.insn + 4) != regs-nip)
+ return 0;
+
if ((kcb-kprobe_status != KPROBE_REENTER) cur-post_handler) {
kcb-kprobe_status = KPROBE_HIT_SSDONE;
cur-post_handler(cur, regs, 0);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 896..6321ae3 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
*
* flush_icache_range(unsigned long start, unsigned long stop)
*/
-_GLOBAL(__flush_icache_range)
+_KPROBE(__flush_icache_range)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
--
1.5.5.1
___
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Linuxppc-dev@ozlabs.org
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[PATCH] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
Changes '% 2' to ' 1' as noticed by Kumar
---
arch/powerpc/kernel/align.c |6 ++--
arch/powerpc/kernel/process.c|2 -
arch/powerpc/kernel/ptrace.c | 10 --
arch/powerpc/kernel/ptrace32.c | 14 +++--
arch/powerpc/kernel/softemu8xx.c |4 +-
arch/powerpc/math-emu/math.c | 56 +++
include/asm-powerpc/ppc_asm.h|5 ++-
include/asm-powerpc/processor.h |4 ++
8 files changed, 58 insertions(+), 43 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c
@@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re
static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
unsigned int reg, unsigned int flags)
{
- char *ptr = (char *) current-thread.fpr[reg];
+ char *ptr = (char *) current-thread.TS_FPR(reg);
int i, ret;
if (!(flags F))
@@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs)
return -EFAULT;
}
} else if (flags F) {
- data.dd = current-thread.fpr[reg];
+ data.dd = current-thread.TS_FPR(reg);
if (flags S) {
/* Single-precision FP store requires conversion... */
#ifdef CONFIG_PPC_FPU
@@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs)
if (unlikely(ret))
return -EFAULT;
} else if (flags F)
- current-thread.fpr[reg] = data.dd;
+ current-thread.TS_FPR(reg) = data.dd;
else
regs-gpr[reg] = data.ll;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c
@@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts
return 0;
flush_fp_to_thread(current);
- memcpy(fpregs, tsk-thread.fpr[0], sizeof(*fpregs));
+ memcpy(fpregs, tsk-thread.TS_FPR(0), sizeof(*fpregs));
return 1;
}
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,7 +218,7 @@ static int fpr_get(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
@@ -231,7 +231,7 @@ static int fpr_set(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child-thread.fpr)[index -
PT_FPR0];
+ tmp = ((unsigned long *)child-thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child-thread.fpr)[index - PT_FPR0] =
data;
+ ((unsigned long *)child-thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)] = data;
ret = 0;
}
break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas
return -EPERM;
}
+/* Macros to workout the
dtc: Clean up lexing of include files
Currently we scan the /include/ directive as two tokens, the
/include/ keyword itself, then the string giving the file name to
include. We use a special scanner state to keep the two linked
together, and use the scanner state stack to keep track of the
original state while we're parsing the two /include/ tokens.
This does mean that we need to enable the 'stack' option in flex,
which results in a not-easily-suppressed warning from the flex
boilerplate code. This is mildly irritating.
However, this two-token scanning of the /include/ directive also has
some extremely strange edge cases, because there are a variety of
tokens recognized in all scanner states, including INCLUDE. For
example the following strange dts file:
/include/ /dts-v1/;
/ {
/* ... */
};
Will be processed successfully with the /include/ being effectively
ignored: the '/dts-v1/' and ';' are recognized even in INCLUDE state,
then the ';' transitions us to PROPNODENAME state, throwing away
INCLUDE, and the previous state is never popped off the stack. Or
for another example this construct:
foo /include/ = somefile.dts
will be parsed as though it were:
foo = /include/ somefile.dts
Again, the '=' is scanned without leaving INCLUDE state, then the next
string triggers the include logic.
And finally, we use a different regexp for the string with the
included filename than the normal string regexpt, which is also
potentially weird.
This patch, therefore, cleans up the lexical handling of the /include/
directive. Instead of the INCLUDE state, we instead scan the whole
include directive, both keyword and filename as a single token. This
does mean a bit more complexity in extracting the filename out of
yytext, but I think it's worth it to avoid the strageness described
above. It also means it's no longer possible to put a comment between
the /include/ and the filename, but I'm really not very worried about
breaking files using such a strange construct.
Index: dtc/dtc-lexer.l
===
--- dtc.orig/dtc-lexer.l2008-06-26 17:07:40.0 +1000
+++ dtc/dtc-lexer.l 2008-06-26 17:07:46.0 +1000
@@ -18,7 +18,7 @@
* USA
*/
-%option noyywrap nounput yylineno stack
+%option noyywrap nounput yylineno
%x INCLUDE
%x BYTESTRING
@@ -28,6 +28,10 @@
PROPNODECHAR [a-zA-Z0-9,[EMAIL PROTECTED]
PATHCHAR ({PROPNODECHAR}|[/])
LABEL [a-zA-Z_][a-zA-Z0-9_]*
+STRING \([^\\]|\\.)*\
+WS [[:space:]]
+COMMENT/*([^*]|\*+[^*/])*\*+/
+LINECOMMENT//.*\n
%{
#include dtc.h
@@ -58,22 +62,19 @@
%}
%%
-*/include/ yy_push_state(INCLUDE);
-
-INCLUDE\[^\n]*\ {
- yytext[strlen(yytext) - 1] = 0;
- push_input_file(yytext + 1);
- yy_pop_state();
+*/include/{WS}*{STRING} {
+ char *name = strchr(yytext, '\') + 1;
+ yytext[yyleng-1] = '\0';
+ push_input_file(name);
}
-
*EOF {
if (!pop_input_file()) {
yyterminate();
}
}
-*\([^\\]|\\.)*\ {
+*{STRING}{
yylloc.file = srcpos_file;
yylloc.first_line = yylineno;
DPRINT(String: %s\n, yytext);
@@ -197,16 +198,9 @@
return DT_INCBIN;
}
-*[[:space:]]+/* eat whitespace */
-
-*/*([^*]|\*+[^*/])*\*+/ {
- yylloc.file = srcpos_file;
- yylloc.first_line = yylineno;
- DPRINT(Comment: %s\n, yytext);
- /* eat comments */
- }
-
-*//.*\n/* eat line comments */
+*{WS}+ /* eat whitespace */
+*{COMMENT}+ /* eat C-style comments */
+*{LINECOMMENT}+ /* eat C++-style comments */
*. {
yylloc.file = srcpos_file;
Index: dtc/convert-dtsv0-lexer.l
===
--- dtc.orig/convert-dtsv0-lexer.l 2008-06-26 17:07:40.0 +1000
+++ dtc/convert-dtsv0-lexer.l 2008-06-26 17:07:46.0 +1000
@@ -17,7 +17,7 @@
* USA
*/
-%option noyywrap nounput stack
+%option noyywrap nounput
%x INCLUDE
%x BYTESTRING
@@ -26,6 +26,11 @@
PROPNODECHAR [a-zA-Z0-9,[EMAIL PROTECTED]
PATHCHAR ({PROPNODECHAR}|[/])
LABEL [a-zA-Z_][a-zA-Z0-9_]*
+STRING \([^\\]|\\.)*\
+WS [[:space:]]
+COMMENT/*([^*]|\*+[^*/])*\*+/
+LINECOMMENT//.*\n
+GAP({WS}|{COMMENT}|{LINECOMMENT})*
%{
#include string.h
@@ -91,16 +96,7 @@
%}
%%
-*/include/ {
- ECHO;
-
Re: starting with 2.6.26-rc1 cell_defconfig fails on QS22
On Wed, Jun 25, 2008 at 05:59:33PM +0200, Segher Boessenkool wrote: D'oh. I spent so much time and the solution is so easy. Thanks everybody. I have updated to binutils-2.18.50.0.6-2.ppc and now it works again on QS22 and JS21. So I checked your binary, and the only differences between working and not-working are a) some section offsets in the file, and b) the load address of the segment (0 vs. 0xc000...). a) should be harmless, and b) likely is a binutils bug that got fixed. What is the exact binutils version you used for the non-working? Should I had two old Fedora installations. Both installations have been updated, but looking at the installation tree it must have been something like 2.16.91.0.6 and 2.17.50.0.3 we test for it in our Makefile? If we require 2.18, we can drop the tests for 2.12 and 2.14 ;-) Adrian ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Please pull from 'powerpc-next' branch
Please pull from 'powerpc-next' branch of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git powerpc-next to receive the following updates: Documentation/powerpc/booting-without-of.txt| 59 + arch/powerpc/Kconfig|6 arch/powerpc/boot/Makefile |1 arch/powerpc/boot/dts/mpc836x_rdk.dts | 397 arch/powerpc/boot/dts/tqm8540.dts |4 arch/powerpc/boot/dts/tqm8541.dts |4 arch/powerpc/boot/dts/tqm8548-bigflash.dts | 365 +++ arch/powerpc/boot/dts/tqm8548.dts | 365 +++ arch/powerpc/boot/dts/tqm8555.dts |4 arch/powerpc/boot/dts/tqm8560.dts | 69 + arch/powerpc/boot/wrapper |2 arch/powerpc/configs/83xx/mpc836x_rdk_defconfig | 1128 arch/powerpc/configs/85xx/tqm8548_defconfig | 1094 +++ arch/powerpc/kernel/Makefile|1 arch/powerpc/kernel/cputable.c | 16 arch/powerpc/kernel/entry_32.S |8 arch/powerpc/kernel/head_booke.h| 10 arch/powerpc/kernel/head_fsl_booke.S| 57 + arch/powerpc/kernel/idle_6xx.S |2 arch/powerpc/kernel/idle_e500.S | 93 + arch/powerpc/kernel/setup_32.c |5 arch/powerpc/platforms/83xx/Kconfig | 11 arch/powerpc/platforms/83xx/Makefile|1 arch/powerpc/platforms/83xx/mpc836x_rdk.c | 102 ++ arch/powerpc/platforms/85xx/Kconfig |8 arch/powerpc/platforms/85xx/mpc85xx_ads.c |8 arch/powerpc/platforms/85xx/tqm85xx.c | 23 arch/powerpc/platforms/Kconfig.cputype |7 arch/powerpc/sysdev/Makefile|2 arch/powerpc/sysdev/cpm_common.c| 16 arch/powerpc/sysdev/fsl_gtm.c | 434 + arch/powerpc/sysdev/qe_lib/Kconfig | 13 arch/powerpc/sysdev/qe_lib/Makefile |2 arch/powerpc/sysdev/qe_lib/gpio.c | 149 +++ arch/powerpc/sysdev/qe_lib/qe.c | 94 -- arch/powerpc/sysdev/qe_lib/qe_io.c | 94 -- arch/powerpc/sysdev/qe_lib/ucc.c|7 arch/powerpc/sysdev/qe_lib/usb.c| 55 + drivers/serial/cpm_uart/cpm_uart.h | 11 drivers/serial/cpm_uart/cpm_uart_core.c | 373 --- drivers/serial/cpm_uart/cpm_uart_cpm1.c | 170 --- drivers/serial/cpm_uart/cpm_uart_cpm1.h | 12 drivers/serial/cpm_uart/cpm_uart_cpm2.c | 283 -- drivers/serial/cpm_uart/cpm_uart_cpm2.h | 12 include/asm-powerpc/cache.h |3 include/asm-powerpc/cpm.h |1 include/asm-powerpc/cpm1.h | 20 include/asm-powerpc/cpm2.h | 26 include/asm-powerpc/cputable.h | 19 include/asm-powerpc/fsl_gtm.h | 47 + include/asm-powerpc/machdep.h |1 include/asm-powerpc/qe.h| 82 + include/asm-powerpc/reg.h |2 include/asm-powerpc/reg_booke.h | 74 + include/asm-powerpc/synch.h |2 55 files changed, 4740 insertions(+), 1114 deletions(-) Anton Vorontsov (8): powerpc/sysdev: implement FSL GTM support powerpc/QE: add support for QE USB clocks routing powerpc/QE: prepare QE PIO code for GPIO LIB support powerpc/QE: implement support for the GPIO LIB API powerpc/83xx: new board support: MPC8360E-RDK powerpc/QE: switch to the cpm_muram implementation powerpc/QE: qe_reset should be __init powerpc/QE: use arch_initcall to probe QUICC Engine GPIOs Jerone Young (1): powerpc/booke: Fix definitions for dbcr[1-2] and dbsr registers Kumar Gala (7): powerpc/booke: Fix some comments related to debug level exceptions powerpc/booke: Add support for new e500mc core powerpc/85xx: add DOZE/NAP support for e500 core powerpc/e500mc: flush L2 on NAP for e500mc cpm_uart: fix whitespace issues cpm_uart: Remove !CONFIG_PPC_CPM_NEW_BINDING code powerpc/cpm: Remove !CONFIG_PPC_CPM_NEW_BINDING code Vitaly Bordug (1): powerpc/85xx: Update pin setup for 8560ads Wolfgang Grandegger (4): powerpc/85xx: correct vendor prefix in DTS files for TQM85xx modules powerpc/85xx: add board support for the TQM8548 modules powerpc/85xx: support for the TQM8548 module using the big Flash powerpc/85xx: add local bus nodes for Flash and CAN to tqm8560.dts ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH 2/2] powerpc/booke: Add kprobes support for booke style processors
Hi Kumar,
I confirmed these updated patches and found no issues
with my test. I acknowledge these patches for powerpc
kprobes booke support.
-Madhvesh
-Original Message-
From: Kumar Gala [mailto:[EMAIL PROTECTED]
Sent: Thursday, June 26, 2008 12:36 PM
To: linuxppc-dev@ozlabs.org
Cc: Sulibhavi, Madhvesh
Subject: [PATCH 2/2] powerpc/booke: Add kprobes support for
booke style processors
This patch is based on work done by Madhvesh. R. Sulibhavi back in
March 2007.
We refactor some of the single step handling since it differs between
classic and booke powerpc cores.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
Documentation/kprobes.txt |1 +
arch/powerpc/kernel/kprobes.c | 25 +++--
arch/powerpc/kernel/traps.c | 26 +-
3 files changed, 37 insertions(+), 15 deletions(-)
diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt
index 6877e71..a79633d 100644
--- a/Documentation/kprobes.txt
+++ b/Documentation/kprobes.txt
@@ -172,6 +172,7 @@ architectures:
- ia64 (Does not support probes on instruction slot1.)
- sparc64 (Return probes not yet implemented.)
- arm
+- ppc
3. Configuring Kprobes
diff --git a/arch/powerpc/kernel/kprobes.c
b/arch/powerpc/kernel/kprobes.c
index 74693d9..4ba2af1 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -34,6 +34,13 @@
#include asm/cacheflush.h
#include asm/sstep.h
#include asm/uaccess.h
+#include asm/system.h
+
+#ifdef CONFIG_BOOKE
+#define MSR_SINGLESTEP (MSR_DE)
+#else
+#define MSR_SINGLESTEP (MSR_SE)
+#endif
DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
@@ -53,7 +60,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
ret = -EINVAL;
}
- /* insn must be on a special executable page on ppc64 */
+ /* insn must be on a special executable page on ppc64. This is
+ * not explicitly required on ppc32 (right now), but it
doesn't hurt */
if (!ret) {
p-ainsn.insn = get_insn_slot();
if (!p-ainsn.insn)
@@ -100,7 +108,11 @@ static void __kprobes
prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
* possible we'd get the single step reported for an
exception handler
* like Decrementer or External Interrupt */
regs-msr = ~MSR_EE;
- regs-msr |= MSR_SE;
+ regs-msr |= MSR_SINGLESTEP;
+#ifdef CONFIG_BOOKE
+ regs-msr = ~MSR_CE;
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
+#endif
/*
* On powerpc we should single step on the original
@@ -163,7 +175,8 @@ static int __kprobes
kprobe_handler(struct pt_regs *regs)
kprobe_opcode_t insn = *p-ainsn.insn;
if (kcb-kprobe_status == KPROBE_HIT_SS
is_trap(insn)) {
- regs-msr = ~MSR_SE;
+ /* Turn off 'trace' bits */
+ regs-msr = ~MSR_SINGLESTEP;
regs-msr |= kcb-kprobe_saved_msr;
goto no_kprobe;
}
@@ -404,10 +417,10 @@ out:
/*
* if somebody else is singlestepping across a probe point, msr
- * will have SE set, in which case, continue the
remaining processing
+ * will have DE/SE set, in which case, continue the
remaining processing
* of do_debug, as if this is not a probe hit.
*/
- if (regs-msr MSR_SE)
+ if (regs-msr MSR_SINGLESTEP)
return 0;
return 1;
@@ -430,7 +443,7 @@ int __kprobes kprobe_fault_handler(struct
pt_regs *regs, int trapnr)
* normal page fault.
*/
regs-nip = (unsigned long)cur-addr;
- regs-msr = ~MSR_SE;
+ regs-msr = ~MSR_SINGLESTEP; /* Turn off
'trace' bits */
regs-msr |= kcb-kprobe_saved_msr;
if (kcb-kprobe_status == KPROBE_REENTER)
restore_previous_kprobe(kcb);
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4b5b7ff..b463d48 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1030,21 +1030,29 @@ void SoftwareEmulation(struct pt_regs *regs)
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
-void DebugException(struct pt_regs *regs, unsigned long debug_status)
+void __kprobes DebugException(struct pt_regs *regs, unsigned
long debug_status)
{
if (debug_status DBSR_IC) { /* instruction completion */
regs-msr = ~MSR_DE;
+
+ /* Disable instruction completion */
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) ~DBCR0_IC);
+ /* Clear the instruction completion event */
+ mtspr(SPRN_DBSR, DBSR_IC);
+
+
Re: Please pull from 'powerpc-next' branch
On Jun 26, 2008, at 2:49 AM, Kumar Gala wrote: Please pull from 'powerpc-next' branch of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git powerpc-next to receive the following updates: Paul, any update on when we might see some of the various patches pulled into powerpc-next? I've got some work I'd like to see in .27 but it needs Michael's code patching patches. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Please pull from 'powerpc-next' branch
On Jun 26, 2008, at 2:49 AM, Kumar Gala wrote: Please pull from 'powerpc-next' branch of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git powerpc-next to receive the following updates: Added the kprobe patches: Kumar Gala (2): powerpc/kprobes: Some minor fixes powerpc/booke: Add kprobes support for booke style processors - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc/bootwrapper: Pad .dtb by default
Since most bootloaders or wrappers tend to update or add some information to the .dtb they a handled they need some working space to do that in. By default add 1K of padding via a default setting of DTS_FLAGS. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- arch/powerpc/boot/Makefile |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 25d9fb0..85b45f1 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -35,6 +35,8 @@ endif BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt +DTS_FLAGS ?= -p 1024 + $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 -- 1.5.5.1 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] fs_enet: restore promiscuous and multicast settings in restart()
Hi, On Friday 20 June 2008 10:55, Matvejchikov Ilya wrote: diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c index ce40cf9..1a95cf1 100644 --- a/drivers/net/fs_enet/mac-fcc.c +++ b/drivers/net/fs_enet/mac-fcc.c @@ -464,6 +464,9 @@ static void restart(struct net_device *dev) C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB); S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT); + + /* Restore multicast and promiscous settings */ + set_multicast_list(dev); } Is it right to call set_multicast_list() after turning on transmitter and receiver? May be swap this lines around? I'm not sure if that will make a difference, but you're right, restoring the multicast and promiscuous settings is better done before turning the receiver and transmitter on. I'll send a new patch. -- Laurent Pinchart CSE Semaphore Belgium Chaussee de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgpOS8CP0yMhx.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCHv2] fs_enet: restore promiscuous and multicast settings in restart()
The restart() function is called when the link state changes and resets multicast and promiscuous settings. This patch restores those settings at the end of restart(). Signed-off-by: Laurent Pinchart [EMAIL PROTECTED] --- drivers/net/fs_enet/mac-fcc.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c index e363211..849afbe 100644 --- a/drivers/net/fs_enet/mac-fcc.c +++ b/drivers/net/fs_enet/mac-fcc.c @@ -463,6 +463,9 @@ static void restart(struct net_device *dev) else C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB); + /* Restore multicast and promiscuous settings */ + set_multicast_list(dev); + S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT); } -- 1.5.0 -- Laurent Pinchart CSE Semaphore Belgium Chaussee de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgpDHy8kCNxT5.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH/RFC] powerpc: prevent memory corruption due to cache invalidation of unaligned DMA buffer
On PowerPC processors with non-coherent cache architectures the DMA
subsystem calls invalidate_dcache_range() before performing a DMA read
operation. If the address and length of the DMA buffer are not aligned
to a cache-line boundary this can result in memory outside of the DMA
buffer being invalidated in the cache. If this memory has an
uncommitted store then the data will be lost and a subsequent read of
that address will result in an old value being returned from main memory.
Only when the DMA buffer starts on a cache-line boundary and is an exact
mutiple of the cache-line size can invalidate_dcache_range() be called,
otherwise flush_dcache_range() must be called. flush_dcache_range()
will first flush uncommitted writes, and then invalidate the cache.
Signed-off-by: Andrew Lewis andrew-lewis at netspace.net.au
---
This problem was originally observed using SLUB on the ADS5121
development kit for the Freescale MPC5121e SoC. When booting with a USB
flash disk connected there was a highly intermittent kernel panic where
an attempt was made to dereference an address containing 0x6b6b6b6b, the
SLUB poison marker.
Tracing the origin of the corruption was difficult as modifying the
kernel would often result in the corruption vanishing. Eventually it
was determined that the SCSI request pointer us-srb-request was being
corrupted from a valid value to 0x6b6b6b6b somewhere in the call to
us-proto_handler(us-srb, us) in usb_stor_control_thread()
(drivers/usb/storage/usb.c).
Further tracing revealed the corruption to be occuring when
invalidate_dcache_range() was called.
The address of us-srb-request was 0xCFAC81EC, while the parameters
passed to invalidate_dcache_range() were start=0xCFAC81F0 and
end=0xCFAC8202.
As these addresses are not on a cache-line boundary,
invalidate_dcache_range() actually invalidates from 0xCFAC81E0 to
0xCFAC82E0. This results in an uncommitted store at address 0xCFAC81EC
being discarded to be replaced with 0x6b6b6b6b from the SLUB poisoning
which had been committed to main memory.
Applying this patch also corrected random crashes observed when
connecting and disconnecting a ZD1121 Wireless LAN USB adapter.
dma-noncoherent.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff -upNr linux-2.6.24.6/arch/powerpc/lib/dma-noncoherent.c
wk-linux-2.6.24.6/arch/powerpc/lib/dma-noncoherent.c
--- linux-2.6.24.6/arch/powerpc/lib/dma-noncoherent.c 2008-05-02
05:50:00.0 +0800
+++ wk-linux-2.6.24.6/arch/powerpc/lib/dma-noncoherent.c2008-06-25
15:11:25.0 +0800
@@ -348,8 +348,15 @@ void __dma_sync(void *vaddr, size_t size
switch (direction) {
case DMA_NONE:
BUG();
- case DMA_FROM_DEVICE: /* invalidate only */
- invalidate_dcache_range(start, end);
+ case DMA_FROM_DEVICE:
+ /*
+* invalidate only when cache-line aligned otherwise there is
+* the potential for discarding uncommitted data from the cache
+*/
+ if ((start (L1_CACHE_BYTES - 1)) || (size (L1_CACHE_BYTES -
1)))
+ flush_dcache_range(start, end);
+ else
+ invalidate_dcache_range(start, end);
break;
case DMA_TO_DEVICE: /* writeback only */
clean_dcache_range(start, end);
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[PATCH 1/1] powerpc: add 64 bit version of huge_ptep_set_wrprotect
The implementation of huge_ptep_set_wrprotect() directly calls
ptep_set_wrprotect() to mark a hugepte write protected. However this
call is not appropriate on ppc64 kernels as this is a small page only
implementation. This can lead to the hash not being flushed correctly
when a mapping is being converted to COW, allowing processes to continue
using the original copy.
Currently huge_ptep_set_wrprotect() unconditionally calls
ptep_set_wrprotect(). This is fine on ppc32 kernels as this call is
generic. On 64 bit this is implemented as:
pte_update(mm, addr, ptep, _PAGE_RW, 0);
On ppc64 this last parameter is the page size and is passed directly on
to hpte_need_flush():
hpte_need_flush(mm, addr, ptep, old, huge);
And this directly affects the page size we pass to flush_hash_page():
flush_hash_page(vaddr, rpte, psize, ssize, 0);
As this changes the way the hash is calculated we will flush the wrong
pages, potentially leaving live hashes to the original page.
Move the definition of huge_ptep_set_wrprotect() to the 32/64 bit specific
headers.
Signed-off-by: Andy Whitcroft [EMAIL PROTECTED]
---
include/asm-powerpc/hugetlb.h |6 --
include/asm-powerpc/pgtable-ppc32.h |6 ++
include/asm-powerpc/pgtable-ppc64.h |9 +
3 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/include/asm-powerpc/hugetlb.h b/include/asm-powerpc/hugetlb.h
index 649c6c3..be32ff0 100644
--- a/include/asm-powerpc/hugetlb.h
+++ b/include/asm-powerpc/hugetlb.h
@@ -49,12 +49,6 @@ static inline pte_t huge_pte_wrprotect(pte_t pte)
return pte_wrprotect(pte);
}
-static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
- unsigned long addr, pte_t *ptep)
-{
- ptep_set_wrprotect(mm, addr, ptep);
-}
-
static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long addr, pte_t *ptep,
pte_t pte, int dirty)
diff --git a/include/asm-powerpc/pgtable-ppc32.h
b/include/asm-powerpc/pgtable-ppc32.h
index c08e714..eddad35 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -652,6 +652,12 @@ static inline void ptep_set_wrprotect(struct mm_struct
*mm, unsigned long addr,
{
pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0);
}
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
+{
+ ptep_set_wrprotect(mm, addr, ptep);
+}
+
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
diff --git a/include/asm-powerpc/pgtable-ppc64.h
b/include/asm-powerpc/pgtable-ppc64.h
index cc6a43b..9f7dbc2 100644
--- a/include/asm-powerpc/pgtable-ppc64.h
+++ b/include/asm-powerpc/pgtable-ppc64.h
@@ -313,6 +313,15 @@ static inline void ptep_set_wrprotect(struct mm_struct
*mm, unsigned long addr,
return;
old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
}
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
+{
+ unsigned long old;
+
+ if ((pte_val(*ptep) _PAGE_RW) == 0)
+ return;
+ old = pte_update(mm, addr, ptep, _PAGE_RW, 1);
+}
/*
* We currently remove entries from the hashtable regardless of whether
--
1.5.6.205.g7ca3a
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Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.
On Wednesday 18 June 2008 19:08, Laurent Pinchart wrote:
Based on earlier work by Jochen Friedrich.
This patch implement GPIO LIB support for the CPM2 GPIOs.
Is there any pending issue or can this be applied to powerpc-next ?
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
Cc: Jochen Friedrich [EMAIL PROTECTED]
---
arch/powerpc/platforms/Kconfig |2 +
arch/powerpc/sysdev/cpm2.c | 11
arch/powerpc/sysdev/cpm_common.c | 123
++
include/asm-powerpc/cpm.h|3 +
4 files changed, 139 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c5..7e67e26 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -280,6 +280,8 @@ config CPM2
depends on MPC85xx || 8260
select CPM
select PPC_LIB_RHEAP
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
help
The CPM2 (Communications Processor Module) is a coprocessor on
embedded CPUs made by Freescale. Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 5a6c5df..9311778 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
else
clrbits32(iop[port].odr, pin);
}
+
+static int cpm_init_par_io(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, fsl,cpm2-pario-bank)
+ cpm2_gpiochip_add32(np);
+ return 0;
+}
+arch_initcall(cpm_init_par_io);
+
diff --git a/arch/powerpc/sysdev/cpm_common.c
b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..b957a48 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -19,6 +19,8 @@
#include linux/init.h
#include linux/of_device.h
+#include linux/spinlock.h
+#include linux/of.h
#include asm/udbg.h
#include asm/io.h
@@ -28,6 +30,10 @@
#include mm/mmu_decl.h
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include linux/of_gpio.h
+#endif
+
#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
static u32 __iomem *cpm_udbg_txdesc =
(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
}
EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+ u32 dir, par, sor, odr, dat;
+ u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+ struct cpm2_ioports __iomem *iop = mm_gc-regs;
+
+ cpm2_gc-cpdata = in_be32(iop-dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_ioports __iomem *iop = mm_gc-regs;
+ u32 pin_mask;
+
+ pin_mask = 1 (31 - gpio);
+
+ return !!(in_be32(iop-dat) pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int
value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+ struct cpm2_ioports __iomem *iop = mm_gc-regs;
+ unsigned long flags;
+ u32 pin_mask = 1 (31 - gpio);
+
+ spin_lock_irqsave(cpm2_gc-lock, flags);
+
+ if (value)
+ cpm2_gc-cpdata |= pin_mask;
+ else
+ cpm2_gc-cpdata = ~pin_mask;
+
+ out_be32(iop-dat, cpm2_gc-cpdata);
+
+ spin_unlock_irqrestore(cpm2_gc-lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int
val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_ioports __iomem *iop = mm_gc-regs;
+ u32 pin_mask;
+
+ pin_mask = 1 (31 - gpio);
+
+ setbits32(iop-dir, pin_mask);
+
+ cpm2_gpio32_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_ioports __iomem *iop = mm_gc-regs;
+ u32 pin_mask;
+
+ pin_mask = 1 (31 - gpio);
+
+ clrbits32(iop-dir, pin_mask);
+
+ return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+ struct cpm2_gpio32_chip *cpm2_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
Re: [PATCH] powerpc: Modem control lines support for the cpm_uart driver
On Monday 26 May 2008 11:58, Laurent Pinchart wrote:
On Wednesday 16 April 2008 11:10, Laurent Pinchart wrote:
This patch replaces the get_mctrl/set_mctrl stubs with modem control line
read/write access through the GPIO lib.
Available modem control lines are described in the device tree using GPIO
bindings.
Any show stopper on this patch ? Could it get into powerpc-next ?
Sorry to bother everybody again, but I'd like this patch to go in 2.6.27. Is
there any pending issue ? Platforms without GPIO support shouldn't be
affected and get_mctrl()/set_mctrl() behaviour is backward compatible for
existing platforms.
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
---
Documentation/powerpc/booting-without-of.txt | 10 ++
drivers/serial/cpm_uart/cpm_uart.h | 10 ++
drivers/serial/cpm_uart/cpm_uart_core.c | 40
--
3 files changed, 57 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 1e5572a..012f231 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1976,6 +1976,14 @@ platforms are moved over to use the
flattened-device-tree model.
- fsl,cpm2-scc-uart
- fsl,qe-uart
+ Modem control lines connected to GPIO controllers are listed in the
+ gpios property as described in section VIII.1 in the following order:
+
+ CTS, RTS, DCD, DSR, DTR, and RI.
+
+ The gpios property is optional and can be left out when control lines
are
+ not used.
+
Example:
[EMAIL PROTECTED] {
@@ -1987,6 +1995,8 @@ platforms are moved over to use the
flattened-device-tree model.
interrupt-parent = PIC;
fsl,cpm-brg = 1;
fsl,cpm-command = 0080;
+ gpios = gpio_c 15 0
+gpio_d 29 0;
};
iii) Network
diff --git a/drivers/serial/cpm_uart/cpm_uart.h
b/drivers/serial/cpm_uart/cpm_uart.h
index 0cc39f8..d0c55e2 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -50,6 +50,15 @@
#define SCC_WAIT_CLOSING 100
+#define GPIO_CTS 0
+#define GPIO_RTS 1
+#define GPIO_DCD 2
+#define GPIO_DSR 3
+#define GPIO_DTR 4
+#define GPIO_RI5
+
+#define NUM_GPIOS (GPIO_RI+1)
+
struct uart_cpm_port {
struct uart_portport;
u16 rx_nrfifos;
@@ -82,6 +91,7 @@ struct uart_cpm_port {
int wait_closing;
/* value to combine with opcode to form cpm command */
u32 command;
+ int gpios[NUM_GPIOS];
};
#ifndef CONFIG_PPC_CPM_NEW_BINDING
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index 7a704ff..0f08071 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -42,6 +42,8 @@
#include linux/bootmem.h
#include linux/dma-mapping.h
#include linux/fs_uart_pd.h
+#include linux/gpio.h
+#include linux/of_gpio.h
#include asm/io.h
#include asm/irq.h
@@ -152,13 +154,41 @@ static unsigned int cpm_uart_tx_empty(struct
uart_port *port)
static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int
mctrl)
{
- /* Whee. Do nothing. */
+ struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
+
+ if (pinfo-gpios[GPIO_RTS] = 0)
+ gpio_set_value(pinfo-gpios[GPIO_RTS], !(mctrl TIOCM_RTS));
+
+ if (pinfo-gpios[GPIO_DTR] = 0)
+ gpio_set_value(pinfo-gpios[GPIO_DTR], !(mctrl TIOCM_DTR));
}
static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
{
- /* Whee. Do nothing. */
- return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
+ struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
+ unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+
+ if (pinfo-gpios[GPIO_CTS] = 0) {
+ if (gpio_get_value(pinfo-gpios[GPIO_CTS]))
+ mctrl = ~TIOCM_CTS;
+ }
+
+ if (pinfo-gpios[GPIO_DSR] = 0) {
+ if (gpio_get_value(pinfo-gpios[GPIO_DSR]))
+ mctrl = ~TIOCM_DSR;
+ }
+
+ if (pinfo-gpios[GPIO_DCD] = 0) {
+ if (gpio_get_value(pinfo-gpios[GPIO_DCD]))
+ mctrl = ~TIOCM_CAR;
+ }
+
+ if (pinfo-gpios[GPIO_RI] = 0) {
+ if (!gpio_get_value(pinfo-gpios[GPIO_RI]))
+ mctrl |= TIOCM_RNG;
+ }
+
+ return mctrl;
}
/*
@@ -959,6 +989,7 @@ static int cpm_uart_init_port(struct device_node *np,
void __iomem *mem, *pram;
int len;
int ret;
+ int i;
data = of_get_property(np, fsl,cpm-brg, len);
if (!data || len != 4) {
@@ -1017,6 +1048,9 @@ static int cpm_uart_init_port(struct
Re: [PATCH/RFC] powerpc: prevent memory corruption due to cache invalidation of unaligned DMA buffer
Original-Nachricht Datum: Thu, 26 Jun 2008 17:29:05 +0800 Von: Andrew Lewis [EMAIL PROTECTED] An: linuxppc-dev@ozlabs.org CC: \'Andrew Lewis\' [EMAIL PROTECTED], [EMAIL PROTECTED] Betreff: [PATCH/RFC] powerpc: prevent memory corruption due to cache invalidation of unaligned DMA buffer On PowerPC processors with non-coherent cache architectures the DMA subsystem calls invalidate_dcache_range() before performing a DMA read operation. If the address and length of the DMA buffer are not aligned to a cache-line boundary this can result in memory outside of the DMA buffer being invalidated in the cache. If this memory has an uncommitted store then the data will be lost and a subsequent read of that address will result in an old value being returned from main memory. Only when the DMA buffer starts on a cache-line boundary and is an exact mutiple of the cache-line size can invalidate_dcache_range() be called, otherwise flush_dcache_range() must be called. flush_dcache_range() will first flush uncommitted writes, and then invalidate the cache. I have a similar problem, but with a network driver (which uses cacheable skbuffers as DMA memory). The SLUB allocator should return cache line aligned memory, but that doesn't prevent data corruption. I fixed it by setting NET_SKB_PAD (default 16) to L1_CACHE_BYTES (32 on my 7455 non coherent DMA system). It looks like your patch could solve my problem without changing NET_SKB_PAD. I'll have to try that out. regards, Gerhard -- Ist Ihr Browser Vista-kompatibel? Jetzt die neuesten Browser-Versionen downloaden: http://www.gmx.net/de/go/browser ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Wed, Jun 25, 2008 at 11:17:45AM -0500, Scott Wood wrote:
Gabriel Paubert wrote:
On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote:
Kumar Gala wrote:
+/* Macros to workout the correct index for the FPR in the thread
struct */
+#define FPRNUMBER(i) (((i) - PT_FPR0) 1)
+#define FPRHALF(i) (((i) - PT_FPR0) % 2)
Have you looked at what the compiler spits out here to make sure we
aren't getting a divide? Seems like we could use ' 0x1'.
GCC's not *that* dumb. However, you may get some unnecessary
sign-twiddling if i is signed.
Not for modulo 2, it's only an even/odd choice and GCC
implements that efficiently IIRC. For other powers of 2,
making the left hand side unsigned helps the compiler.
From this:
int foo(int x)
{
return x % 2;
}
I get this with -O3:
foo:
mr 0,3
srawi 3,3,1
addze 3,3
slwi 3,3,1
subf 3,3,0
blr
.size foo, .-foo
.ident GCC: (GNU) 4.1.2
Indeed. Signed modulo results can be negative...
There are probably better ways to implement this case
on PPC, for example:
rlwinm tmp,input,4,27,28 ; make shift amount from LSB and MSB
lis result,0xff01
srw result,result,tmp
; result is now 0x00 for even, 0x01 for odd positive,
; and 0xff for odd negative
extsb result,result
No carry, shorter dependency length (although srw may be slow
on Cell it seems, but addze may be worse).
Changing it to x 1, or to unsigned, gives this:
foo:
rlwinm 3,3,0,31,31
blr
.size foo, .-foo
.ident GCC: (GNU) 4.1.2
Maybe newer GCCs are better?
Nope, but unsigned is often better for the right shift.
Gabriel
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Re: [PATCH 2/2] fs_enet: MDIO on GPIO support
Jeff, Scott,
On Wednesday 18 June 2008 17:16, Laurent Pinchart wrote:
On Wednesday 18 June 2008 17:00, Jeff Garzik wrote:
Laurent Pinchart wrote:
Hi Scott,
On Monday 16 June 2008 18:34, Scott Wood wrote:
On Mon, Jun 16, 2008 at 10:57:02AM +0200, Laurent Pinchart wrote:
On Monday 26 May 2008 11:53, Laurent Pinchart wrote:
Port the fs_enet driver to support the MDIO on GPIO driver for PHY
access in addition to the mii-bitbang driver.
Now that 1/2 has been applied by Jeff, could this one make it to
powerpc-next ?
This patch should probably go through Jeff as well...
Jeff, what's your opinion on this ?
Acked-by: Scott Wood [EMAIL PROTECTED]
- data = of_get_property(phynode, reg, len);
- if (!data || len != 4)
- goto out_put_mdio;
+ bus_id = of_get_gpio(mdionode, 0);
+ if (bus_id 0) {
+ struct resource res;
+ ret = of_address_to_resource(mdionode, 0, res);
+ if (ret)
+ goto out_put_mdio;
+ bus_id = res.start;
+ }
- snprintf(fpi-bus_id, 16, %x:%02x, res.start, *data);
+ snprintf(fpi-bus_id, 16, %x:%02x, bus_id, *data);
What are the patch dependencies, if any?
My general rule is, anytime I see 80%+ of the patch dealing with
arch-specific API functions (such as OF resource stuff), I tend to
prefer that goes via an arch tree.
If it's a networking change, of course I'd prefer it came in my direction.
The patch modifies the way the Freescale SoC fs_enet driver computes the PHY
bus_id field when it connects to a PHY.
The 'legacy' binding method was to use the MDIO general purpose I/O register
address to identify the mii bus. My first patch (OpenFirmware GPIO based MDIO
bitbang driver) introduces a new binding using the GPIO library.
With this patch the mii bus is now identified by the GPIO lib I/O resource
number if available and falls back to the register address when the device
tree uses the legacy binding.
There should be no dependencies. When the OF GPIO support is not selected
linux/of_gpio.h will define of_get_gpio() as a stub, so the fs_enet driver
will fall back to the legacy binding.
Have we reached a consensus on which tree the patch should go to ?
--
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CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
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[RFC] cpm_uart: Fix break generation
When generating a break condition on a serial port, the CPM must be told
beforehand how long the break should be. Unfortunately, this information is
not available through the current serial break handling API. This patch works
around the problem by requesting a 32767 characters break followed by a 0
characters break after the requested duration. The CPM will stop the first
break when the second one is requested. This might not work with future CPM
revisions.
An alternative would be to change the serial break handling API to pass the
break duration down to the serial drivers.
---
drivers/serial/cpm_uart/cpm_uart_core.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index c29d87d..aa0a284 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -268,14 +268,23 @@ static void cpm_uart_break_ctl(struct uart_port *port,
int break_state)
static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
+ volatile u16 *brkcr = IS_SMC(pinfo) ? pinfo-smcup-smc_brkcr
+ : pinfo-sccup-scc_brkcr;
pr_debug(CPM uart[%d]:break ctrl, break_state: %d\n, port-line,
break_state);
if (break_state)
+ {
+ *brkcr = 32767;
cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
+ }
else
+ {
+ *brkcr = 0;
+ cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
+ }
}
/*
--
1.5.0
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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[PATCH] powerpc: Fix /dev/oldmem for kdump
This one has been pending for a long time. Somehow never
made it upstream.
Resending the patch which fixes /dev/oldmem interface for kdump.
Tested with 2.6.26-rc8.
Signed-off-by : Michael Ellerman [EMAIL PROTECTED]
Fix /dev/oldmem for kdump
A change to __ioremap() broke reading /dev/oldmem because we're no
longer able to ioremap pfn 0 (d177c207ba16b1db31283e2d1fee7ad4a863584b).
We actually don't need to ioremap for anything that's part of the linear
mapping, so just read it directly.
Also make sure we're only reading one page or less at a time.
Signed-off-by : Michael Ellerman [EMAIL PROTECTED]
---
diff -Naurp old/arch/powerpc/kernel/crash_dump.c
new/arch/powerpc/kernel/crash_dump.c
--- old/arch/powerpc/kernel/crash_dump.c2008-06-25 07:28:20.0
+0530
+++ new/arch/powerpc/kernel/crash_dump.c2008-06-26 14:46:17.0
+0530
@@ -83,6 +83,19 @@ static int __init parse_savemaxmem(char
}
__setup(savemaxmem=, parse_savemaxmem);
+
+static size_t copy_oldmem_vaddr(void *vaddr, char *buf, size_t csize,
+ unsigned long offset, int userbuf)
+{
+ if (userbuf) {
+ if (copy_to_user((char __user *)buf, (vaddr + offset), csize))
+ return -EFAULT;
+ } else
+ memcpy(buf, (vaddr + offset), csize);
+
+ return csize;
+}
+
/**
* copy_oldmem_page - copy one page from oldmem
* @pfn: page frame number to be copied
@@ -104,16 +117,16 @@ ssize_t copy_oldmem_page(unsigned long p
if (!csize)
return 0;
- vaddr = __ioremap(pfn PAGE_SHIFT, PAGE_SIZE, 0);
+ csize = min(csize, PAGE_SIZE);
- if (userbuf) {
- if (copy_to_user((char __user *)buf, (vaddr + offset), csize)) {
- iounmap(vaddr);
- return -EFAULT;
- }
- } else
- memcpy(buf, (vaddr + offset), csize);
+ if (pfn max_pfn) {
+ vaddr = __va(pfn PAGE_SHIFT);
+ csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
+ } else {
+ vaddr = __ioremap(pfn PAGE_SHIFT, PAGE_SIZE, 0);
+ csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
+ iounmap(vaddr);
+ }
- iounmap(vaddr);
return csize;
}
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[PATCH] cpm_uart: Support uart_wait_until_sent()
Set port-fifosize to the software FIFO size, and update the port timeout when the baud rate is modified. SCC ports have an optional 32 byte hardware FIFO which is currently not taken into account, as there is no documented way to check when the FIFO becomes empty. Signed-off-by: Laurent Pinchart [EMAIL PROTECTED] --- drivers/serial/cpm_uart/cpm_uart_core.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index a19dc7e..151cad2 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c @@ -547,6 +547,11 @@ static void cpm_uart_set_termios(struct uart_port *port, } /* +* Update the timeout +*/ + uart_update_timeout(port, termios-c_cflag, baud); + + /* * Set up parity check flag */ #define RELEVANT_IFLAG(iflag) (iflag (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) @@ -1154,6 +1159,7 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) pinfo-port.uartclk = pdata-uart_clk; pinfo-port.mapbase = (unsigned long)mem; pinfo-port.irq = platform_get_irq(pdev, 0); + pinfo-port.fifosize = pinfo-tx_nrfifos * pinfo-tx_fifosize; return 0; } -- 1.5.0 -- Laurent Pinchart CSE Semaphore Belgium Chaussee de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgpIiAloV7v6o.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: add of_find_next_property and of_get_aliased_index
+struct property *of_find_next_property(const struct device_node *np,
+ struct property *prev)
+{
+ struct property *next;
+
+ if (!np)
+ return NULL;
+
+ read_lock(devtree_lock);
+ next = prev ? prev-next : np-properties;
+ read_unlock(devtree_lock);
+
+ return next;
+}
Unfortunately, this isn't race free vs. removal or addition of
properties. This is fine with the intended usage (ie. retreiving
aliases) but at least that should be explained in a comment.
Cheers,
Ben.
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Re: [PATCH 1/1] powerpc: add 64 bit version of huge_ptep_set_wrprotect
On Thu, 2008-06-26 at 10:55 +0100, Andy Whitcroft wrote: The implementation of huge_ptep_set_wrprotect() directly calls ptep_set_wrprotect() to mark a hugepte write protected. However this call is not appropriate on ppc64 kernels as this is a small page only implementation. This can lead to the hash not being flushed correctly when a mapping is being converted to COW, allowing processes to continue using the original copy. Currently huge_ptep_set_wrprotect() unconditionally calls ptep_set_wrprotect(). This is fine on ppc32 kernels as this call is generic. On 64 bit this is implemented as: pte_update(mm, addr, ptep, _PAGE_RW, 0); On ppc64 this last parameter is the page size and is passed directly on to hpte_need_flush(): hpte_need_flush(mm, addr, ptep, old, huge); And this directly affects the page size we pass to flush_hash_page(): flush_hash_page(vaddr, rpte, psize, ssize, 0); As this changes the way the hash is calculated we will flush the wrong pages, potentially leaving live hashes to the original page. Move the definition of huge_ptep_set_wrprotect() to the 32/64 bit specific headers. Signed-off-by: Andy Whitcroft [EMAIL PROTECTED] Acked-by: Benjamin Herrenschmidt [EMAIL PROTECTED] Good catch btw ! Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH/RFC] powerpc: prevent memory corruption due to cache invalidation of unaligned DMA buffer
On Thu, 2008-06-26 at 17:29 +0800, Andrew Lewis wrote: On PowerPC processors with non-coherent cache architectures the DMA subsystem calls invalidate_dcache_range() before performing a DMA read operation. If the address and length of the DMA buffer are not aligned to a cache-line boundary this can result in memory outside of the DMA buffer being invalidated in the cache. If this memory has an uncommitted store then the data will be lost and a subsequent read of that address will result in an old value being returned from main memory. Thanks for providing a fix. The problem is old and in fact was discussed a while ago, unfortunately, it looks like the SCSI folks didn't fix it yet. In theory, on non-cache coherent architecture, buffers that can be DMA'ed should not share cache lines with other objects. This is violated by the SCSI code due to recent changes to the way the sense buffer is allocated. Various solutions were proposed, including a __dma_buffer alignment directive, but back then, the wind blew more toward changing the way the buffer is allocated in the SCSI stack. Some people started working on that and I lost track. It looks like it wasn't properly fixed :-( I'll ack your patch for now as workaround, though it would be good to have some kind of debug option to make it WARN_ON when the unaligned case happen, to track them down and help fix them. I'll try to catch up with the SCSI folks to see what's up on this side. In the meantime: Acked-by: Benjamin Herrenschmidt [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 19/60] microblaze_v4: checksum support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-generic/checksum.h| 101 ++
include/asm-microblaze/checksum.h |1 +
lib/Makefile |2 +
lib/checksum.c| 166 +
4 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 include/asm-generic/checksum.h
create mode 100644 include/asm-microblaze/checksum.h
create mode 100644 lib/checksum.c
diff --git a/include/asm-generic/checksum.h b/include/asm-generic/checksum.h
new file mode 100644
index 000..b40f0f8
--- /dev/null
+++ b/include/asm-generic/checksum.h
@@ -0,0 +1,101 @@
+/*
+ * include/asm-generic/checksum.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#ifndef _ASM_GENERIC_CHECKSUM_H
+#define _ASM_GENERIC_CHECKSUM_H
+
+#include linux/in6.h
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in sum (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+unsigned int csum_partial(const unsigned char *buff, int len,
+ unsigned int sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum);
+
+/*
+ * the same as csum_partial_copy, but copies from user space.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+extern unsigned int csum_partial_copy_from_user(const char *src, char *dst,
+ int len, int sum, int *csum_err);
+
+#define csum_partial_copy_nocheck(src, dst, len, sum) \
+ csum_partial_copy((src), (dst), (len), (sum))
+
+/*
+ * This is a version of ip_compute_csum() optimized for IP headers,
+ * which always checksum on 4 octet boundaries.
+ *
+ */
+extern unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl);
+
+/*
+ * Fold a partial checksum
+ */
+static inline unsigned int csum_fold(unsigned int sum)
+{
+ sum = (sum 0x) + (sum 16);
+ sum = (sum 0x) + (sum 16);
+ return ~sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline unsigned int
+csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short
len,
+ unsigned short proto, unsigned int sum)
+{
+ __asm__(add %0, %4, %1\n\t
+ addc %0, %4, %2\n\t
+ addc %0, %4, %3\n\t
+ addc %0, %4, r0\n\t
+ : =d (sum)
+ : d (saddr), d (daddr), d (len + proto),
+ 0(sum));
+
+ return sum;
+}
+
+static inline unsigned short int
+csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
+ unsigned short proto, unsigned int sum)
+{
+ return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+extern unsigned short ip_compute_csum(const unsigned char *buff, int len);
+
+#endif /* _ASM_GENERIC_CHECKSUM_H */
diff --git a/include/asm-microblaze/checksum.h
b/include/asm-microblaze/checksum.h
new file mode 100644
index 000..adbb5e6
--- /dev/null
+++ b/include/asm-microblaze/checksum.h
@@ -0,0 +1 @@
+#include asm-generic/checksum.h
diff --git a/lib/Makefile b/lib/Makefile
index 74b0cfb..6f48c04 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -72,6 +72,8 @@ lib-$(CONFIG_GENERIC_BUG) += bug.o
obj-$(CONFIG_HAVE_LMB) += lmb.o
+obj-$(CONFIG_GENERIC_CSUM) += checksum.o
+
hostprogs-y:= gen_crc32table
clean-files:= crc32table.h
diff --git a/lib/checksum.c b/lib/checksum.c
new file mode 100644
index 000..0060873
--- /dev/null
+++ b/lib/checksum.c
@@ -0,0 +1,166 @@
+/*
+ * arch/microblaze/lib/checksum.c
+ *
+ * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED]
+ *
+ * INETAn implementation of the TCP/IP protocol suite for the
LINUX
+ * operating system. INET is implemented using the BSD Socket
+ * interface as the means of communication with the user level.
+ *
+ * IP/TCP/UDP checksumming routines
+ *
+ * Authors:Jorge Cwik, [EMAIL PROTECTED]
+ * Arnt Gulbrandsen, [EMAIL PROTECTED]
+ * Tom May, [EMAIL PROTECTED]
+ * Andreas Schwab, [EMAIL PROTECTED]
+ *
[PATCH 21/60] microblaze_v4: uaccess files
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/lib/uaccess.c| 41 +
include/asm-microblaze/uaccess.h | 124 ++
2 files changed, 165 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/lib/uaccess.c
create mode 100644 include/asm-microblaze/uaccess.h
diff --git a/arch/microblaze/lib/uaccess.c b/arch/microblaze/lib/uaccess.c
new file mode 100644
index 000..03a3051
--- /dev/null
+++ b/arch/microblaze/lib/uaccess.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/string.h
+#include asm/uaccess.h
+
+#include asm/bug.h
+
+long strnlen_user(const char __user *s, long n)
+{
+ return strlen(s) + 1;
+}
+
+#define __do_strncpy_from_user(dst, src, count, res) \
+ do {\
+ char *tmp; \
+ strncpy(dst, src, count); \
+ for (tmp = dst; *tmp count 0; tmp++, count--) \
+ ; \
+ res = (tmp - dst); \
+ } while (0)
+
+long __strncpy_from_user(char *dst, const char __user *src, long count)
+{
+ long res;
+ __do_strncpy_from_user(dst, src, count, res);
+ return res;
+}
+
+long strncpy_from_user(char *dst, const char *src, long count)
+{
+ long res = -EFAULT;
+ if (access_ok(VERIFY_READ, src, 1))
+ __do_strncpy_from_user(dst, src, count, res);
+ return res;
+}
diff --git a/include/asm-microblaze/uaccess.h b/include/asm-microblaze/uaccess.h
new file mode 100644
index 000..e50ad56
--- /dev/null
+++ b/include/asm-microblaze/uaccess.h
@@ -0,0 +1,124 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_UACCESS_H
+#define _ASM_MICROBLAZE_UACCESS_H
+
+#include linux/kernel.h
+#include linux/errno.h
+#include asm/segment.h
+#include asm/string.h
+
+#include linux/sched.h /* RLIMIT_FSIZE */
+/* #include linux/errno.h */
+
+#define VERIFY_READ0
+#define VERIFY_WRITE 1
+
+extern int ___range_ok(unsigned long addr, unsigned long size);
+
+#define __range_ok(addr, size) \
+ ___range_ok((unsigned long)(addr), (unsigned long)(size))
+
+#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
+#define __access_ok(add, size) (__range_ok((addr), (size)) == 0)
+
+extern inline int bad_user_access_length(void)
+{
+ return 0;
+}
+
+#define __get_user(var, ptr) \
+ ({ \
+ int __gu_err = 0; \
+ switch (sizeof(*(ptr))) { \
+ case 1: \
+ case 2: \
+ case 4: \
+ (var) = *(ptr); \
+ break; \
+ case 8: \
+ memcpy((void *) (var), (ptr), 8); \
+ break; \
+ default:\
+ (var) = 0; \
+ __gu_err = __get_user_bad();\
+ break; \
+ } \
+ __gu_err; \
+ })
+
+#define __get_user_bad() (bad_user_access_length(), (-EFAULT))
+
+#define __put_user(var, ptr) \
+ ({ \
+ int __pu_err = 0; \
+ switch (sizeof(*(ptr))) { \
+ case 1: \
+ case 2: \
+ case 4: \
+ *(ptr) = (var); \
+ break; \
+ case 8: {
[PATCH 26/60] microblaze_v4: time support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/delay.h | 30 ++
include/asm-microblaze/timex.h | 18 ++
2 files changed, 48 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/delay.h
create mode 100644 include/asm-microblaze/timex.h
diff --git a/include/asm-microblaze/delay.h b/include/asm-microblaze/delay.h
new file mode 100644
index 000..cdafdad
--- /dev/null
+++ b/include/asm-microblaze/delay.h
@@ -0,0 +1,30 @@
+/*
+ * include/asm-microblaze/delay.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#ifndef _ASM_MICROBLAZE_DELAY_H
+#define _ASM_MICROBLAZE_DELAY_H
+
+extern unsigned long loops_per_jiffy;
+
+extern inline void __delay(unsigned long loops)
+{
+ asm volatile (# __delay\n\t \
+ 1: addi%0, %0, -1 \t\n\
+ bneid %0, 1b \t\n \
+ nop\t\n
+ : =r (loops)
+ : 0 (loops));
+}
+
+static inline void udelay(unsigned long usec)
+{
+}
+
+#endif /* _ASM_MICROBLAZE_DELAY_H */
diff --git a/include/asm-microblaze/timex.h b/include/asm-microblaze/timex.h
new file mode 100644
index 000..678525d
--- /dev/null
+++ b/include/asm-microblaze/timex.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_TIMEX_H
+#define _ASM_MICROBLAZE_TIMEX_H
+
+#define CLOCK_TICK_RATE 1000 /* Timer input freq. */
+
+typedef unsigned long cycles_t;
+
+#define get_cycles() (0)
+
+#endif /* _ASM_TIMEX_H */
--
1.5.4.GIT
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[PATCH 22/60] microblaze_v4: heartbeat file
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/heartbeat.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/heartbeat.c
diff --git a/arch/microblaze/kernel/heartbeat.c
b/arch/microblaze/kernel/heartbeat.c
new file mode 100644
index 000..5a21c1d
--- /dev/null
+++ b/arch/microblaze/kernel/heartbeat.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/sched.h
+#include asm/page.h
+#include asm/io.h
+#include asm/setup.h
+
+void heartbeat(void)
+{
+ static unsigned int cnt, period, dist;
+
+ if (cnt == 0 || cnt == dist)
+ iowrite32(1, CONFIG_HEART_BEAT_ADDRESS);
+ else if (cnt == 7 || cnt == dist + 7)
+ iowrite32(0, CONFIG_HEART_BEAT_ADDRESS);
+
+ if (++cnt period) {
+ cnt = 0;
+ /*
+* The hyperbolic function below modifies the heartbeat period
+* length in dependency of the current (5min) load. It goes
+* through the points f(0)=126, f(1)=86, f(5)=51, f(inf)-30.
+*/
+ period = ((672 FSHIFT) / (5 * avenrun[0] +
+ (7 FSHIFT))) + 30;
+ dist = period / 4;
+ }
+}
--
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[PATCH 18/60] microblaze_v4: supported function for memory - kernel/lib
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/lib/memcpy.c | 160 +
arch/microblaze/lib/memmove.c | 174 +
arch/microblaze/lib/memset.c | 78 ++
3 files changed, 412 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/lib/memcpy.c
create mode 100644 arch/microblaze/lib/memmove.c
create mode 100644 arch/microblaze/lib/memset.c
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
new file mode 100644
index 000..199668d
--- /dev/null
+++ b/arch/microblaze/lib/memcpy.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED]
+ *
+ * Reasonably optimised generic C-code for memcpy on Microblaze
+ * This is generic C code to do efficient, alignment-aware memcpy.
+ *
+ * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
+ * http://www.embedded.com/showArticle.jhtml?articleID=19205567
+ *
+ * Attempts were made, unsuccesfully, to contact the original
+ * author of this code (Michael Morrow, Intel). Below is the original
+ * copyright notice.
+ *
+ * This software has been developed by Intel Corporation.
+ * Intel specifically disclaims all warranties, express or
+ * implied, and all liability, including consequential and
+ * other indirect damages, for the use of this program, including
+ * liability for infringement of any proprietary rights,
+ * and including the warranties of merchantability and fitness
+ * for a particular purpose. Intel does not assume any
+ * responsibility for and errors which may appear in this program
+ * not any responsibility to update it.
+ */
+
+#include linux/types.h
+#include linux/stddef.h
+#include linux/compiler.h
+#include linux/module.h
+
+#include asm/string.h
+#include asm/system.h
+
+#ifdef __HAVE_ARCH_MEMCPY
+void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
+{
+ const char *src = v_src;
+ char *dst = v_dst;
+#ifndef CONFIG_OPT_LIB_FUNCTION
+ /* Simple, byte oriented memcpy. */
+ while (c--)
+ *dst++ = *src++;
+
+ return v_dst;
+#else
+ /* The following code tries to optimize the copy by using unsigned
+* alignment. This will work fine if both source and destination are
+* aligned on the same boundary. However, if they are aligned on
+* different boundaries shifts will be necessary. This might result in
+* bad performance on MicroBlaze systems without a barrel shifter.
+*/
+ const uint32_t *i_src;
+ uint32_t *i_dst;
+
+ if (c = 4) {
+ unsigned value, buf_hold;
+
+ /* Align the dstination to a word boundry. */
+ /* This is done in an endian independant manner. */
+ switch ((unsigned long)dst 3) {
+ case 1:
+ *dst++ = *src++;
+ --c;
+ case 2:
+ *dst++ = *src++;
+ --c;
+ case 3:
+ *dst++ = *src++;
+ --c;
+ }
+
+ i_dst = (void *)dst;
+
+ /* Choose a copy scheme based on the source */
+ /* alignment relative to dstination. */
+ switch ((unsigned long)src 3) {
+ case 0x0: /* Both byte offsets are aligned */
+ i_src = (const void *)src;
+
+ for (; c = 4; c -= 4)
+ *i_dst++ = *i_src++;
+
+ src = (const void *)i_src;
+ break;
+ case 0x1: /* Unaligned - Off by 1 */
+ /* Word align the source */
+ i_src = (const void *) ((unsigned)src ~3);
+
+ /* Load the holding buffer */
+ buf_hold = *i_src++ 8;
+
+ for (; c = 4; c -= 4) {
+ value = *i_src++;
+ *i_dst++ = buf_hold | value 24;
+ buf_hold = value 8;
+ }
+
+ /* Realign the source */
+ src = (const void *)i_src;
+ src -= 3;
+ break;
+ case 0x2: /* Unaligned - Off by 2 */
+ /* Word align the source */
+ i_src = (const void *) ((unsigned)src ~3);
+
+ /* Load the holding buffer */
+ buf_hold = *i_src++ 16;
+
+ for (; c = 4; c -= 4) {
+ value = *i_src++;
+ *i_dst++ = buf_hold | value 16;
+ buf_hold = value 16;
+ }
+
+ /* Realign the source */
+
[PATCH 25/60] microblaze_v4: process and init task function
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/init_task.c | 28
arch/microblaze/kernel/process.c | 127
2 files changed, 155 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/init_task.c
create mode 100644 arch/microblaze/kernel/process.c
diff --git a/arch/microblaze/kernel/init_task.c
b/arch/microblaze/kernel/init_task.c
new file mode 100644
index 000..c841b55
--- /dev/null
+++ b/arch/microblaze/kernel/init_task.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/module.h
+#include linux/sched.h
+#include linux/init_task.h
+#include linux/fs.h
+#include linux/mqueue.h
+
+#include asm/pgtable.h
+
+static struct fs_struct init_fs = INIT_FS;
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+struct mm_struct init_mm = INIT_MM(init_mm);
+EXPORT_SYMBOL(init_mm);
+
+union thread_union init_thread_union
+ __attribute__((__section__(.data.init_task))) =
+{ INIT_THREAD_INFO(init_task) };
+
+struct task_struct init_task = INIT_TASK(init_task);
+EXPORT_SYMBOL(init_task);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
new file mode 100644
index 000..c8e6bef
--- /dev/null
+++ b/arch/microblaze/kernel/process.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/module.h
+#include linux/sched.h
+#include linux/pm.h
+
+#include asm/system.h
+
+/* FIXME */
+void show_regs(struct pt_regs *regs)
+{
+ unsigned long *p;
+ int i;
+ printk(KERN_INFO pc:\t0x%08lx\tsp:\t0x%08lx\n, regs-pc, regs-r1);
+ printk(KERN_INFO
+ flags:\t0x%08lx\tear:\t0x%08lx\tesr:\t
+ 0x%08lx\tfsr:\t0x%08lx\n,
+ regs-msr, regs-ear, regs-esr, regs-fsr);
+ printk(KERN_INFO
+ r0:\t0x%08lx\tr1:\t0x%08lx\tr2:\t0x%08lx\tr3\t0x%08lx\n,
+ 0L, regs-r1, regs-r2, regs-r3);
+ for (i = 4, p = (regs-r4); i 32; i += 4, p += 4) {
+ printk(KERN_INFO r%i:\t0x%08lx\tr%i:\t0x%08lx\tr%i:\t
+ 0x%08lx\tr%i:\t0x%08lx\n,
+ i, *p, i+1, *(p+1), i+2, *(p+2), i+3, *(p+3));
+ }
+ printk(KERN_INFO \n);
+}
+
+void (*pm_power_off)(void) = NULL;
+EXPORT_SYMBOL(pm_power_off);
+
+void cpu_idle(void)
+{
+ set_thread_flag(TIF_POLLING_NRFLAG);
+
+ while (1) {
+ while (!need_resched())
+ cpu_relax();
+
+ preempt_enable_no_resched();
+ schedule();
+ preempt_disable();
+ }
+}
+
+void flush_thread(void)
+{
+}
+
+int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
+ unsigned long unused,
+ struct task_struct *p, struct pt_regs *regs)
+{
+ struct pt_regs *childregs = task_pt_regs(p);
+ struct thread_info *ti = task_thread_info(p);
+
+ *childregs = *regs;
+
+ if (user_mode(regs))
+ childregs-r1 = usp;
+ else
+ childregs-r1 = ((unsigned long) ti) + THREAD_SIZE;
+
+ memset(ti-cpu_context, 0, sizeof(struct cpu_context));
+ ti-cpu_context.r1 = (unsigned long)childregs;
+ ti-cpu_context.msr = (unsigned long)childregs-msr;
+ ti-cpu_context.r15 = (unsigned long)ret_from_fork - 8;
+
+ if (clone_flags CLONE_SETTLS)
+ ;/* FIXME: not sure what to do */
+
+ return 0;
+}
+
+/*
+ * Return saved PC of a blocked thread.
+ * FIXME this needs to be checked
+ */
+unsigned long thread_saved_pc(struct task_struct *tsk)
+{
+ struct cpu_context *ctx =
+ (((struct thread_info *)(tsk-stack))-cpu_context);
+
+ /* Check whether the thread is blocked in resume() */
+ if (in_sched_functions(ctx-r15))
+ return ((unsigned long)ctx-r15);
+ else
+ return ctx-r14;
+}
+
+static void kernel_thread_helper(int (*fn)(void *), void *arg)
+{
+ fn(arg);
+ do_exit(-1);
+}
+
+int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
+{
+ struct pt_regs regs;
+ int ret;
+
+ memset(regs, 0, sizeof(regs));
+ /* store them in non-volatile registers */
+ regs.r5 = (unsigned long)fn;
+ regs.r6 = (unsigned long)arg;
+ local_save_flags(regs.msr);
+ regs.pc = (unsigned long)kernel_thread_helper;
+ regs.kernel_mode = 1;
+
+ ret = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
+
[PATCH 29/60] microblaze_v4: traps support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/traps.c | 86
1 files changed, 86 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/traps.c
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
new file mode 100644
index 000..69d75ee
--- /dev/null
+++ b/arch/microblaze/kernel/traps.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/kernel.h
+#include linux/kallsyms.h
+#include linux/module.h
+#include linux/sched.h
+
+#include asm/exceptions.h
+#include asm/system.h
+
+void trap_init(void)
+{
+ initialize_exception_handlers();
+ __enable_hw_exceptions();
+}
+
+void __bad_xchg(volatile void *ptr, int size)
+{
+ printk(KERN_INFO xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n,
+ __builtin_return_address(0), ptr, size);
+ BUG();
+}
+EXPORT_SYMBOL(__bad_xchg);
+
+static int kstack_depth_to_print = 24;
+
+void show_trace(struct task_struct *task, unsigned long *stack)
+{
+ unsigned long addr;
+
+ if (!stack)
+ stack = (unsigned long *)stack;
+
+ printk(KERN_INFO Call Trace: );
+#ifdef CONFIG_KALLSYMS
+ printk(KERN_INFO \n);
+#endif
+ while (!kstack_end(stack)) {
+ addr = *stack++;
+ if (__kernel_text_address(addr)) {
+ printk(KERN_INFO [%08lx] , addr);
+ print_symbol(%s\n, addr);
+ }
+ }
+ printk(KERN_INFO \n);
+}
+
+void show_stack(struct task_struct *task, unsigned long *sp)
+{
+ unsigned long *stack;
+ int i;
+
+ if (sp == NULL) {
+ if (task)
+ sp = (unsigned long *) ((struct thread_info *)
+ (task-stack))-cpu_context.r1;
+ else
+ sp = (unsigned long *)sp;
+ }
+
+ stack = sp;
+
+ printk(KERN_INFO \nStack:\n );
+
+ for (i = 0; i kstack_depth_to_print; i++) {
+ if (kstack_end(sp))
+ break;
+ if (i ((i % 8) == 0))
+ printk(\n );
+ printk(%08lx , *sp++);
+ }
+ printk(\n);
+ show_trace(task, stack);
+}
+
+void dump_stack(void)
+{
+ show_stack(NULL, NULL);
+}
+EXPORT_SYMBOL(dump_stack);
--
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[PATCH 28/60] microblaze_v4: ptrace support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/ptrace.c | 206 +++
include/asm-microblaze/ptrace.h | 68 +
2 files changed, 274 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/ptrace.c
create mode 100644 include/asm-microblaze/ptrace.h
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
new file mode 100644
index 000..834d463
--- /dev/null
+++ b/arch/microblaze/kernel/ptrace.c
@@ -0,0 +1,206 @@
+/*
+ * `ptrace' system call
+ *
+ * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ * Copyright (C) 2004-07 John Williams [EMAIL PROTECTED]
+ *
+ * derived from arch/v850/kernel/ptrace.c
+ *
+ * Copyright (C) 2002,03 NEC Electronics Corporation
+ * Copyright (C) 2002,03 Miles Bader [EMAIL PROTECTED]
+ *
+ * Derived from arch/mips/kernel/ptrace.c:
+ *
+ * Copyright (C) 1992 Ross Biro
+ * Copyright (C) Linus Torvalds
+ * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
+ * Copyright (C) 1996 David S. Miller
+ * Kevin D. Kissell, [EMAIL PROTECTED] and Carsten Langgaard, [EMAIL PROTECTED]
+ * Copyright (C) 1999 MIPS Technologies, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#include linux/kernel.h
+#include linux/mm.h
+#include linux/sched.h
+#include linux/smp_lock.h
+#include linux/ptrace.h
+#include linux/signal.h
+
+#include asm/errno.h
+#include asm/ptrace.h
+#include asm/processor.h
+#include asm/uaccess.h
+#include asm/asm-offsets.h
+
+/* Returns the address where the register at REG_OFFS in P is stashed away. */
+static microblaze_reg_t *reg_save_addr(unsigned reg_offs,
+ struct task_struct *t)
+{
+ struct pt_regs *regs;
+
+ /*
+* Three basic cases:
+*
+* (1) A register normally saved before calling the scheduler, is
+* available in the kernel entry pt_regs structure at the top
+* of the kernel stack. The kernel trap/irq exit path takes
+* care to save/restore almost all registers for ptrace'd
+* processes.
+*
+* (2) A call-clobbered register, where the process P entered the
+* kernel via [syscall] trap, is not stored anywhere; that's
+* OK, because such registers are not expected to be preserved
+* when the trap returns anyway (so we don't actually bother to
+* test for this case).
+*
+* (3) A few registers not used at all by the kernel, and so
+* normally never saved except by context-switches, are in the
+* context switch state.
+*/
+
+ /* Register saved during kernel entry (or not available). */
+ regs = task_pt_regs(t);
+
+ return (microblaze_reg_t *)((char *)regs + reg_offs);
+}
+
+long arch_ptrace(struct task_struct *child, long request, long addr, long data)
+{
+ int rval;
+
+ switch (request) {
+ unsigned long val, copied;
+
+ case PTRACE_PEEKTEXT: /* read word at location addr. */
+ case PTRACE_PEEKDATA:
+ pr_debug(PEEKTEXT/PEEKDATA at %08lX\n, addr);
+ copied = access_process_vm(child, addr, val, sizeof(val), 0);
+ rval = -EIO;
+ if (copied != sizeof(val))
+ break;
+ rval = put_user(val, (unsigned long *)data);
+ goto out;
+
+ case PTRACE_POKETEXT: /* write the word at location addr. */
+ case PTRACE_POKEDATA:
+ pr_debug(POKETEXT/POKEDATA to %08lX\n, addr);
+ rval = 0;
+ if (access_process_vm(child, addr, data, sizeof(data), 1)
+ == sizeof(data))
+ break;
+ rval = -EIO;
+ goto out;
+
+ /* Read/write the word at location ADDR in the registers. */
+ case PTRACE_PEEKUSR:
+ case PTRACE_POKEUSR:
+ pr_debug(PEEKUSR/POKEUSR : 0x%08lx\n, addr);
+ rval = 0;
+ if (addr = PT_SIZE request == PTRACE_PEEKUSR) {
+ /* Special requests that don't actually correspond
+to offsets in struct pt_regs. */
+ if (addr == PT_TEXT_ADDR) {
+ val = child-mm-start_code;
+ } else if (addr == PT_DATA_ADDR) {
+ val = child-mm-start_data;
+ } else if (addr == PT_TEXT_LEN) {
+ val = child-mm-end_code
+ - child-mm-start_code;
+ } else {
+ rval = -EIO;
+ }
+ } else if (addr
[PATCH 36/60] microblaze_v4: ioctl support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/ioctl.h |1 +
include/asm-microblaze/ioctls.h | 91 +++
2 files changed, 92 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/ioctl.h
create mode 100644 include/asm-microblaze/ioctls.h
diff --git a/include/asm-microblaze/ioctl.h b/include/asm-microblaze/ioctl.h
new file mode 100644
index 000..b279fe0
--- /dev/null
+++ b/include/asm-microblaze/ioctl.h
@@ -0,0 +1 @@
+#include asm-generic/ioctl.h
diff --git a/include/asm-microblaze/ioctls.h b/include/asm-microblaze/ioctls.h
new file mode 100644
index 000..76c963f
--- /dev/null
+++ b/include/asm-microblaze/ioctls.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_IOCTLS_H
+#define _ASM_MICROBLAZE_IOCTLS_H
+
+#include asm/ioctl.h
+
+/* 0x54 is just a magic number to make these relatively unique ('T') */
+
+#define TCGETS 0x5401
+#define TCSETS 0x5402
+#define TCSETSW0x5403
+#define TCSETSF0x5404
+#define TCGETA 0x5405
+#define TCSETA 0x5406
+#define TCSETAW0x5407
+#define TCSETAF0x5408
+#define TCSBRK 0x5409
+#define TCXONC 0x540A
+#define TCFLSH 0x540B
+#define TIOCEXCL 0x540C
+#define TIOCNXCL 0x540D
+#define TIOCSCTTY 0x540E
+#define TIOCGPGRP 0x540F
+#define TIOCSPGRP 0x5410
+#define TIOCOUTQ 0x5411
+#define TIOCSTI0x5412
+#define TIOCGWINSZ 0x5413
+#define TIOCSWINSZ 0x5414
+#define TIOCMGET 0x5415
+#define TIOCMBIS 0x5416
+#define TIOCMBIC 0x5417
+#define TIOCMSET 0x5418
+#define TIOCGSOFTCAR 0x5419
+#define TIOCSSOFTCAR 0x541A
+#define FIONREAD 0x541B
+#define TIOCINQFIONREAD
+#define TIOCLINUX 0x541C
+#define TIOCCONS 0x541D
+#define TIOCGSERIAL0x541E
+#define TIOCSSERIAL0x541F
+#define TIOCPKT0x5420
+#define FIONBIO0x5421
+#define TIOCNOTTY 0x5422
+#define TIOCSETD 0x5423
+#define TIOCGETD 0x5424
+#define TCSBRKP0x5425 /* Needed for POSIX tcsendbreak() */
+#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
+#define TIOCSBRK 0x5427 /* BSD compatibility */
+#define TIOCCBRK 0x5428 /* BSD compatibility */
+#define TIOCGSID 0x5429 /* Return the session ID of FD */
+/* Get Pty Number (of pty-mux device) */
+#define TIOCGPTN _IOR('T', 0x30, unsigned int)
+#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
+
+#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
+#define FIOCLEX0x5451
+#define FIOASYNC 0x5452
+#define TIOCSERCONFIG 0x5453
+#define TIOCSERGWILD 0x5454
+#define TIOCSERSWILD 0x5455
+#define TIOCGLCKTRMIOS 0x5456
+#define TIOCSLCKTRMIOS 0x5457
+#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
+#define TIOCSERGETLSR 0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+
+#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT0x545D /* read serial port inline interrupt counts */
+
+#defineFIOQSIZE0x545E
+
+/* Used for packet mode */
+#define TIOCPKT_DATA 0
+#define TIOCPKT_FLUSHREAD 1
+#define TIOCPKT_FLUSHWRITE 2
+#define TIOCPKT_STOP 4
+#define TIOCPKT_START 8
+#define TIOCPKT_NOSTOP 16
+#define TIOCPKT_DOSTOP 32
+
+#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
+
+#endif /* _ASM_MICROBLAZE_IOCTLS_H */
--
1.5.4.GIT
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[PATCH 35/60] microblaze_v4: definitions of types
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/posix_types.h | 69 ++
include/asm-microblaze/types.h | 62 ++
2 files changed, 131 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/posix_types.h
create mode 100644 include/asm-microblaze/types.h
diff --git a/include/asm-microblaze/posix_types.h
b/include/asm-microblaze/posix_types.h
new file mode 100644
index 000..4e6412d
--- /dev/null
+++ b/include/asm-microblaze/posix_types.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_POSIX_TYPES_H
+#define _ASM_MICROBLAZE_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long __kernel_ino_t;
+typedef unsigned int __kernel_mode_t;
+typedef unsigned int __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int__kernel_pid_t;
+typedef unsigned int __kernel_ipc_pid_t;
+typedef unsigned int __kernel_uid_t;
+typedef unsigned int __kernel_gid_t;
+typedef unsigned int __kernel_size_t;
+typedef int__kernel_ssize_t;
+typedef int__kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int__kernel_timer_t;
+typedef int__kernel_clockid_t;
+typedef int__kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ 2)
+
+#undef __FD_SET
+#define__FD_SET(d, set)((set)-fds_bits[__FDELT(d)] |=
__FDMASK(d))
+
+#undef __FD_CLR
+#define__FD_CLR(d, set)((set)-fds_bits[__FDELT(d)] =
~__FDMASK(d))
+
+#undef __FD_ISSET
+#define__FD_ISSET(d, set) (!!((set)-fds_bits[__FDELT(d)]
__FDMASK(d)))
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ 2) */
+
+#endif /* _ASM_MICROBLAZE_POSIX_TYPES_H */
diff --git a/include/asm-microblaze/types.h b/include/asm-microblaze/types.h
new file mode 100644
index 000..449ab8d
--- /dev/null
+++ b/include/asm-microblaze/types.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_TYPES_H
+#define _ASM_MICROBLAZE_TYPES_H
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef __signed__ char s8;
+typedef unsigned char u8;
+
+typedef __signed__ short s16;
+typedef unsigned short u16;
+
+typedef __signed__ int s32;
+typedef unsigned int u32;
+
+typedef __signed__ long long s64;
+typedef unsigned long long u64;
+
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide. */
+
+typedef u32 dma_addr_t;
+
+#endif/* __KERNEL__ */
+#endif
+
+#endif /* _ASM_MICROBLAZE_TYPES_H */
--
1.5.4.GIT
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[PATCH 43/60] microblaze_v4: system.h pvr.h processor.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/processor.h | 87
include/asm-microblaze/pvr.h | 183 ++
include/asm-microblaze/system.h| 190
3 files changed, 460 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/processor.h
create mode 100644 include/asm-microblaze/pvr.h
create mode 100644 include/asm-microblaze/system.h
diff --git a/include/asm-microblaze/processor.h
b/include/asm-microblaze/processor.h
new file mode 100644
index 000..b88419c
--- /dev/null
+++ b/include/asm-microblaze/processor.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_PROCESSOR_H
+#define _ASM_MICROBLAZE_PROCESSOR_H
+
+#include asm/ptrace.h
+#include asm/setup.h
+
+/*
+ * User space process size: memory size
+ *
+ * TASK_SIZE on MMU cpu is usually 1GB. However, on no-MMU arch, both
+ * user processes and the kernel is on the same memory region. They
+ * both share the memory space and that is limited by the amount of
+ * physical memory. thus, we set TASK_SIZE == amount of total memory.
+ */
+
+#define TASK_SIZE (0x8100 - 0x8000)
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer (program counter).
+ */
+#define current_text_addr() ({ __label__ _l; _l: _l; })
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's. We won't be using it
+ */
+#define TASK_UNMAPPED_BASE 0
+
+struct task_struct;
+
+/* thread_struct is gone. use thread_info instead. */
+struct thread_struct { };
+#define INIT_THREAD{ }
+
+/* Do necessary setup to start up a newly executed thread. */
+static inline void start_thread(struct pt_regs *regs,
+ unsigned long pc,
+ unsigned long usp)
+{
+ regs-pc = pc;
+ regs-r1 = usp;
+ regs-kernel_mode = 0;
+}
+
+/* Free all resources held by a thread. */
+static inline void release_thread(struct task_struct *dead_task)
+{
+}
+
+/* Free all resources held by a thread. */
+static inline void exit_thread(void)
+{
+}
+
+extern unsigned long thread_saved_pc(struct task_struct *t);
+
+extern unsigned long get_wchan(struct task_struct *p);
+
+/* FIXME */
+#define cpu_relax()do {} while (0)
+#define prepare_to_copy(tsk) do {} while (0)
+
+/*
+ * create a kernel thread without removing it from tasklists
+ */
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+/* #define task_thread_info(task) (task)-thread_info */
+/* #define task_stack_page(task) ((void*)((task)-thread_info)) */
+
+#define task_pt_regs(tsk) \
+ (((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1)
+
+
+#define KSTK_EIP(tsk) (0)
+#define KSTK_ESP(tsk) (0)
+
+#endif /* _ASM_MICROBLAZE_PROCESSOR_H */
diff --git a/include/asm-microblaze/pvr.h b/include/asm-microblaze/pvr.h
new file mode 100644
index 000..1c67731
--- /dev/null
+++ b/include/asm-microblaze/pvr.h
@@ -0,0 +1,183 @@
+/*
+ * Support for the MicroBlaze PVR (Processor Version Register)
+ *
+ * Copyright (C) 2007 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ */
+#ifndef _ASM_MICROBLAZE_PVR_H
+#define _ASM_MICROBLAZE_PVR_H
+
+#define PVR_MSR_BIT 0x400
+
+struct pvr_s {
+ unsigned pvr[16];
+};
+
+/* The following taken from Xilinx's standalone BSP pvr.h */
+
+/* Basic PVR mask */
+#define PVR0_PVR_FULL_MASK 0x8000
+#define PVR0_USE_BARREL_MASK 0x4000
+#define PVR0_USE_DIV_MASK 0x2000
+#define PVR0_USE_HW_MUL_MASK 0x1000
+#define PVR0_USE_FPU_MASK 0x0800
+#define PVR0_USE_EXCEPTION_MASK0x0400
+#define PVR0_USE_ICACHE_MASK 0x0200
+#define PVR0_USE_DCACHE_MASK 0x0100
+#define PVR0_VERSION_MASK 0xFF00
+#define PVR0_USER1_MASK0x00FF
+
+/* User 2 PVR mask */
+#define PVR1_USER2_MASK0x
+
+/* Configuration PVR masks */
+#define PVR2_D_OPB_MASK0x8000
+#define PVR2_D_LMB_MASK0x4000
+#define PVR2_I_OPB_MASK0x2000
+#define PVR2_I_LMB_MASK0x1000
+#define PVR2_INTERRUPT_IS_EDGE_MASK0x0800
+#define PVR2_EDGE_IS_POSITIVE_MASK 0x0400
+#define PVR2_USE_MSR_INSTR 0x0002
+#define PVR2_USE_PCMP_INSTR0x0001
[PATCH 32/60] microblaze_v4: page.h, segment.h, unaligned.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/page.h | 117
include/asm-microblaze/segment.h | 39
include/asm-microblaze/unaligned.h | 19 ++
3 files changed, 175 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/page.h
create mode 100644 include/asm-microblaze/segment.h
create mode 100644 include/asm-microblaze/unaligned.h
diff --git a/include/asm-microblaze/page.h b/include/asm-microblaze/page.h
new file mode 100644
index 000..f7ed024
--- /dev/null
+++ b/include/asm-microblaze/page.h
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_PAGE_H
+#define _ASM_MICROBLAZE_PAGE_H
+
+#include linux/autoconf.h
+#include linux/pfn.h
+
+/* PAGE_SHIFT determines the page size */
+
+#define PAGE_SHIFT (12)
+#define PAGE_SIZE (1UL PAGE_SHIFT)
+#define PAGE_MASK (~(PAGE_SIZE-1))
+
+#ifdef __KERNEL__
+
+#include asm/setup.h
+
+#ifndef __ASSEMBLY__
+
+#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
+#define free_user_page(page, addr) free_page(addr)
+
+#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
+#define copy_page(to, from)memcpy((to), (from), PAGE_SIZE)
+
+#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
+#define copy_user_page(vto, vfrom, vaddr, topg) \
+ memcpy((vto), (vfrom), PAGE_SIZE)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long ste[64]; } pmd_t;
+typedef struct { pmd_t pue[1]; } pud_t;
+typedef struct { pud_t pge[1]; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+
+#define pte_val(x) ((x).pte)
+#define pmd_val(x) ((x).ste[0])
+#define pud_val(x) ((x).pue[0])
+#define pgd_val(x) ((x).pge[0])
+#define pgprot_val(x) ((x).pgprot)
+
+#define __pte(x) ((pte_t) { (x) })
+#define __pmd(x) ((pmd_t) { (x) })
+#define __pgd(x) ((pgd_t) { (x) })
+#define __pgprot(x)((pgprot_t) { (x) })
+
+/* align addr on a size boundary - adjust address up/down if needed */
+#define _ALIGN_UP(addr, size) (((addr)+((size)-1))(~((size)-1)))
+#define _ALIGN_DOWN(addr, size)((addr)(~((size)-1)))
+
+/* align addr on a size boundary - adjust address up if needed */
+#define _ALIGN(addr, size) _ALIGN_UP(addr, size)
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) PAGE_MASK)
+
+extern unsigned int __page_offset;
+#define PAGE_OFFSET __page_offset
+
+/**
+ * Conversions for virtual address, physical address, pfn, and struct
+ * page are defined in the following files.
+ *
+ * virt -+
+ * | asm-microblaze/page.h
+ * phys -+
+ * | linux/pfn.h
+ * pfn -+
+ * | asm-generic/memory_model.h
+ * page -+
+ *
+ */
+
+extern unsigned long max_low_pfn;
+extern unsigned long min_low_pfn;
+extern unsigned long max_pfn;
+
+#define __pa(vaddr)((unsigned long) (vaddr))
+#define __va(paddr)((void *) (paddr))
+
+#define phys_to_pfn(phys) (PFN_DOWN(phys))
+#define pfn_to_phys(pfn) (PFN_PHYS(pfn))
+
+#define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr
+#define pfn_to_virt(pfn) __va(pfn_to_phys((pfn)))
+
+#define virt_to_page(vaddr)(pfn_to_page(virt_to_pfn(vaddr)))
+#define page_to_virt(page) (pfn_to_virt(page_to_pfn(page)))
+
+#define page_to_phys(page) (pfn_to_phys(page_to_pfn(page)))
+#define page_to_bus(page) (page_to_phys(page))
+#define phys_to_page(paddr)(pfn_to_page(phys_to_pfn(paddr)))
+
+#define pfn_valid(pfn) ((pfn) = min_low_pfn (pfn) max_mapnr)
+#definevirt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr)))
+
+#define ARCH_PFN_OFFSET(PAGE_OFFSET PAGE_SHIFT)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#include asm-generic/memory_model.h
+#include asm-generic/page.h
+
+#endif /* _ASM_MICROBLAZE_PAGE_H */
diff --git a/include/asm-microblaze/segment.h b/include/asm-microblaze/segment.h
new file mode 100644
index 000..670a099
--- /dev/null
+++ b/include/asm-microblaze/segment.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SEGMENT_H
+#define _ASM_MICROBLAZE_SEGMENT_H
+
+#ifndef __ASSEMBLY__
+
+typedef struct {
+ unsigned long seg;
+} mm_segment_t;
+
+/*
+ *
[PATCH 34/60] microblaze_v4: bug headers files
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/bug.h | 15 +++
include/asm-microblaze/bugs.h | 17 +
2 files changed, 32 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/bug.h
create mode 100644 include/asm-microblaze/bugs.h
diff --git a/include/asm-microblaze/bug.h b/include/asm-microblaze/bug.h
new file mode 100644
index 000..8eb2cdd
--- /dev/null
+++ b/include/asm-microblaze/bug.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_BUG_H
+#define _ASM_MICROBLAZE_BUG_H
+
+#include linux/kernel.h
+#include asm-generic/bug.h
+
+#endif /* _ASM_MICROBLAZE_BUG_H */
diff --git a/include/asm-microblaze/bugs.h b/include/asm-microblaze/bugs.h
new file mode 100644
index 000..f2c6593
--- /dev/null
+++ b/include/asm-microblaze/bugs.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_BUGS_H
+#define _ASM_MICROBLAZE_BUGS_H
+
+static inline void check_bugs(void)
+{
+ /* nothing to do */
+}
+
+#endif /* _ASM_MICROBLAZE_BUGS_H */
--
1.5.4.GIT
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[PATCH 41/60] microblaze_v4: atomic.h bitops.h byteorder.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/atomic.h| 106
include/asm-microblaze/bitops.h| 27 +
include/asm-microblaze/byteorder.h | 21 +++
3 files changed, 154 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/atomic.h
create mode 100644 include/asm-microblaze/bitops.h
create mode 100644 include/asm-microblaze/byteorder.h
diff --git a/include/asm-microblaze/atomic.h b/include/asm-microblaze/atomic.h
new file mode 100644
index 000..754688a
--- /dev/null
+++ b/include/asm-microblaze/atomic.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_ATOMIC_H
+#define _ASM_MICROBLAZE_ATOMIC_H
+
+#include linux/compiler.h /* likely */
+#include asm/system.h /* local_irq_XXX and friends */
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i) { (i) }
+#define atomic_read(v) ((v)-counter)
+#define atomic_set(v, i) (((v)-counter) = (i))
+
+#define atomic_inc(v) (atomic_add_return(1, (v)))
+#define atomic_dec(v) (atomic_sub_return(1, (v)))
+
+#define atomic_add(i, v) (atomic_add_return(i, (v)))
+#define atomic_sub(i, v) (atomic_sub_return(i, (v)))
+
+#define atomic_inc_return(v) (atomic_add_return(1, (v)))
+#define atomic_dec_return(v) (atomic_sub_return(1, (v)))
+
+#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
+
+#define atomic_inc_not_zero(v) (atomic_add_unless((v), 1, 0))
+
+#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
+
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+ int ret;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ ret = v-counter;
+ if (likely(ret == old))
+ v-counter = new;
+ local_irq_restore(flags);
+
+ return ret;
+}
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+ int c, old;
+
+ c = atomic_read(v);
+ while (c != u (old = atomic_cmpxchg((v), c, c + a)) != c)
+ c = old;
+ return c != u;
+}
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ *addr = ~mask;
+ local_irq_restore(flags);
+}
+
+/**
+ * atomic_add_return - add and return
+ * @i: integer value to add
+ * @v: pointer of type atomic_t
+ *
+ * Atomically adds @i to @v and returns @i + @v
+ */
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+ unsigned long flags;
+ int val;
+
+ local_irq_save(flags);
+ val = v-counter;
+ v-counter = val += i;
+ local_irq_restore(flags);
+
+ return val;
+}
+
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+ return atomic_add_return(-i, v);
+}
+
+#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) 0)
+#define atomic_xchg(v, new) (xchg(((v)-counter), new))
+
+/* Atomic operations are already serializing */
+#define smp_mb__before_atomic_dec()barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc()barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+#include asm-generic/atomic.h
+
+#endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/include/asm-microblaze/bitops.h b/include/asm-microblaze/bitops.h
new file mode 100644
index 000..98ffb61
--- /dev/null
+++ b/include/asm-microblaze/bitops.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_BITOPS_H
+#define _ASM_MICROBLAZE_BITOPS_H
+
+/*
+ * Copyright 1992, Linus Torvalds.
+ */
+
+#include linux/autoconf.h
+#include asm/byteorder.h /* swab32 */
+#include asm/system.h /* save_flags */
+
+/*
+ * clear_bit() doesn't provide any barrier for the compiler.
+ */
+#define smp_mb__before_clear_bit() barrier()
+#define smp_mb__after_clear_bit() barrier()
+#include asm-generic/bitops.h
+
+#endif /* _ASM_MICROBLAZE_BITOPS_H */
diff --git a/include/asm-microblaze/byteorder.h
b/include/asm-microblaze/byteorder.h
new file mode 100644
index 000..dad9204
--- /dev/null
+++ b/include/asm-microblaze/byteorder.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_BYTEORDER_H
+#define
[PATCH 44/60] microblaze_v4: clinkage.h linkage.h sections.h kmap_types.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/clinkage.h | 27 +++
include/asm-microblaze/kmap_types.h | 29 +
include/asm-microblaze/linkage.h| 15 +++
include/asm-microblaze/sections.h | 21 +
4 files changed, 92 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/clinkage.h
create mode 100644 include/asm-microblaze/kmap_types.h
create mode 100644 include/asm-microblaze/linkage.h
create mode 100644 include/asm-microblaze/sections.h
diff --git a/include/asm-microblaze/clinkage.h
b/include/asm-microblaze/clinkage.h
new file mode 100644
index 000..a2e09bd
--- /dev/null
+++ b/include/asm-microblaze/clinkage.h
@@ -0,0 +1,27 @@
+/*
+ * Macros to reflect C symbol-naming conventions
+ *
+ * Copyright (C) 2003 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2001,2002 NEC Corporatione
+ * Copyright (C) 2001,2002 Miles Bader [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader [EMAIL PROTECTED]
+ * Microblaze port by John Williams
+ */
+
+#ifndef _ASM_MICROBLAZE_CLINKAGE_H
+#define _ASM_MICROBLAZE_CLINKAGE_H
+
+#define __ASSEMBLY__
+
+#include linux/linkage.h
+
+#define C_SYMBOL_NAME(name)name
+#define C_ENTRY(name) .globl name; .align 4; name
+#define C_END(name)
+
+#endif /* _ASM_MICROBLAZE_CLINKAGE_H */
diff --git a/include/asm-microblaze/kmap_types.h
b/include/asm-microblaze/kmap_types.h
new file mode 100644
index 000..4d7e222
--- /dev/null
+++ b/include/asm-microblaze/kmap_types.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_KMAP_TYPES_H
+#define _ASM_MICROBLAZE_KMAP_TYPES_H
+
+enum km_type {
+ KM_BOUNCE_READ,
+ KM_SKB_SUNRPC_DATA,
+ KM_SKB_DATA_SOFTIRQ,
+ KM_USER0,
+ KM_USER1,
+ KM_BIO_SRC_IRQ,
+ KM_BIO_DST_IRQ,
+ KM_PTE0,
+ KM_PTE1,
+ KM_IRQ0,
+ KM_IRQ1,
+ KM_SOFTIRQ0,
+ KM_SOFTIRQ1,
+ KM_TYPE_NR,
+};
+
+#endif /* _ASM_MICROBLAZE_KMAP_TYPES_H */
diff --git a/include/asm-microblaze/linkage.h b/include/asm-microblaze/linkage.h
new file mode 100644
index 000..3a8e36d
--- /dev/null
+++ b/include/asm-microblaze/linkage.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_LINKAGE_H
+#define _ASM_MICROBLAZE_LINKAGE_H
+
+#define __ALIGN.align 4
+#define __ALIGN_STR.align 4
+
+#endif /* _ASM_MICROBLAZE_LINKAGE_H */
diff --git a/include/asm-microblaze/sections.h
b/include/asm-microblaze/sections.h
new file mode 100644
index 000..d0c12fd
--- /dev/null
+++ b/include/asm-microblaze/sections.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SECTIONS_H
+#define _ASM_MICROBLAZE_SECTIONS_H
+
+#include asm-generic/sections.h
+
+extern char _ssbss[], _esbss[];
+extern unsigned long __ivt_start[], __ivt_end[];
+
+#ifdef CONFIG_MTD_UCLINUX
+extern char *_ebss;
+#endif
+
+#endif /* _ASM_MICROBLAZE_SECTIONS_H */
--
1.5.4.GIT
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[PATCH 40/60] microblaze_v4: headers for irq
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/hardirq.h | 29 +
include/asm-microblaze/irq_regs.h |1 +
2 files changed, 30 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/hardirq.h
create mode 100644 include/asm-microblaze/hw_irq.h
create mode 100644 include/asm-microblaze/irq_regs.h
diff --git a/include/asm-microblaze/hardirq.h b/include/asm-microblaze/hardirq.h
new file mode 100644
index 000..2aca035
--- /dev/null
+++ b/include/asm-microblaze/hardirq.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_HARDIRQ_H
+#define _ASM_MICROBLAZE_HARDIRQ_H
+
+#include linux/cache.h
+#include linux/irq.h
+#include asm/irq.h
+#include asm/current.h
+#include asm/ptrace.h
+
+/* should be defined in each interrupt controller driver */
+extern unsigned int get_irq(struct pt_regs *regs);
+
+typedef struct {
+ unsigned int __softirq_pending;
+} cacheline_aligned irq_cpustat_t;
+
+void ack_bad_irq(unsigned int irq);
+
+#include linux/irq_cpustat.h /* Standard mappings for irq_cpustat_t above */
+
+#endif /* _ASM_MICROBLAZE_HARDIRQ_H */
diff --git a/include/asm-microblaze/hw_irq.h b/include/asm-microblaze/hw_irq.h
new file mode 100644
index 000..e69de29
diff --git a/include/asm-microblaze/irq_regs.h
b/include/asm-microblaze/irq_regs.h
new file mode 100644
index 000..3dd9c0b
--- /dev/null
+++ b/include/asm-microblaze/irq_regs.h
@@ -0,0 +1 @@
+#include asm-generic/irq_regs.h
--
1.5.4.GIT
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[PATCH 47/60] microblaze_v4: sigcontext.h siginfo.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/sigcontext.h | 19 +++
include/asm-microblaze/siginfo.h| 15 +++
2 files changed, 34 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/sigcontext.h
create mode 100644 include/asm-microblaze/siginfo.h
diff --git a/include/asm-microblaze/sigcontext.h
b/include/asm-microblaze/sigcontext.h
new file mode 100644
index 000..2819672
--- /dev/null
+++ b/include/asm-microblaze/sigcontext.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SIGCONTEXT_H
+#define _ASM_MICROBLAZE_SIGCONTEXT_H
+
+#include asm/ptrace.h
+
+struct sigcontext {
+ struct pt_regs regs;
+ unsigned long oldmask;
+};
+
+#endif /* _ASM_MICROBLAZE_SIGCONTEXT_H */
diff --git a/include/asm-microblaze/siginfo.h b/include/asm-microblaze/siginfo.h
new file mode 100644
index 000..f162911
--- /dev/null
+++ b/include/asm-microblaze/siginfo.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SIGINFO_H
+#define _ASM_MICROBLAZE_SIGINFO_H
+
+#include linux/types.h
+#include asm-generic/siginfo.h
+
+#endif /* _ASM_MICROBLAZE_SIGINFO_H */
--
1.5.4.GIT
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[PATCH 52/60] microblaze_v4: fcntl.h sockios.h ucontext.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-generic/sockios.h | 23 +++
include/asm-generic/ucontext.h| 24
include/asm-microblaze/fcntl.h|1 +
include/asm-microblaze/sockios.h | 23 +++
include/asm-microblaze/ucontext.h |1 +
5 files changed, 72 insertions(+), 0 deletions(-)
create mode 100644 include/asm-generic/sockios.h
create mode 100644 include/asm-generic/ucontext.h
create mode 100644 include/asm-microblaze/fcntl.h
create mode 100644 include/asm-microblaze/sockios.h
create mode 100644 include/asm-microblaze/ucontext.h
diff --git a/include/asm-generic/sockios.h b/include/asm-generic/sockios.h
new file mode 100644
index 000..9dc86e6
--- /dev/null
+++ b/include/asm-generic/sockios.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_GENERIC_SOCKIOS_H
+#define _ASM_GENERIC_SOCKIOS_H
+
+#include asm-generic/ioctl.h
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN 0x8901
+#define SIOCSPGRP 0x8902
+#define FIOGETOWN 0x8903
+#define SIOCGPGRP 0x8904
+#define SIOCATMARK 0x8905
+#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
+#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
+
+#endif /* _ASM_GENERIC_SOCKIOS_H */
diff --git a/include/asm-generic/ucontext.h b/include/asm-generic/ucontext.h
new file mode 100644
index 000..3e718c2
--- /dev/null
+++ b/include/asm-generic/ucontext.h
@@ -0,0 +1,24 @@
+/*
+ * include/asm-generic/ucontext.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#ifndef _ASM_GENERIC_UCONTEXT_H
+#define _ASM_GENERIC_UCONTEXT_H
+
+#include asm/sigcontext.h
+
+struct ucontext {
+ unsigned long uc_flags;
+ struct ucontext *uc_link;
+ stack_t uc_stack;
+ struct sigcontext uc_mcontext;
+ sigset_tuc_sigmask; /* mask last for extensibility */
+};
+
+#endif /* _ASM_GENERIC_UCONTEXT_H */
diff --git a/include/asm-microblaze/fcntl.h b/include/asm-microblaze/fcntl.h
new file mode 100644
index 000..46ab12d
--- /dev/null
+++ b/include/asm-microblaze/fcntl.h
@@ -0,0 +1 @@
+#include asm-generic/fcntl.h
diff --git a/include/asm-microblaze/sockios.h b/include/asm-microblaze/sockios.h
new file mode 100644
index 000..41d1a0c
--- /dev/null
+++ b/include/asm-microblaze/sockios.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SOCKIOS_H
+#define _ASM_MICROBLAZE_SOCKIOS_H
+
+#include asm/ioctl.h
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN 0x8901
+#define SIOCSPGRP 0x8902
+#define FIOGETOWN 0x8903
+#define SIOCGPGRP 0x8904
+#define SIOCATMARK 0x8905
+#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
+#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
+
+#endif /* _ASM_MICROBLAZE_SOCKIOS_H */
diff --git a/include/asm-microblaze/ucontext.h
b/include/asm-microblaze/ucontext.h
new file mode 100644
index 000..9bc07b9
--- /dev/null
+++ b/include/asm-microblaze/ucontext.h
@@ -0,0 +1 @@
+#include asm-generic/ucontext.h
--
1.5.4.GIT
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[PATCH 39/60] microblaze_v4: dma support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/dma-mapping.h |1 +
include/asm-microblaze/dma.h | 18 ++
include/asm-microblaze/scatterlist.h | 26 ++
3 files changed, 45 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/dma-mapping.h
create mode 100644 include/asm-microblaze/dma.h
create mode 100644 include/asm-microblaze/scatterlist.h
diff --git a/include/asm-microblaze/dma-mapping.h
b/include/asm-microblaze/dma-mapping.h
new file mode 100644
index 000..e7e1690
--- /dev/null
+++ b/include/asm-microblaze/dma-mapping.h
@@ -0,0 +1 @@
+#include asm-generic/dma-mapping.h
diff --git a/include/asm-microblaze/dma.h b/include/asm-microblaze/dma.h
new file mode 100644
index 000..6ab357b
--- /dev/null
+++ b/include/asm-microblaze/dma.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_DMA_H
+#define _ASM_MICROBLAZE_DMA_H
+
+/* we don't have dma address limit. define it as zero to be
+ * unlimited. */
+#define MAX_DMA_ADDRESS(0)
+
+#define ISA_DMA_THRESHOLD (0)
+
+#endif /* _ASM_MICROBLAZE_DMA_H */
diff --git a/include/asm-microblaze/scatterlist.h
b/include/asm-microblaze/scatterlist.h
new file mode 100644
index 000..bbe73e6
--- /dev/null
+++ b/include/asm-microblaze/scatterlist.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SCATTERLIST_H
+#define _ASM_MICROBLAZE_SCATTERLIST_H
+
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+ unsigned long sg_magic;
+#endif
+ unsigned long page_link;
+ dma_addr_t dma_address;
+ unsigned intoffset;
+ unsigned intlength;
+};
+
+#define sg_dma_address(sg) ((sg)-dma_address)
+#define sg_dma_len(sg) ((sg)-length)
+
+#endif /* _ASM_MICROBLAZE_SCATTERLIST_H */
--
1.5.4.GIT
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[PATCH 37/60] microblaze_v4: io.h IO operations
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/io.h | 208 +++
1 files changed, 208 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/io.h
diff --git a/include/asm-microblaze/io.h b/include/asm-microblaze/io.h
new file mode 100644
index 000..cb0a178
--- /dev/null
+++ b/include/asm-microblaze/io.h
@@ -0,0 +1,208 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_IO_H
+#define _ASM_MICROBLAZE_IO_H
+
+#include asm/byteorder.h
+#include asm/page.h
+
+static inline unsigned char __raw_readb(const volatile void *addr)
+{
+ return *(volatile unsigned char __force *)addr;
+}
+static inline unsigned short __raw_readw(const volatile void *addr)
+{
+ return *(volatile unsigned short __force *)addr;
+}
+static inline unsigned int __raw_readl(const volatile void *addr)
+{
+ return *(volatile unsigned int __force *)addr;
+}
+static inline unsigned long __raw_readq(const volatile void *addr)
+{
+ return *(volatile unsigned long __force *)addr;
+}
+static inline void __raw_writeb(unsigned char v, volatile void *addr)
+{
+ *(volatile unsigned char __force *)addr = v;
+}
+static inline void __raw_writew(unsigned short v, volatile void *addr)
+{
+ *(volatile unsigned short __force *)addr = v;
+}
+static inline void __raw_writel(unsigned int v, volatile void *addr)
+{
+ *(volatile unsigned int __force *)addr = v;
+}
+static inline void __raw_writeq(unsigned long v, volatile void *addr)
+{
+ *(volatile unsigned long __force *)addr = v;
+}
+
+/*
+ * read (readb, readw, readl, readq) and write (writeb, writew,
+ * writel, writeq) accessors are for PCI and thus littel endian.
+ * Linux 2.4 for Microblaze had this wrong.
+ */
+static inline unsigned char readb(const volatile void *addr)
+{
+ return *(volatile unsigned char __force *)addr;
+}
+static inline unsigned short readw(const volatile void *addr)
+{
+ return le16_to_cpu(*(volatile unsigned short __force *)addr);
+}
+static inline unsigned int readl(const volatile void *addr)
+{
+ return le32_to_cpu(*(volatile unsigned int __force *)addr);
+}
+static inline void writeb(unsigned char v, volatile void *addr)
+{
+ *(volatile unsigned char __force *)addr = v;
+}
+static inline void writew(unsigned short v, volatile void *addr)
+{
+ *(volatile unsigned short __force *)addr = cpu_to_le16(v);
+}
+static inline void writel(unsigned int v, volatile void __iomem *addr)
+{
+ *(volatile unsigned int __force *)addr = cpu_to_le32(v);
+}
+
+/* ioread and iowrite variants. thease are for now same as __raw_
+ * variants of accessors. we might check for endianess in the feature
+ */
+#define ioread8(addr) __raw_readb((u8 *)(addr))
+#define ioread16(addr) __raw_readw((u16 *)(addr))
+#define ioread32(addr) __raw_readl((u32 *)(addr))
+#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))
+#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
+#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
+
+/* These are the definitions for the x86 IO instructions
+ * inb/inw/inl/outb/outw/outl, the string versions
+ * insb/insw/insl/outsb/outsw/outsl, and the pausing versions
+ * inb_p/inw_p/...
+ * The macros don't do byte-swapping.
+ */
+#define inb(port) readb((u8 *)((port)))
+#define outb(val, port)writeb((val), (u8 *)((unsigned
long)(port)))
+#define inw(port) readw((u16 *)((port)))
+#define outw(val, port)writew((val), (u16 *)((unsigned
long)(port)))
+#define inl(port) readl((u32 *)((port)))
+#define outl(val, port)writel((val), (u32 *)((unsigned
long)(port)))
+
+#define inb_p(port)inb((port))
+#define outb_p(val, port) outb((val), (port))
+#define inw_p(port)inw((port))
+#define outw_p(val, port) outw((val), (port))
+#define inl_p(port)inl((port))
+#define outl_p(val, port) outl((val), (port))
+
+#define memset_io(a, b, c) memset((void *)(a), (b), (c))
+#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
+#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
+
+/**
+ * virt_to_phys- map virtual addresses to physical
+ * @address: address to remap
+ *
+ * The returned physical address is the physical (CPU) mapping for
+ * the memory address given. It is only valid to use this function on
+ * addresses directly mapped or allocated via kmalloc.
+ *
+ * This function does not give bus mappings for DMA transfers. In
+ * almost all conceivable cases a device driver should not be using
+ * this function
+ */
+static
[PATCH 42/60] microblaze_v4: headers pgalloc.h pgtable.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/pgalloc.h | 14 +++
include/asm-microblaze/pgtable.h | 48 ++
2 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/pgalloc.h
create mode 100644 include/asm-microblaze/pgtable.h
diff --git a/include/asm-microblaze/pgalloc.h b/include/asm-microblaze/pgalloc.h
new file mode 100644
index 000..2a4b354
--- /dev/null
+++ b/include/asm-microblaze/pgalloc.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_PGALLOC_H
+#define _ASM_MICROBLAZE_PGALLOC_H
+
+#define check_pgt_cache() do {} while (0)
+
+#endif /* _ASM_MICROBLAZE_PGALLOC_H */
diff --git a/include/asm-microblaze/pgtable.h b/include/asm-microblaze/pgtable.h
new file mode 100644
index 000..0354908
--- /dev/null
+++ b/include/asm-microblaze/pgtable.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_PGTABLE_H
+#define _ASM_MICROBLAZE_PGTABLE_H
+
+#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
+#define pgd_none(pgd) (0)
+#define pgd_bad(pgd) (0)
+#define pgd_clear(pgdp)
+#define kern_addr_valid(addr) (1)
+#definepmd_offset(a, b)((void *) 0)
+
+#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
+#define PAGE_SHARED__pgprot(0) /* these mean nothing to NO_MM */
+#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
+#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
+#define PAGE_KERNEL__pgprot(0) /* these mean nothing to NO_MM */
+
+#define __swp_type(x) (0)
+#define __swp_offset(x)(0)
+#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) 7)) })
+#define __pte_to_swp_entry(pte)((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
+
+#ifndef __ASSEMBLY__
+static inline int pte_file(pte_t pte) { return 0; }
+#endif
+
+#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
+
+#define swapper_pg_dir ((pgd_t *) NULL)
+
+#define pgtable_cache_init() do {} while (0)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)\
+ remap_pfn_range(vma, vaddr, pfn, size, prot)
+
+#define arch_enter_lazy_cpu_mode() do {} while (0)
+
+void paging_init(void);
+
+#endif /* _ASM_MICROBLAZE_PGTABLE_H */
--
1.5.4.GIT
___
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[PATCH 46/60] microblaze_v4: termbits.h termios.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-generic/termbits.h| 200 +
include/asm-microblaze/termbits.h |1 +
include/asm-microblaze/termios.h | 84
3 files changed, 285 insertions(+), 0 deletions(-)
create mode 100644 include/asm-generic/termbits.h
create mode 100644 include/asm-microblaze/termbits.h
create mode 100644 include/asm-microblaze/termios.h
diff --git a/include/asm-generic/termbits.h b/include/asm-generic/termbits.h
new file mode 100644
index 000..740b044
--- /dev/null
+++ b/include/asm-generic/termbits.h
@@ -0,0 +1,200 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_GENERIC_TERMBITS_H
+#define _ASM_GENERIC_TERMBITS_H
+
+#include linux/posix_types.h
+
+typedef unsigned char cc_t;
+typedef unsigned int speed_t;
+typedef unsigned int tcflag_t;
+
+#define NCCS 19
+struct termios {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_line; /* line discipline */
+ cc_t c_cc[NCCS]; /* control characters */
+};
+
+struct ktermios {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_line; /* line discipline */
+ cc_t c_cc[NCCS]; /* control characters */
+ speed_t c_ispeed; /* input speed */
+ speed_t c_ospeed; /* output speed */
+};
+
+/* c_cc characters */
+
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+/* c_iflag bits */
+
+#define IGNBRK 001
+#define BRKINT 002
+#define IGNPAR 004
+#define PARMRK 010
+#define INPCK 020
+#define ISTRIP 040
+#define INLCR 100
+#define IGNCR 200
+#define ICRNL 400
+#define IUCLC 0001000
+#define IXON 0002000
+#define IXANY 0004000
+#define IXOFF 001
+#define IMAXBEL002
+#define IUTF8 004
+
+/* c_oflag bits */
+
+#define OPOST 001
+#define OLCUC 002
+#define ONLCR 004
+#define OCRNL 010
+#define ONOCR 020
+#define ONLRET 040
+#define OFILL 100
+#define OFDEL 200
+#define NLDLY 400
+#define NL0000
+#define NL1400
+#define CRDLY 0003000
+#define CR0000
+#define CR10001000
+#define CR20002000
+#define CR30003000
+#define TABDLY 0014000
+#define TAB0 000
+#define TAB1 0004000
+#define TAB2 001
+#define TAB3 0014000
+#define XTABS 0014000
+#define BSDLY 002
+#define BS0000
+#define BS1002
+#define VTDLY 004
+#define VT0000
+#define VT1004
+#define FFDLY 010
+#define FF0000
+#define FF1010
+
+/* c_cflag bit meaning */
+
+#define CBAUD 0010017
+#define B0 000 /* hang up */
+#define B50001
+#define B75002
+#define B110 003
+#define B134 004
+#define B150 005
+#define B200 006
+#define B300 007
+#define B600 010
+#define B1200 011
+#define B1800 012
+#define B2400 013
+#define B4800 014
+#define B9600 015
+#define B19200 016
+#define B38400 017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE 060
+#define CS5000
+#define CS6020
+#define CS7040
+#define CS8060
+#define CSTOPB 100
+#define CREAD 200
+#define PARENB 400
+#define PARODD 0001000
+#define HUPCL 0002000
+#define CLOCAL 0004000
+#define CBAUDEX001
+#define B57600 0010001
+#define B1152000010002
+#define B2304000010003
+#define B4608000010004
+#define B500010005
+#define B5760000010006
+#define B9216000010007
+#define B100 0010010
+#define B1152000 0010011
+#define B150 0010012
+#define B200 0010013
+#define B250 0010014
+#define B300 0010015
+#define B350 0010016
+#define B400 0010017
+#define CIBAUD 00200360 /* input baud rate (not used) */
+#define CMSPAR 0100 /* mark or space (stick) parity */
+#define CRTSCTS0200 /* flow control */
+
+/* c_lflag bits */
+
+#define ISIG 001
+#define ICANON 002
+#define XCASE 004
+#define ECHO 010
+#define ECHOE 020
+#define ECHOK 040
+#define ECHONL 100
[PATCH 51/60] microblaze_v4: pool.h socket.h
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-generic/socket.h| 66 +++ include/asm-microblaze/poll.h |1 + include/asm-microblaze/socket.h |1 + 3 files changed, 68 insertions(+), 0 deletions(-) create mode 100644 include/asm-generic/socket.h create mode 100644 include/asm-microblaze/poll.h create mode 100644 include/asm-microblaze/socket.h diff --git a/include/asm-generic/socket.h b/include/asm-generic/socket.h new file mode 100644 index 000..3f3430e --- /dev/null +++ b/include/asm-generic/socket.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_GENERIC_SOCKET_H +#define _ASM_GENERIC_SOCKET_H + +#include asm/sockios.h + +/* For setsockoptions(2) */ +#define SOL_SOCKET 1 + +#define SO_DEBUG 1 +#define SO_REUSEADDR 2 +#define SO_TYPE3 +#define SO_ERROR 4 +#define SO_DONTROUTE 5 +#define SO_BROADCAST 6 +#define SO_SNDBUF 7 +#define SO_RCVBUF 8 +#define SO_SNDBUFFORCE 32 +#define SO_RCVBUFFORCE 33 +#define SO_KEEPALIVE 9 +#define SO_OOBINLINE 10 +#define SO_NO_CHECK11 +#define SO_PRIORITY12 +#define SO_LINGER 13 +#define SO_BSDCOMPAT 14 +/* To add :#define SO_REUSEPORT 15 */ +#define SO_PASSCRED16 +#define SO_PEERCRED17 +#define SO_RCVLOWAT18 +#define SO_SNDLOWAT19 +#define SO_RCVTIMEO20 +#define SO_SNDTIMEO21 + +/* Security levels - as per NRL IPv6 - don't actually do anything */ +#define SO_SECURITY_AUTHENTICATION 22 +#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 +#define SO_SECURITY_ENCRYPTION_NETWORK 24 + +#define SO_BINDTODEVICE25 + +/* Socket filtering */ +#define SO_ATTACH_FILTER 26 +#define SO_DETACH_FILTER 27 + +#define SO_PEERNAME28 +#define SO_TIMESTAMP 29 +#define SCM_TIMESTAMP SO_TIMESTAMP + +#define SO_ACCEPTCONN 30 + +#define SO_PEERSEC 31 +#define SO_PASSSEC 34 + +#define SO_TIMESTAMPNS 35 +#define SCM_TIMESTAMPNSSO_TIMESTAMPNS + +#define SO_MARK36 + +#endif /* _ASM_GENERIC_SOCKET_H */ diff --git a/include/asm-microblaze/poll.h b/include/asm-microblaze/poll.h new file mode 100644 index 000..c98509d --- /dev/null +++ b/include/asm-microblaze/poll.h @@ -0,0 +1 @@ +#include asm-generic/poll.h diff --git a/include/asm-microblaze/socket.h b/include/asm-microblaze/socket.h new file mode 100644 index 000..6b71384 --- /dev/null +++ b/include/asm-microblaze/socket.h @@ -0,0 +1 @@ +#include asm-generic/socket.h -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 48/60] microblaze_v4: headers simple files - empty or redirect to asm-generic
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/cputime.h |1 + include/asm-microblaze/div64.h |1 + include/asm-microblaze/emergency-restart.h |1 + include/asm-microblaze/errno.h |1 + include/asm-microblaze/futex.h |1 + include/asm-microblaze/kdebug.h|1 + include/asm-microblaze/local.h |1 + include/asm-microblaze/mutex.h |1 + include/asm-microblaze/namei.h | 22 ++ include/asm-microblaze/percpu.h|1 + include/asm-microblaze/resource.h |1 + 11 files changed, 32 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/auxvec.h create mode 100644 include/asm-microblaze/cputime.h create mode 100644 include/asm-microblaze/div64.h create mode 100644 include/asm-microblaze/emergency-restart.h create mode 100644 include/asm-microblaze/errno.h create mode 100644 include/asm-microblaze/futex.h create mode 100644 include/asm-microblaze/kdebug.h create mode 100644 include/asm-microblaze/local.h create mode 100644 include/asm-microblaze/mutex.h create mode 100644 include/asm-microblaze/namei.h create mode 100644 include/asm-microblaze/percpu.h create mode 100644 include/asm-microblaze/resource.h create mode 100644 include/asm-microblaze/user.h diff --git a/include/asm-microblaze/auxvec.h b/include/asm-microblaze/auxvec.h new file mode 100644 index 000..e69de29 diff --git a/include/asm-microblaze/cputime.h b/include/asm-microblaze/cputime.h new file mode 100644 index 000..6d68ad7 --- /dev/null +++ b/include/asm-microblaze/cputime.h @@ -0,0 +1 @@ +#include asm-generic/cputime.h diff --git a/include/asm-microblaze/div64.h b/include/asm-microblaze/div64.h new file mode 100644 index 000..6cd978c --- /dev/null +++ b/include/asm-microblaze/div64.h @@ -0,0 +1 @@ +#include asm-generic/div64.h diff --git a/include/asm-microblaze/emergency-restart.h b/include/asm-microblaze/emergency-restart.h new file mode 100644 index 000..3711bd9 --- /dev/null +++ b/include/asm-microblaze/emergency-restart.h @@ -0,0 +1 @@ +#include asm-generic/emergency-restart.h diff --git a/include/asm-microblaze/errno.h b/include/asm-microblaze/errno.h new file mode 100644 index 000..4c82b50 --- /dev/null +++ b/include/asm-microblaze/errno.h @@ -0,0 +1 @@ +#include asm-generic/errno.h diff --git a/include/asm-microblaze/futex.h b/include/asm-microblaze/futex.h new file mode 100644 index 000..0b74582 --- /dev/null +++ b/include/asm-microblaze/futex.h @@ -0,0 +1 @@ +#include asm-generic/futex.h diff --git a/include/asm-microblaze/kdebug.h b/include/asm-microblaze/kdebug.h new file mode 100644 index 000..6ece1b0 --- /dev/null +++ b/include/asm-microblaze/kdebug.h @@ -0,0 +1 @@ +#include asm-generic/kdebug.h diff --git a/include/asm-microblaze/local.h b/include/asm-microblaze/local.h new file mode 100644 index 000..c11c530 --- /dev/null +++ b/include/asm-microblaze/local.h @@ -0,0 +1 @@ +#include asm-generic/local.h diff --git a/include/asm-microblaze/mutex.h b/include/asm-microblaze/mutex.h new file mode 100644 index 000..ff6101a --- /dev/null +++ b/include/asm-microblaze/mutex.h @@ -0,0 +1 @@ +#include asm-generic/mutex-dec.h diff --git a/include/asm-microblaze/namei.h b/include/asm-microblaze/namei.h new file mode 100644 index 000..61d60b8 --- /dev/null +++ b/include/asm-microblaze/namei.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_MICROBLAZE_NAMEI_H +#define _ASM_MICROBLAZE_NAMEI_H + +#ifdef __KERNEL__ + +/* This dummy routine maybe changed to something useful + * for /usr/gnemul/ emulation stuff. + * Look at asm-sparc/namei.h for details. + */ +#define __emul_prefix() NULL + +#endif /* __KERNEL__ */ + +#endif /* _ASM_MICROBLAZE_NAMEI_H */ diff --git a/include/asm-microblaze/percpu.h b/include/asm-microblaze/percpu.h new file mode 100644 index 000..06a959d --- /dev/null +++ b/include/asm-microblaze/percpu.h @@ -0,0 +1 @@ +#include asm-generic/percpu.h diff --git a/include/asm-microblaze/resource.h b/include/asm-microblaze/resource.h new file mode 100644 index 000..04bc4db --- /dev/null +++ b/include/asm-microblaze/resource.h @@ -0,0 +1 @@ +#include asm-generic/resource.h diff --git a/include/asm-microblaze/user.h b/include/asm-microblaze/user.h new file mode 100644 index 000..e69de29 -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 49/60] microblaze_v4: headers files entry.h current.h mman.h registers.h sembuf.h
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/current.h | 23 +++ include/asm-microblaze/entry.h | 28 include/asm-microblaze/mman.h | 25 + include/asm-microblaze/registers.h | 24 include/asm-microblaze/sembuf.h| 34 ++ 5 files changed, 134 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/current.h create mode 100644 include/asm-microblaze/entry.h create mode 100644 include/asm-microblaze/mman.h create mode 100644 include/asm-microblaze/registers.h create mode 100644 include/asm-microblaze/sembuf.h diff --git a/include/asm-microblaze/current.h b/include/asm-microblaze/current.h new file mode 100644 index 000..bc5ec59 --- /dev/null +++ b/include/asm-microblaze/current.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_MICROBLAZE_CURRENT_H +#define _ASM_MICROBLAZE_CURRENT_H + +#ifndef __ASSEMBLY__ + +/* + * Dedicate r31 to keeping the current task pointer + */ +register struct task_struct *current asm(r31); + +#define get_current() current + +#endif + +#endif /* _ASM_MICROBLAZE_CURRENT_H */ diff --git a/include/asm-microblaze/entry.h b/include/asm-microblaze/entry.h new file mode 100644 index 000..e4b5079 --- /dev/null +++ b/include/asm-microblaze/entry.h @@ -0,0 +1,28 @@ +/* + * Definitions used by low-level trap handlers + * + * Copyright (C) 2007 PetaLogix + * Copyright (C) 2007 John Williams [EMAIL PROTECTED] + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + */ + +#ifndef _ASM_MICROBLAZE_ENTRY_H +#define _ASM_MICROBLAZE_ENTRY_H + +#include asm/percpu.h +#include asm/ptrace.h + +/* These are per-cpu variables required in entry.S, among other + places */ + +DECLARE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */ +DECLARE_PER_CPU(unsigned int, KM); /* Kernel/user mode */ +DECLARE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */ +DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */ +DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */ +DECLARE_PER_CPU(unsigned int, SYSCALL_SAVE); /* Saved syscall number */ + +#endif /* _ASM_MICROBLAZE_ENTRY_H */ diff --git a/include/asm-microblaze/mman.h b/include/asm-microblaze/mman.h new file mode 100644 index 000..4914b13 --- /dev/null +++ b/include/asm-microblaze/mman.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_MICROBLAZE_MMAN_H +#define _ASM_MICROBLAZE_MMAN_H + +#include asm-generic/mman.h + +#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ +#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ +#define MAP_LOCKED 0x2000 /* pages are locked */ +#define MAP_NORESERVE 0x4000 /* don't check for reservations */ +#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ +#define MAP_NONBLOCK 0x1 /* do not block on IO */ + +#define MCL_CURRENT1 /* lock all current mappings */ +#define MCL_FUTURE 2 /* lock all future mappings */ + +#endif /* _ASM_MICROBLAZE_MMAN_H */ diff --git a/include/asm-microblaze/registers.h b/include/asm-microblaze/registers.h new file mode 100644 index 000..1a98ba0 --- /dev/null +++ b/include/asm-microblaze/registers.h @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_MICROBLAZE_REGISTERS_H +#define _ASM_MICROBLAZE_REGISTERS_H + +#define MSR_BE (10) +#define MSR_IE (11) +#define MSR_C (12) +#define MSR_BIP(13) +#define MSR_FSL(14) +#define MSR_ICE(15) +#define MSR_DZ (16) +#define MSR_DCE(17) +#define MSR_EE (18) +#define MSR_EIP(19) +#define MSR_CC (131) + +#endif /* _ASM_MICROBLAZE_REGISTERS_H */ diff --git a/include/asm-microblaze/sembuf.h b/include/asm-microblaze/sembuf.h new file mode 100644 index 000..b804ed7 --- /dev/null +++ b/include/asm-microblaze/sembuf.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef
[PATCH 60/60] microblaze_v4: Enable drivers for Microblaze
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- drivers/block/Kconfig |2 +- drivers/char/Kconfig |2 +- drivers/serial/Kconfig |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 0d1d213..a92767c 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -413,7 +413,7 @@ source drivers/s390/block/Kconfig config XILINX_SYSACE tristate Xilinx SystemACE support - depends on 4xx + depends on 4xx || MICROBLAZE help Include support for the Xilinx SystemACE CompactFlash interface diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 2d854bb..981c57a 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -879,7 +879,7 @@ config DTLK config XILINX_HWICAP tristate Xilinx HWICAP Support - depends on XILINX_VIRTEX + depends on XILINX_VIRTEX || MICROBLAZE help This option enables support for Xilinx Internal Configuration Access Port (ICAP) driver. The ICAP is used on Xilinx Virtex diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9bc4276..984ba34 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -776,7 +776,7 @@ config SERIAL_IMX_CONSOLE config SERIAL_UARTLITE tristate Xilinx uartlite serial port support - depends on PPC32 + depends on PPC32 || MICROBLAZE select SERIAL_CORE help Say Y here if you want to use the Xilinx uartlite serial controller. -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 38/60] microblaze_v4: headers for executables format FLAT, ELF
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/elf.h | 22 ++
include/asm-microblaze/flat.h | 90 +
2 files changed, 112 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/elf.h
create mode 100644 include/asm-microblaze/flat.h
diff --git a/include/asm-microblaze/elf.h b/include/asm-microblaze/elf.h
new file mode 100644
index 000..a9f2ecf
--- /dev/null
+++ b/include/asm-microblaze/elf.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_ELF_H
+#define _ASM_MICROBLAZE_ELF_H
+
+#define EM_XILINX_MICROBLAZE 0xbaab
+#define ELF_ARCH EM_XILINX_MICROBLAZE
+
+#define elf_check_arch(x) ((x)-e_machine == EM_XILINX_MICROBLAZE)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS ELFCLASS32
+
+#endif /* _ASM_MICROBLAZE_ELF_H */
diff --git a/include/asm-microblaze/flat.h b/include/asm-microblaze/flat.h
new file mode 100644
index 000..acf0da5
--- /dev/null
+++ b/include/asm-microblaze/flat.h
@@ -0,0 +1,90 @@
+/*
+ * uClinux flat-format executables
+ *
+ * Copyright (C) 2005 John Williams [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_FLAT_H
+#define _ASM_MICROBLAZE_FLAT_H
+
+#include asm/unaligned.h
+
+#defineflat_stack_align(sp) /* nothing needed */
+#defineflat_argvp_envp_on_stack() 0
+#defineflat_old_ram_flag(flags)(flags)
+#defineflat_reloc_valid(reloc, size) ((reloc) = (size))
+#defineflat_set_persistent(relval, p) 0
+
+/*
+ * Microblaze works a little differently from other arches, because
+ * of the MICROBLAZE_64 reloc type. Here, a 32 bit address is split
+ * over two instructions, an 'imm' instruction which provides the top
+ * 16 bits, then the instruction proper which provides the low 16
+ * bits.
+ */
+
+/*
+ * Crack open a symbol reference and extract the address to be
+ * relocated. rp is a potentially unaligned pointer to the
+ * reference
+ */
+
+static inline unsigned long
+flat_get_addr_from_rp(unsigned long *rp, unsigned long relval,
+ unsigned long flags, unsigned long *persistent)
+{
+ unsigned long addr;
+ (void)flags;
+
+ /* Is it a split 64/32 reference? */
+ if (relval 0x8000) {
+ /* Grab the two halves of the reference */
+ unsigned long val_hi, val_lo;
+
+ val_hi = get_unaligned(rp);
+ val_lo = get_unaligned(rp+1);
+
+ /* Crack the address out */
+ addr = ((val_hi 0x) 16) + (val_lo 0x);
+ } else {
+ /* Get the address straight out */
+ addr = get_unaligned(rp);
+ }
+
+ return addr;
+}
+
+/*
+ * Insert an address into the symbol reference at rp. rp is potentially
+ * unaligned.
+ */
+
+static inline void
+flat_put_addr_at_rp(unsigned long *rp, unsigned long addr, unsigned long
relval)
+{
+ /* Is this a split 64/32 reloc? */
+ if (relval 0x8000) {
+ /* Get the two halves */
+ unsigned long val_hi = get_unaligned(rp);
+ unsigned long val_lo = get_unaligned(rp + 1);
+
+ /* insert the address */
+ val_hi = (val_hi 0x) | addr 16;
+ val_lo = (val_lo 0x) | (addr 0x);
+
+ /* store the two halves back into memory */
+ put_unaligned(val_hi, rp);
+ put_unaligned(val_lo, rp+1);
+ } else {
+ /* Put it straight in, no messing around */
+ put_unaligned(addr, rp);
+ }
+}
+
+#defineflat_get_relocate_addr(rel) (rel 0x7fff)
+
+#endif /* _ASM_MICROBLAZE_FLAT_H */
--
1.5.4.GIT
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[PATCH 57/60] microblaze_v4: entry.S
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- arch/microblaze/kernel/entry.S | 597 1 files changed, 597 insertions(+), 0 deletions(-) create mode 100644 arch/microblaze/kernel/entry.S diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S new file mode 100644 index 000..cfabea7 --- /dev/null +++ b/arch/microblaze/kernel/entry.S @@ -0,0 +1,597 @@ +/* + * arch/microblaze/kernel/entry.S + * + * Copyright (C) 2006 Atmark Techno, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include linux/linkage.h +#include asm/thread_info.h +#include asm/errno.h +#include asm/asm-offsets.h +#include asm/registers.h +#include asm/unistd.h +#include asm/percpu.h +#include asm/signal.h + +#define PER_CPU(var) per_cpu__##var + +#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR + .macro disable_irq + msrclr r0, MSR_IE + .endm + + .macro enable_irq + msrset r0, MSR_IE + .endm + + .macro clear_bip + msrclr r0, MSR_BIP + .endm +#else + .macro disable_irq + mfs r11, rmsr + andi r11, r11, ~MSR_IE + mts rmsr, r11 + .endm + + .macro enable_irq + mfs r11, rmsr + ori r11, r11, MSR_IE + mts rmsr, r11 + .endm + + .macro clear_bip + mfs r11, rmsr + andi r11, r11, ~MSR_BIP + mts rmsr, r11 + .endm +#endif + +ENTRY(_interrupt) + swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */ + swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */ + lwi r11, r0, PER_CPU(KM)/* load mode indicator */ + beqid r11, 1f + nop + brid2f /* jump over */ + addik r1, r1, (-PT_SIZE) /* room for pt_regs (delay slot) */ +1: /* switch to kernel stack */ + lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */ + lwi r1, r1, TS_THREAD_INFO /* get the thread info */ + /* calculate kernel stack pointer */ + addik r1, r1, THREAD_SIZE - PT_SIZE +2: + swi r11, r1, PT_MODE/* store the mode */ + lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */ + swi r2, r1, PT_R2 + swi r3, r1, PT_R3 + swi r4, r1, PT_R4 + swi r5, r1, PT_R5 + swi r6, r1, PT_R6 + swi r7, r1, PT_R7 + swi r8, r1, PT_R8 + swi r9, r1, PT_R9 + swi r10, r1, PT_R10 + swi r11, r1, PT_R11 + swi r12, r1, PT_R12 + swi r13, r1, PT_R13 + swi r14, r1, PT_R14 + swi r14, r1, PT_PC + swi r15, r1, PT_R15 + swi r16, r1, PT_R16 + swi r17, r1, PT_R17 + swi r18, r1, PT_R18 + swi r19, r1, PT_R19 + swi r20, r1, PT_R20 + swi r21, r1, PT_R21 + swi r22, r1, PT_R22 + swi r23, r1, PT_R23 + swi r24, r1, PT_R24 + swi r25, r1, PT_R25 + swi r26, r1, PT_R26 + swi r27, r1, PT_R27 + swi r28, r1, PT_R28 + swi r29, r1, PT_R29 + swi r30, r1, PT_R30 + swi r31, r1, PT_R31 + /* special purpose registers */ + mfs r11, rmsr + swi r11, r1, PT_MSR + mfs r11, rear + swi r11, r1, PT_EAR + mfs r11, resr + swi r11, r1, PT_ESR + mfs r11, rfsr + swi r11, r1, PT_FSR + /* reload original stack pointer and save it */ + lwi r11, r0, PER_CPU(ENTRY_SP) + swi r11, r1, PT_R1 + /* update mode indicator we are in kernel mode */ + addik r11, r0, 1 + swi r11, r0, PER_CPU(KM) + /* restore r31 */ + lwi r31, r0, PER_CPU(CURRENT_SAVE) + /* prepare the link register, the argument and jump */ + la r15, r0, ret_from_intr - 8 + addkr6, r0, r15 + braid do_IRQ + add r5, r0, r1 + +ret_from_intr: + lwi r11, r1, PT_MODE + bneid r11, 3f + + lwi r6, r31, TS_THREAD_INFO /* get thread info */ + lwi r19, r6, TI_FLAGS /* get flags in thread info */ + /* do an extra work if any bits are set */ + + andir11, r19, _TIF_NEED_RESCHED + beqir11, 1f + bralid r15, schedule + nop +1: andir11, r19, _TIF_SIGPENDING + beqid r11, no_intr_reshed + addkr5, r1, r0 + addkr7, r0, r0 + bralid r15, do_signal + addkr6, r0, r0 + +no_intr_reshed: + /* save mode indicator */ + lwi r11, r1, PT_MODE +3: + swi r11, r0, PER_CPU(KM) + + /* save r31 */ + swi r31, r0,
[PATCH 53/60] microblaze_v4: setup.h string.h thread_info.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/setup.h | 41 +
include/asm-microblaze/string.h | 20 +
include/asm-microblaze/thread_info.h | 154 ++
3 files changed, 215 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/setup.h
create mode 100644 include/asm-microblaze/string.h
create mode 100644 include/asm-microblaze/thread_info.h
diff --git a/include/asm-microblaze/setup.h b/include/asm-microblaze/setup.h
new file mode 100644
index 000..9de20af
--- /dev/null
+++ b/include/asm-microblaze/setup.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SETUP_H
+#define _ASM_MICROBLAZE_SETUP_H
+
+#include linux/init.h
+
+extern unsigned int boot_cpuid;
+extern int have_of;
+
+#define COMMAND_LINE_SIZE 256
+extern char cmd_line[COMMAND_LINE_SIZE];
+
+int __init setup_early_printk(char *opt);
+void early_printk(const char *fmt, ...);
+
+#ifdef CONFIG_HEART_BEAT
+void heartbeat(void);
+#endif
+
+void system_timer_init(void);
+void time_init(void);
+unsigned long long sched_clock(void);
+
+void __init setup_memory(void);
+void __init machine_early_init(const char *cmdline, unsigned int ram,
+ unsigned int fdt);
+
+void machine_restart(char *cmd);
+void machine_shutdown(void);
+void machine_halt(void);
+void machine_power_off(void);
+
+#endif /* _ASM_MICROBLAZE_SETUP_H */
diff --git a/include/asm-microblaze/string.h b/include/asm-microblaze/string.h
new file mode 100644
index 000..52a14a3
--- /dev/null
+++ b/include/asm-microblaze/string.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_STRING_H
+#define _ASM_MICROBLAZE_STRING_H
+
+#define __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMCPY
+#define __HAVE_ARCH_MEMMOVE
+
+extern void *memset(void *, int, __kernel_size_t);
+extern void *memcpy(void *, const void *, __kernel_size_t);
+extern void *memmove(void *, const void *, __kernel_size_t);
+
+#endif /* _ASM_MICROBLAZE_STRING_H */
diff --git a/include/asm-microblaze/thread_info.h
b/include/asm-microblaze/thread_info.h
new file mode 100644
index 000..d04d195
--- /dev/null
+++ b/include/asm-microblaze/thread_info.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_THREAD_INFO_H
+#define _ASM_MICROBLAZE_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+/* we have 8k stack */
+#define THREAD_SHIFT 13
+#define THREAD_SIZE(1 THREAD_SHIFT)
+
+#ifndef __ASSEMBLY__
+# include asm/processor.h
+# include asm/segment.h
+
+/*
+ * low level task data that entry.S needs immediate access to
+ * - this struct should fit entirely inside of one cache line
+ * - this struct shares the supervisor stack pages
+ * - if the contents of this structure are changed, the assembly constants
+ * must also be changed
+ */
+
+struct cpu_context {
+ __u32 r1; /* stack pointer */
+ __u32 r2;
+ /* dedicated registers */
+ __u32 r13;
+ __u32 r14;
+ __u32 r15;
+ __u32 r16;
+ __u32 r17;
+ __u32 r18;
+ /* non-volatile registers */
+ __u32 r19;
+ __u32 r20;
+ __u32 r21;
+ __u32 r22;
+ __u32 r23;
+ __u32 r24;
+ __u32 r25;
+ __u32 r26;
+ __u32 r27;
+ __u32 r28;
+ __u32 r29;
+ __u32 r30;
+ /* r31 is used as current task pointer */
+ /* special purpose registers */
+ __u32 msr;
+ __u32 ear;
+ __u32 esr;
+ __u32 fsr;
+};
+
+struct thread_info {
+ struct task_struct *task; /* main task structure */
+ struct exec_domain *exec_domain; /* execution domain */
+ unsigned long flags; /* low level flags */
+ unsigned long status; /* thread-synchronous flags */
+ __u32 cpu; /* current CPU */
+ __s32 preempt_count; /* 0 = preemptable, 0 = BUG*/
+ mm_segment_taddr_limit; /* thread address space */
+ struct restart_blockrestart_block;
+
+ struct cpu_context cpu_context;
+};
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially,
[PATCH 54/60] microblaze_v4: Kbuild file
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/Kbuild | 24 1 files changed, 24 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/Kbuild diff --git a/include/asm-microblaze/Kbuild b/include/asm-microblaze/Kbuild new file mode 100644 index 000..783296d --- /dev/null +++ b/include/asm-microblaze/Kbuild @@ -0,0 +1,24 @@ +include include/asm-generic/Kbuild.asm + +header-y += auxvec.h +header-y += cpuinfo.h +header-y += errno.h +header-y += fcntl.h +header-y += ioctl.h +header-y += ioctls.h +header-y += ipcbuf.h +header-y += linkage.h +header-y += mman.h +header-y += msgbuf.h +header-y += poll.h +header-y += resource.h +header-y += sembuf.h +header-y += shmbuf.h +header-y += sigcontext.h +header-y += siginfo.h +header-y += socket.h +header-y += sockios.h +header-y += statfs.h +header-y += stat.h +header-y += termbits.h +header-y += ucontext.h -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 58/60] microblaze_v4: sys_microblaze.c
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/sys_microblaze.c | 283 +++
1 files changed, 283 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/sys_microblaze.c
diff --git a/arch/microblaze/kernel/sys_microblaze.c
b/arch/microblaze/kernel/sys_microblaze.c
new file mode 100644
index 000..4ff008b
--- /dev/null
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 2007 PetaLogix
+ * John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ * Yasushi SHOJI [EMAIL PROTECTED]
+ * Tetsuya OHKAWA [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/errno.h
+#include linux/mm.h
+#include linux/smp.h
+#include linux/smp_lock.h
+#include linux/syscalls.h
+#include linux/sem.h
+#include linux/msg.h
+#include linux/shm.h
+#include linux/stat.h
+#include linux/mman.h
+#include linux/sys.h
+#include linux/ipc.h
+#include linux/utsname.h
+#include linux/file.h
+#include linux/module.h
+#include linux/err.h
+#include linux/fs.h
+
+#include asm/uaccess.h
+#include linux/ipc.h
+#include asm/semaphore.h
+#include asm/unistd.h
+
+/*
+ * sys_ipc() is the de-multiplexer for the SysV IPC calls..
+ *
+ * This is really horribly ugly.
+ */
+int
+sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth)
+{
+ int version, ret;
+
+ version = call 16; /* hack for backward compatibility */
+ call = 0x;
+
+ ret = -EINVAL;
+ switch (call) {
+ case SEMOP:
+ ret = sys_semop(first, (struct sembuf *)ptr, second);
+ break;
+ case SEMGET:
+ ret = sys_semget(first, second, third);
+ break;
+ case SEMCTL:
+ {
+ union semun fourth;
+
+ if (!ptr)
+ break;
+ if ((ret = access_ok(VERIFY_READ, ptr,
+ sizeof(long)) ? 0 : -EFAULT)
+ || (ret = get_user(fourth.__pad, (void **)ptr)))
+ break;
+ ret = sys_semctl(first, second, third, fourth);
+ break;
+ }
+ case MSGSND:
+ ret = sys_msgsnd(first, (struct msgbuf *) ptr, second, third);
+ break;
+ case MSGRCV:
+ switch (version) {
+ case 0: {
+ struct ipc_kludge tmp;
+
+ if (!ptr)
+ break;
+ if ((ret = access_ok(VERIFY_READ, ptr,
+ sizeof(tmp)) ? 0 : -EFAULT)
+ || (ret = copy_from_user(tmp,
+ (struct ipc_kludge *) ptr,
+ sizeof(tmp
+ break;
+ ret = sys_msgrcv(first, tmp.msgp, second, tmp.msgtyp,
+ third);
+ break;
+ }
+ default:
+ ret = sys_msgrcv(first, (struct msgbuf *) ptr,
+ second, fifth, third);
+ break;
+ }
+ break;
+ case MSGGET:
+ ret = sys_msgget((key_t) first, second);
+ break;
+ case MSGCTL:
+ ret = sys_msgctl(first, second, (struct msqid_ds *) ptr);
+ break;
+ case SHMAT:
+ switch (version) {
+ default: {
+ ulong raddr;
+
+ if ((ret = access_ok(VERIFY_WRITE, (ulong *) third,
+ sizeof(ulong)) ? 0 : -EFAULT))
+ break;
+ ret = do_shmat(first, (char *) ptr, second, raddr);
+ if (ret)
+ break;
+ ret = put_user(raddr, (ulong *) third);
+ break;
+ }
+ case 1: /* iBCS2 emulator entry point */
+ if (!segment_eq(get_fs(), get_ds()))
+ break;
+ ret = do_shmat(first, (char *) ptr, second,
+ (ulong *) third);
+ break;
+ }
+ break;
+ case SHMDT:
+ ret = sys_shmdt((char *)ptr);
+ break;
+ case SHMGET:
+ ret = sys_shmget(first, second, third);
+ break;
+ case SHMCTL:
+ ret = sys_shmctl(first, second, (struct shmid_ds *) ptr);
+ break;
+ }
+
+ return
[PATCH 45/60] microblaze_v4: stats headers
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/stat.h | 73 +++
include/asm-microblaze/statfs.h |1 +
2 files changed, 74 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/stat.h
create mode 100644 include/asm-microblaze/statfs.h
diff --git a/include/asm-microblaze/stat.h b/include/asm-microblaze/stat.h
new file mode 100644
index 000..9767b11
--- /dev/null
+++ b/include/asm-microblaze/stat.h
@@ -0,0 +1,73 @@
+/*
+ * Microblaze stat structure
+ *
+ * Copyright (C) 2001,02,03 NEC Electronics Corporation
+ * Copyright (C) 2001,02,03 Miles Bader [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader [EMAIL PROTECTED]
+ */
+
+#ifndef _ASM_MICROBLAZE_STAT_H
+#define _ASM_MICROBLAZE_STAT_H
+
+#include asm/posix_types.h
+
+struct stat {
+ unsigned intst_dev;
+ unsigned long st_ino;
+ unsigned intst_mode;
+ unsigned intst_nlink;
+ unsigned intst_uid;
+ unsigned intst_gid;
+ unsigned intst_rdev;
+ longst_size;
+ unsigned long st_blksize;
+ unsigned long st_blocks;
+ unsigned long st_atime;
+ unsigned long __unused1;
+ unsigned long st_mtime;
+ unsigned long __unused2;
+ unsigned long st_ctime;
+ unsigned long __unused3;
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+struct stat64 {
+ unsigned long long st_dev;
+ unsigned long __unused1;
+
+ unsigned long long st_ino;
+
+ unsigned intst_mode;
+ unsigned intst_nlink;
+
+ unsigned intst_uid;
+ unsigned intst_gid;
+
+ unsigned long long st_rdev;
+ unsigned long __unused3;
+
+ long long st_size;
+ unsigned long st_blksize;
+
+ unsigned long st_blocks; /* No. of 512-byte blocks allocated */
+ unsigned long __unused4; /* future possible st_blocks high bits */
+
+ unsigned long st_atime;
+ unsigned long st_atime_nsec;
+
+ unsigned long st_mtime;
+ unsigned long st_mtime_nsec;
+
+ unsigned long st_ctime;
+ unsigned long st_ctime_nsec;
+
+ unsigned long __unused8;
+};
+
+#endif /* _ASM_MICROBLAZE_STAT_H */
diff --git a/include/asm-microblaze/statfs.h b/include/asm-microblaze/statfs.h
new file mode 100644
index 000..0b91fe1
--- /dev/null
+++ b/include/asm-microblaze/statfs.h
@@ -0,0 +1 @@
+#include asm-generic/statfs.h
--
1.5.4.GIT
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[PATCH 56/60] microblaze_v4: IPC headers
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/ipc.h|1 +
include/asm-microblaze/ipcbuf.h | 36
2 files changed, 37 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/ipc.h
create mode 100644 include/asm-microblaze/ipcbuf.h
diff --git a/include/asm-microblaze/ipc.h b/include/asm-microblaze/ipc.h
new file mode 100644
index 000..a46e3d9
--- /dev/null
+++ b/include/asm-microblaze/ipc.h
@@ -0,0 +1 @@
+#include asm-generic/ipc.h
diff --git a/include/asm-microblaze/ipcbuf.h b/include/asm-microblaze/ipcbuf.h
new file mode 100644
index 000..b056fa4
--- /dev/null
+++ b/include/asm-microblaze/ipcbuf.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_IPCBUF_H
+#define _ASM_MICROBLAZE_IPCBUF_H
+
+/*
+ * The user_ipc_perm structure for microblaze architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit mode_t and seq
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct ipc64_perm {
+ __kernel_key_t key;
+ __kernel_uid32_tuid;
+ __kernel_gid32_tgid;
+ __kernel_uid32_tcuid;
+ __kernel_gid32_tcgid;
+ __kernel_mode_t mode;
+ unsigned short __pad1;
+ unsigned short seq;
+ unsigned short __pad2;
+ unsigned long __unused1;
+ unsigned long __unused2;
+};
+
+#endif /* _ASM_MICROBLAZE_IPCBUF_H */
--
1.5.4.GIT
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[PATCH 33/60] microblaze_v4: includes SHM*, msgbuf
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-microblaze/msgbuf.h | 39
include/asm-microblaze/shmbuf.h | 50 +
include/asm-microblaze/shmparam.h | 14 ++
3 files changed, 103 insertions(+), 0 deletions(-)
create mode 100644 include/asm-microblaze/msgbuf.h
create mode 100644 include/asm-microblaze/shmbuf.h
create mode 100644 include/asm-microblaze/shmparam.h
diff --git a/include/asm-microblaze/msgbuf.h b/include/asm-microblaze/msgbuf.h
new file mode 100644
index 000..8172bc9
--- /dev/null
+++ b/include/asm-microblaze/msgbuf.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_MSGBUF_H
+#define _ASM_MICROBLAZE_MSGBUF_H
+
+/*
+ * The msqid64_ds structure for microblaze architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+ struct ipc64_perm msg_perm;
+ __kernel_time_t msg_stime; /* last msgsnd time */
+ unsigned long __unused1;
+ __kernel_time_t msg_rtime; /* last msgrcv time */
+ unsigned long __unused2;
+ __kernel_time_t msg_ctime; /* last change time */
+ unsigned long __unused3;
+ unsigned long msg_cbytes; /* current number of bytes on queue */
+ unsigned long msg_qnum; /* number of messages in queue */
+ unsigned long msg_qbytes; /* max number of bytes on queue */
+ __kernel_pid_t msg_lspid; /* pid of last msgsnd */
+ __kernel_pid_t msg_lrpid; /* last receive pid */
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+#endif /* _ASM_MICROBLAZE_MSGBUF_H */
diff --git a/include/asm-microblaze/shmbuf.h b/include/asm-microblaze/shmbuf.h
new file mode 100644
index 000..a460e36
--- /dev/null
+++ b/include/asm-microblaze/shmbuf.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SHMBUF_H
+#define _ASM_MICROBLAZE_SHMBUF_H
+
+/*
+ * The shmid64_ds structure for microblaze architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+ struct ipc64_perm shm_perm; /* operation perms */
+ size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_time_t shm_atime; /* last attach time */
+ unsigned long __unused1;
+ __kernel_time_t shm_dtime; /* last detach time */
+ unsigned long __unused2;
+ __kernel_time_t shm_ctime; /* last change time */
+ unsigned long __unused3;
+ __kernel_pid_t shm_cpid; /* pid of creator */
+ __kernel_pid_t shm_lpid; /* pid of last operator */
+ unsigned long shm_nattch; /* no. of current attaches */
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+struct shminfo64 {
+ unsigned long shmmax;
+ unsigned long shmmin;
+ unsigned long shmmni;
+ unsigned long shmseg;
+ unsigned long shmall;
+ unsigned long __unused1;
+ unsigned long __unused2;
+ unsigned long __unused3;
+ unsigned long __unused4;
+};
+
+#endif /* _ASM_MICROBLAZE_SHMBUF_H */
diff --git a/include/asm-microblaze/shmparam.h
b/include/asm-microblaze/shmparam.h
new file mode 100644
index 000..719bbed
--- /dev/null
+++ b/include/asm-microblaze/shmparam.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SHMPARAM_H
+#define _ASM_MICROBLAZE_SHMPARAM_H
+
+#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
+
+#endif /* _ASM_MICROBLAZE_SHMPARAM_H */
--
1.5.4.GIT
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[PATCH 55/60] microblaze_v4: pci headers
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/pci-bridge.h |1 + include/asm-microblaze/pci.h|1 + 2 files changed, 2 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/pci-bridge.h create mode 100644 include/asm-microblaze/pci.h diff --git a/include/asm-microblaze/pci-bridge.h b/include/asm-microblaze/pci-bridge.h new file mode 100644 index 000..7ad28f6 --- /dev/null +++ b/include/asm-microblaze/pci-bridge.h @@ -0,0 +1 @@ +#include linux/pci.h diff --git a/include/asm-microblaze/pci.h b/include/asm-microblaze/pci.h new file mode 100644 index 000..469e80e --- /dev/null +++ b/include/asm-microblaze/pci.h @@ -0,0 +1 @@ +#include asm/io.h -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 59/60] microblaze_v4: syscall_table.S and unistd.h
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- arch/microblaze/kernel/syscall_table.S | 330 +++ include/asm-microblaze/unistd.h| 390 2 files changed, 720 insertions(+), 0 deletions(-) create mode 100644 arch/microblaze/kernel/syscall_table.S create mode 100644 include/asm-microblaze/unistd.h diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S new file mode 100644 index 000..0ffa19e --- /dev/null +++ b/arch/microblaze/kernel/syscall_table.S @@ -0,0 +1,330 @@ +ENTRY(sys_call_table) + .long sys_restart_syscall /* 0 - old setup() system call, +* used for restarting */ + .long sys_exit + .long sys_ni_syscall/* was fork */ + .long sys_read + .long sys_write + .long sys_open /* 5 */ + .long sys_close + .long sys_waitpid + .long sys_creat + .long sys_link + .long sys_unlink/* 10 */ + .long sys_execve_wrapper + .long sys_chdir + .long sys_time + .long sys_mknod + .long sys_chmod /* 15 */ + .long sys_lchown + .long sys_ni_syscall/* old break syscall holder */ + .long sys_ni_syscall/* stat */ + .long sys_lseek + .long sys_getpid/* 20 */ + .long sys_mount + .long sys_oldumount + .long sys_setuid + .long sys_getuid + .long sys_stime /* 25 */ + .long sys_ptrace + .long sys_alarm + .long sys_ni_syscall/* fstat */ + .long sys_pause + .long sys_utime /* 30 */ + .long sys_ni_syscall/* old stty syscall holder */ + .long sys_ni_syscall/* old gtty syscall holder */ + .long sys_access + .long sys_nice + .long sys_ni_syscall/* 35 - old ftime syscall holder */ + .long sys_sync + .long sys_kill + .long sys_rename + .long sys_mkdir + .long sys_rmdir /* 40 */ + .long sys_dup + .long sys_pipe + .long sys_times + .long sys_ni_syscall/* old prof syscall holder */ + .long sys_brk /* 45 */ + .long sys_setgid + .long sys_getgid + .long sys_signal + .long sys_geteuid + .long sys_getegid /* 50 */ + .long sys_acct + .long sys_umount/* recycled never used phys() */ + .long sys_ni_syscall/* old lock syscall holder */ + .long sys_ioctl + .long sys_fcntl /* 55 */ + .long sys_ni_syscall/* old mpx syscall holder */ + .long sys_setpgid + .long sys_ni_syscall/* old ulimit syscall holder */ + .long sys_ni_syscall/* olduname */ + .long sys_umask /* 60 */ + .long sys_chroot + .long sys_ustat + .long sys_dup2 + .long sys_getppid + .long sys_getpgrp /* 65 */ + .long sys_setsid + .long sys_sigaction + .long sys_sgetmask + .long sys_ssetmask + .long sys_setreuid /* 70 */ + .long sys_setregid + .long sys_sigsuspend_wrapper + .long sys_sigpending + .long sys_sethostname + .long sys_setrlimit /* 75 */ + .long sys_ni_syscall/* old_getrlimit */ + .long sys_getrusage + .long sys_gettimeofday + .long sys_settimeofday + .long sys_getgroups /* 80 */ + .long sys_setgroups + .long sys_ni_syscall/* old_select */ + .long sys_symlink + .long sys_ni_syscall/* lstat */ + .long sys_readlink /* 85 */ + .long sys_uselib + .long sys_swapon + .long sys_reboot + .long sys_ni_syscall/* old_readdir */ + .long sys_mmap /* 90 */ /* old_mmap */ + .long sys_munmap + .long sys_truncate + .long sys_ftruncate + .long sys_fchmod + .long sys_fchown/* 95 */ + .long sys_getpriority + .long sys_setpriority + .long sys_ni_syscall/* old profil syscall holder */ + .long sys_statfs + .long sys_fstatfs /* 100 */ + .long sys_ni_syscall/* ioperm */ + .long sys_socketcall + .long sys_syslog/* operation with system console */ + .long sys_setitimer + .long sys_getitimer /* 105 */ + .long sys_newstat + .long sys_newlstat + .long sys_newfstat + .long sys_ni_syscall/* uname */ + .long sys_ni_syscall/* 110 */ /* iopl */ + .long sys_vhangup + .long sys_ni_syscall/*
[PATCH 50/60] microblaze_v4: device.h param.h topology.h
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
include/asm-generic/param.h | 32
include/asm-microblaze/device.h | 21 +
include/asm-microblaze/param.h|1 +
include/asm-microblaze/topology.h |1 +
4 files changed, 55 insertions(+), 0 deletions(-)
create mode 100644 include/asm-generic/param.h
create mode 100644 include/asm-microblaze/device.h
create mode 100644 include/asm-microblaze/param.h
create mode 100644 include/asm-microblaze/topology.h
diff --git a/include/asm-generic/param.h b/include/asm-generic/param.h
new file mode 100644
index 000..b2ed486
--- /dev/null
+++ b/include/asm-generic/param.h
@@ -0,0 +1,32 @@
+/*
+ * include/asm-generic/param.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#ifndef _ASM_GENERIC_PARAM_H
+#define _ASM_GENERIC_PARAM_H
+
+#ifdef __KERNEL__
+#define HZ CONFIG_HZ /* internal kernel timer frequency */
+#define USER_HZ100 /* for user interfaces in
ticks */
+#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
+#endif /* __KERNEL__ */
+
+#ifndef HZ
+#define HZ 100
+#endif
+
+#define EXEC_PAGESIZE 4096
+
+#ifndef NOGROUP
+#define NOGROUP(-1)
+#endif
+
+#define MAXHOSTNAMELEN 64 /* max length of hostname */
+
+#endif /* _ASM_GENERIC_PARAM_H */
diff --git a/include/asm-microblaze/device.h b/include/asm-microblaze/device.h
new file mode 100644
index 000..c042830
--- /dev/null
+++ b/include/asm-microblaze/device.h
@@ -0,0 +1,21 @@
+/*
+ * Arch specific extensions to struct device
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License v2. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_DEVICE_H
+#define _ASM_MICROBLAZE_DEVICE_H
+
+struct device_node;
+
+struct dev_archdata {
+ /* Optional pointer to an OF device node */
+ struct device_node *of_node;
+};
+
+#endif /* _ASM_MICROBLAZE_DEVICE_H */
+
+
diff --git a/include/asm-microblaze/param.h b/include/asm-microblaze/param.h
new file mode 100644
index 000..965d454
--- /dev/null
+++ b/include/asm-microblaze/param.h
@@ -0,0 +1 @@
+#include asm-generic/param.h
diff --git a/include/asm-microblaze/topology.h
b/include/asm-microblaze/topology.h
new file mode 100644
index 000..5428f33
--- /dev/null
+++ b/include/asm-microblaze/topology.h
@@ -0,0 +1 @@
+#include asm-generic/topology.h
--
1.5.4.GIT
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[PATCH 31/60] microblaze_v4: memory inicialization, MMU, TLB
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/mm/init.c| 184 ++
include/asm-microblaze/mmu.h | 17 +++
include/asm-microblaze/mmu_context.h | 22
include/asm-microblaze/tlb.h | 16 +++
include/asm-microblaze/tlbflush.h| 20
5 files changed, 259 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/mm/init.c
create mode 100644 include/asm-microblaze/mmu.h
create mode 100644 include/asm-microblaze/mmu_context.h
create mode 100644 include/asm-microblaze/tlb.h
create mode 100644 include/asm-microblaze/tlbflush.h
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
new file mode 100644
index 000..5bb3e01
--- /dev/null
+++ b/arch/microblaze/mm/init.c
@@ -0,0 +1,184 @@
+/*
+ * arch/microblaze/mm/init.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#undef DEBUG
+
+#include linux/autoconf.h
+#include linux/init.h
+#include linux/mm.h
+#include ../../../mm/internal.h
+#include linux/swap.h
+#include linux/bootmem.h
+#include linux/pfn.h
+#include linux/lmb.h
+
+#include asm/sections.h
+#include asm/uaccess.h
+#include asm/system.h
+#include asm/pgtable.h
+
+char *klimit = _end;
+static unsigned int memory_start;
+unsigned int memory_end; /* due to mm/nommu.c */
+
+unsigned int __page_offset;
+/* EXPORT_SYMBOL(__page_offset); */
+
+void __init setup_memory(void)
+{
+ int i;
+ unsigned int start, end;
+ unsigned long map_size;
+ unsigned long start_pfn = 0;
+ unsigned long end_pfn = 0;
+
+ /* Find main memory where is the kernel */
+ for (i = 0; i lmb.memory.cnt; i++) {
+ start_pfn = lmb.memory.region[i].base PAGE_SHIFT;
+ end_pfn = start_pfn + lmb_size_pages(lmb.memory, i);
+ if ((start_pfn = (((int)_text) PAGE_SHIFT))
+ (((int)_text PAGE_SHIFT) = end_pfn)) {
+ memory_end = (end_pfn PAGE_SHIFT) - 1;
+ PAGE_OFFSET = memory_start = start_pfn PAGE_SHIFT;
+ pr_debug(%s: Main mem: 0x%x-0x%x\n, __func__,
+ memory_start, memory_end);
+ break;
+ }
+ }
+ /*
+* start_pfn - start page - starting point
+* end_pfn - first unused page
+* memory_start - base physical address of main memory
+* memory_end - end physical address of main memory
+* PAGE_OFFSET - moving of first page
+*
+* Kernel:
+* start: base phys address of kernel - page align
+* end: base phys address of kernel - page align
+*
+* min_low_pfn - the first page (mm/bootmem.c - node_boot_start)
+* max_low_pfn
+* max_mapnr - the first unused page (mm/bootmem.c - node_low_pfn)
+* num_physpages - number of all pages
+*
+*/
+
+ /* reservation of region where is the kernel */
+ start = PFN_DOWN((int)_text) PAGE_SHIFT;
+ end = PAGE_ALIGN((unsigned long)klimit);
+ lmb_reserve(start, end - start);
+ pr_debug(%s: kernel addr 0x%08x-0x%08x\n, __func__, start, end);
+
+ /* calculate free pages, etc. */
+ min_low_pfn = PFN_UP(start_pfn PAGE_SHIFT);
+ max_mapnr = PFN_DOWN((end_pfn PAGE_SHIFT));
+ max_low_pfn = max_mapnr - min_low_pfn;
+ num_physpages = max_mapnr - min_low_pfn + 1;
+ printk(KERN_INFO %s: max_mapnr: %#lx\n, __func__, max_mapnr);
+ printk(KERN_INFO %s: min_low_pfn: %#lx\n, __func__, min_low_pfn);
+ printk(KERN_INFO %s: max_low_pfn: %#lx\n, __func__, max_low_pfn);
+
+ /* add place for data pages */
+ map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(end),
+ min_low_pfn, max_mapnr);
+ lmb_reserve(PFN_UP(end) PAGE_SHIFT, map_size);
+
+ /* free bootmem is whole main memory */
+ free_bootmem_node(NODE_DATA(0), start_pfn PAGE_SHIFT,
+ ((end_pfn - start_pfn) PAGE_SHIFT) - 1);
+
+ /* reserve allocate blocks */
+ for (i = 0; i lmb.reserved.cnt; i++) {
+ pr_debug(reserved %d - 0x%08x-0x%08x\n, i,
+ (u32) lmb.reserved.region[i].base,
+ (u32) lmb_size_bytes(lmb.reserved, i));
+ reserve_bootmem(lmb.reserved.region[i].base,
+ lmb_size_bytes(lmb.reserved, i) - 1, BOOTMEM_DEFAULT);
+ }
+}
+
+void __init paging_init(void)
+{
+ int i;
+ unsigned long zones_size[MAX_NR_ZONES];
+
+ /* we can DMA to/from any address. put all page into
+* ZONE_DMA. */
+ zones_size[ZONE_NORMAL] = max_low_pfn;
+
+
[PATCH] Remove experimental status of kdump on PPC64
This patch removes the experimental status of kdump on IA64. kdump is on IA64 now since more than one year and it has proven to be stable. For i386/x86_64, a similar patch has been accepted by Ingo Molnar and Vivek Goyal. Signed-off-by: Bernhard Walle [EMAIL PROTECTED] --- arch/powerpc/Kconfig |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3934e26..2a116b9 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -308,8 +308,8 @@ config KEXEC strongly in flux, so no good recommendation can be made. config CRASH_DUMP - bool Build a kdump crash kernel (EXPERIMENTAL) - depends on PPC_MULTIPLATFORM PPC64 EXPERIMENTAL + bool Build a kdump crash kernel + depends on PPC_MULTIPLATFORM PPC64 help Build a kernel suitable for use as a kdump capture kernel. The kernel will be linked at a different address than normal, and -- 1.5.6 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] booting-without-of: add more bindings for FSL UPM driver
Hi Segher,
Segher Boessenkool wrote:
+ - chip-delay : may specify a delay value in milliseconds.
Delay for what? The binding should say. chip-delay is a bit
too generic name as well, it could be more descriptive perhaps.
The chip-delay property defines an appropriate maximum delay
time (tR) required for read operations if the R/B pin is not
connected.
Yeah. So please put that in the binding.
Shouldn't this be a property of the NAND device anyway, not the
NAND controller?
Strictly speaking, it's a property of the NAND device. Therefore it
should be inside the node [EMAIL PROTECTED], I thhink:
+[EMAIL PROTECTED] {
+#address-cells = 1;
+#size-cells = 1;
+chip-delay = 25; // in micro-seconds
Something like that, yes. You wrote milliseconds before; which is it?
And, a better property name, please.
Where should that be documented?
In the binding for nand devices. If there isn't any yet, it might be
best to include that with the binding for your nand controller (i.e.,
describe the whole sub node there).
This is another try to get this binding accepted. Below is my revised
patch introducing the proper read-fetch-delay for the sub-nodes of
the FSL UPM nodes and documenting all other options as well.
What do you think?
Wolfgang.
From: Wolfgang Grandegger [EMAIL PROTECTED]
Subject: booting-without-of: add more bindings for FSL UPM driver
This patch adds the bindings for the property read-fetch-delay to the
sub-nodes of the fsl,upm-nand compatible nodes. It is used by the patch
[NAND] driver extension to support NAND on TQM85xx modules posted to
this list some time ago:
http://ozlabs.org/pipermail/linuxppc-dev/2008-June/057632.html
Furthermore it documents all other properties of the sub-nodes.
Note: this patch is based on the following patches from Anton
Vorontsov posted to this list some time ago:
http://ozlabs.org/pipermail/linuxppc-dev/2008-May/056531.html
http://ozlabs.org/pipermail/linuxppc-dev/2008-June/057244.html
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
---
Documentation/powerpc/booting-without-of.txt | 34 +--
1 file changed, 32 insertions(+), 2 deletions(-)
Index: linux-2.6-galak/Documentation/powerpc/booting-without-of.txt
===
--- linux-2.6-galak.orig/Documentation/powerpc/booting-without-of.txt
+++ linux-2.6-galak/Documentation/powerpc/booting-without-of.txt
@@ -3036,6 +3036,28 @@ platforms are moved over to use the flat
- fsl,upm-cmd-offset : UPM pattern offset for the command latch.
- gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
+ Each NAND flash is represented as a sub-node of the UPM node.
+ The nodes's name represents the name of the corresponding device.
+
+ NAND flash properties:
+ - compatible : not yet used.
+ - read-fetch-delay : chip dependent delay for transfering data
+from array to read regs (tR).
+
+ Each partition is represented as a sub-node of the NAND flash device.
+ Each node's name represents the name of the corresponding partition
+ of the flash device.
+
+ NAND flash partitions:
+ - reg : The partition's offset and size within the flash bank.
+ - label : (optional) The label / name for this flash partition. If
+omitted, the label is taken from the node name (excluding the
+unit address).
+ - read-only : (optional) This parameter, if present, is a hint to
+Linux that this flash partition should only be mounted read-only.
+This is usually used for flash partitions containing early-boot
+firmware images or data which should not be clobbered.
+
Example:
[EMAIL PROTECTED],0 {
@@ -3049,9 +3071,17 @@ platforms are moved over to use the flat
#address-cells = 1;
#size-cells = 1;
compatible = stmicro,NAND512W3A2BN6E;
+ read-fetch-delay = 25
+
+ [EMAIL PROTECTED] {
+ label = fs;
+ reg = 0 f8;
+ };
- [EMAIL PROTECTED] {
- ...
+ [EMAIL PROTECTED] {
+ label =firmware;
+ reg = f8 8;
+ read-only;
};
};
};
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[PATCH 07/60] microblaze_v4: Support for semaphores
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/semaphore.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/semaphore.h diff --git a/include/asm-microblaze/semaphore.h b/include/asm-microblaze/semaphore.h new file mode 100644 index 000..d9b2034 --- /dev/null +++ b/include/asm-microblaze/semaphore.h @@ -0,0 +1 @@ +#include linux/semaphore.h -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 14/60] microblaze_v4: lmb support
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/lmb.h | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/lmb.h diff --git a/include/asm-microblaze/lmb.h b/include/asm-microblaze/lmb.h new file mode 100644 index 000..a0a0a92 --- /dev/null +++ b/include/asm-microblaze/lmb.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED] + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_MICROBLAZE_LMB_H +#define _ASM_MICROBLAZE_LMB_H + +/* LMB limit is OFF */ +#define LMB_REAL_LIMIT 0x + +#endif /* _ASM_MICROBLAZE_LMB_H */ + + -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 27/60] microblaze_v4: virtualization
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- include/asm-microblaze/kvm.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/kvm.h diff --git a/include/asm-microblaze/kvm.h b/include/asm-microblaze/kvm.h new file mode 100644 index 000..01c5e79 --- /dev/null +++ b/include/asm-microblaze/kvm.h @@ -0,0 +1 @@ +/* Microblaze does not support KVM */ -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 30/60] microblaze_v4: support for a.out
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- 0 files changed, 0 insertions(+), 0 deletions(-) create mode 100644 include/asm-microblaze/a.out.h diff --git a/include/asm-microblaze/a.out.h b/include/asm-microblaze/a.out.h new file mode 100644 index 000..e69de29 -- 1.5.4.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 05/60] microblaze_v4: Open firmware files2
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/of_device.c | 42 +++
arch/microblaze/platform/platform.c | 31 +
2 files changed, 73 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/of_device.c
create mode 100644 arch/microblaze/platform/platform.c
diff --git a/arch/microblaze/kernel/of_device.c
b/arch/microblaze/kernel/of_device.c
new file mode 100644
index 000..984d066
--- /dev/null
+++ b/arch/microblaze/kernel/of_device.c
@@ -0,0 +1,42 @@
+#include linux/string.h
+#include linux/kernel.h
+#include linux/of.h
+#include linux/init.h
+#include linux/module.h
+#include linux/mod_devicetable.h
+#include linux/slab.h
+#include linux/of_device.h
+
+#include asm/errno.h
+
+void of_device_make_bus_id(struct of_device *dev)
+{
+ static atomic_t bus_no_reg_magic;
+ struct device_node *node = dev-node;
+ char *name = dev-dev.bus_id;
+ const u32 *reg;
+ u64 addr;
+ int magic;
+
+ /*
+* For MMIO, get the physical address
+*/
+ reg = of_get_property(node, reg, NULL);
+ if (reg) {
+ addr = of_translate_address(node, reg);
+ if (addr != OF_BAD_ADDR) {
+ snprintf(name, BUS_ID_SIZE,
+%llx.%s, (unsigned long long)addr,
+node-name);
+ return;
+ }
+ }
+
+ /*
+* No BusID, use the node name and add a globally incremented
+* counter (and pray...)
+*/
+ magic = atomic_add_return(1, bus_no_reg_magic);
+ snprintf(name, BUS_ID_SIZE, %s.%d, node-name, magic - 1);
+}
+EXPORT_SYMBOL(of_device_make_bus_id);
diff --git a/arch/microblaze/platform/platform.c
b/arch/microblaze/platform/platform.c
new file mode 100644
index 000..fa0edaf
--- /dev/null
+++ b/arch/microblaze/platform/platform.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2008 Michal Simek [EMAIL PROTECTED]
+ *
+ * based on virtex.c file
+ *
+ * Copyright 2007 Secret Lab Technologies Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/init.h
+#include linux/of_platform.h
+#include asm/prom.h
+
+static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+ { .compatible = simple-bus, },
+ { .compatible = xlnx,plb-v46-1.00.a, },
+ { .compatible = xlnx,opb-v20-1.10.c, },
+ { .compatible = xlnx,opb-v20-1.10.b, },
+ { .compatible = xlnx,compound, },
+ {}
+};
+
+int __init microblaze_device_probe(void)
+{
+ of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
+ return 0;
+}
+device_initcall(microblaze_device_probe);
--
1.5.4.GIT
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[PATCH] [POWERPC] 85xx: TQM8548: add missing support for RTC and LM75
It adds the missing RTC node to tqm8548.dts and enables support for
I2C, DS1307 and LM75 in the default configuration.
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/tqm8548.dts |5
arch/powerpc/configs/85xx/tqm8548_defconfig | 143 ++--
2 files changed, 142 insertions(+), 6 deletions(-)
Index: linux-2.6-galak/arch/powerpc/boot/dts/tqm8548.dts
===
--- linux-2.6-galak.orig/arch/powerpc/boot/dts/tqm8548.dts
+++ linux-2.6-galak/arch/powerpc/boot/dts/tqm8548.dts
@@ -83,6 +83,11 @@
interrupts = 43 2;
interrupt-parent = mpic;
dfsrr;
+
+ [EMAIL PROTECTED] {
+ compatible = dallas,ds1337;
+ reg = 0x68;
+ };
};
[EMAIL PROTECTED] {
Index: linux-2.6-galak/arch/powerpc/configs/85xx/tqm8548_defconfig
===
--- linux-2.6-galak.orig/arch/powerpc/configs/85xx/tqm8548_defconfig
+++ linux-2.6-galak/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.26-rc4
-# Tue Jun 3 14:39:30 2008
+# Linux kernel version: 2.6.26-rc5
+# Thu Jun 26 14:40:02 2008
#
# CONFIG_PPC64 is not set
@@ -15,6 +15,7 @@ CONFIG_PPC_85xx=y
# CONFIG_44x is not set
# CONFIG_E200 is not set
CONFIG_E500=y
+# CONFIG_PPC_E500MC is not set
CONFIG_BOOKE=y
CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y
@@ -470,6 +471,7 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
#
# CONFIG_MTD_UBI_DEBUG is not set
CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
@@ -734,31 +736,111 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828
[PATCH 20/60] microblaze_v4: early_printk support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/early_printk.c | 130 +
1 files changed, 130 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/early_printk.c
diff --git a/arch/microblaze/kernel/early_printk.c
b/arch/microblaze/kernel/early_printk.c
new file mode 100644
index 000..6da0fd9
--- /dev/null
+++ b/arch/microblaze/kernel/early_printk.c
@@ -0,0 +1,130 @@
+/*
+ * Early printk support for Microblaze.
+ *
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2003-2006 Yasushi SHOJI [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/* FIXME Once we got some system without uart light, we need to refactor */
+
+#include linux/console.h
+#include linux/kernel.h
+#include linux/init.h
+#include linux/string.h
+#include linux/tty.h
+#include asm/io.h
+#include asm/processor.h
+#include asm/fcntl.h
+#include asm/setup.h
+
+#ifdef CONFIG_EARLY_PRINTK
+#define BASE_ADDR ((unsigned char *)CONFIG_EARLY_PRINTK_UARTLITE_ADDRESS)
+
+#define RX_FIFOBASE_ADDR
+#define TX_FIFO((unsigned long *)(BASE_ADDR + 4))
+#define STATUS ((unsigned long *)(BASE_ADDR + 8))
+#define CONTROL((unsigned long *)(BASE_ADDR + 12))
+
+static void early_printk_putc(char c)
+{
+ /*
+* Limit how many times we'll spin waiting for TX FIFO status.
+* This will prevent lockups if the base address is incorrectly
+* set, or any other issue on the UARTLITE.
+* This limit is pretty arbitrary, unless we are at about 10 baud
+* we'll never timeout on a working UART.
+*/
+
+ unsigned retries = 1;
+ while (retries-- (ioread32(STATUS) (13)))
+ ;
+
+ /* Only attempt the iowrite if we didn't timeout */
+ if (retries)
+ iowrite32((c 0xff), TX_FIFO);
+}
+
+static void early_printk_write(struct console *unused,
+ const char *s, unsigned n)
+{
+ while (*s n-- 0) {
+ early_printk_putc(*s);
+ if (*s == '\n')
+ early_printk_putc('\r');
+ s++;
+ }
+}
+
+static struct console early_serial_console = {
+ .name = earlyser,
+ .write = early_printk_write,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+};
+
+/* Direct interface for emergencies */
+static struct console *early_console = early_serial_console;
+static int early_console_initialized;
+
+void early_printk(const char *fmt, ...)
+{
+ char buf[512];
+ int n;
+ va_list ap;
+
+ if (early_console_initialized) {
+ va_start(ap, fmt);
+ n = vscnprintf(buf, 512, fmt, ap);
+ early_console-write(early_console, buf, n);
+ va_end(ap);
+ }
+}
+
+static int __initdata keep_early;
+
+int __init setup_early_printk(char *opt)
+{
+ char *space;
+ char buf[256];
+
+ if (early_console_initialized)
+ return 1;
+
+ strlcpy(buf, opt, sizeof(buf));
+ space = strchr(buf, ' ');
+ if (space)
+ *space = 0;
+
+ if (strstr(buf, keep))
+ keep_early = 1;
+
+ early_console = early_serial_console;
+ early_console_initialized = 1;
+ register_console(early_console);
+ return 0;
+}
+#if 0
+static void __init disable_early_printk(void)
+{
+ if (!early_console_initialized || !early_console)
+ return;
+ if (!keep_early) {
+ printk(KERN_INFO disabling early console\n);
+ unregister_console(early_console);
+ early_console_initialized = 0;
+ } else
+ printk(KERN_INFO keeping early console\n);
+}
+#endif
+
+__setup(earlyprintk=, setup_early_printk);
+
+#else
+void early_printk(const char *fmt, ...)
+{
+}
+#endif
--
1.5.4.GIT
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
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[PATCH 17/60] microblaze_v4: head.S + linker script
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/head.S| 38 +
arch/microblaze/kernel/vmlinux.lds.S | 143 ++
2 files changed, 181 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/head.S
create mode 100644 arch/microblaze/kernel/vmlinux.lds.S
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
new file mode 100644
index 000..8f87626
--- /dev/null
+++ b/arch/microblaze/kernel/head.S
@@ -0,0 +1,38 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ */
+
+#include linux/linkage.h
+#include asm/thread_info.h
+
+ .text
+ENTRY(_start)
+ mfs r1, rmsr
+ andir1, r1, ~2
+ mts rmsr, r1
+
+ /* Initialize small data anchors */
+ la r13, r0, _KERNEL_SDA_BASE_
+ la r2, r0, _KERNEL_SDA2_BASE_
+
+ /* Initialize stack pointer */
+ la r1, r0, init_thread_union + THREAD_SIZE - 4
+
+ /* Initialize r31 with current task address */
+ la r31, r0, init_task
+
+ /* Call platform dependent initialize function.
+* Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
+* the function. */
+ la r8, r0, machine_early_init
+ brald r15, r8
+ nop
+
+ la r15, r0, machine_halt
+ braid start_kernel
+ nop
diff --git a/arch/microblaze/kernel/vmlinux.lds.S
b/arch/microblaze/kernel/vmlinux.lds.S
new file mode 100644
index 000..f31e7ef
--- /dev/null
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -0,0 +1,143 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+OUTPUT_FORMAT(elf32-microblaze, elf32-microblaze, elf32-microblaze)
+OUTPUT_ARCH(microblaze)
+ENTRY(_start)
+
+#include linux/autoconf.h
+#include asm-generic/vmlinux.lds.h
+
+jiffies = jiffies_64 + 4;
+
+SECTIONS {
+ . = CONFIG_KERNEL_BASE_ADDR;
+
+ .text : {
+ _text = . ;
+ _stext = . ;
+ TEXT_TEXT
+ SCHED_TEXT
+ LOCK_TEXT
+ . = ALIGN (4) ;
+ _etext = . ;
+ }
+
+ . = ALIGN(16);
+ RODATA
+
+ /* sdata2 section can go anywhere, but must be word aligned
+and SDA2_BASE must point to the middle of it */
+ .sdata2 : {
+ _ssrw = .;
+ . = ALIGN(0x8);
+ *(.sdata2)
+ . = ALIGN(8);
+ _essrw = .;
+ _ssrw_size = _essrw - _ssrw;
+ _KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2);
+ }
+
+ _sdata = . ;
+ .data ALIGN (0x4) : {
+ DATA_DATA
+ }
+ . = ALIGN(32);
+ .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+ _edata = . ;
+
+ /* The initial task */
+ . = ALIGN(8192);
+ .data.init_task : { *(.data.init_task) }
+
+ /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
+ . = ALIGN(8);
+ .sdata : {
+ _ssro = .;
+ *(.sdata)
+ }
+
+ .sbss : {
+ _ssbss = .;
+ *(.sbss)
+ _esbss = .;
+ _essro = .;
+ _ssro_size = _essro - _ssro ;
+ _KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
+ }
+
+ . = ALIGN(16);
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ __init_begin = .;
+
+ . = ALIGN(4096);
+ .init.text : {
+ _sinittext = . ;
+ *(.init.text)
+ *(.exit.text)
+ *(.exit.data)
+ _einittext = .;
+ }
+
+ .init.data : { *(.init.data) }
+
+ . = ALIGN(4);
+ .init.ivt : {
+ __ivt_start = .;
+ *(.init.ivt)
+ __ivt_end = .;
+ }
+
+ .init.setup : {
+ __setup_start = .;
+ *(.init.setup)
+ __setup_end = .;
+ }
+
+ .initcall.init : {
+ __initcall_start = .;
+ INITCALLS
+ __initcall_end = .;
+ }
+
+ .con_initcall.init : {
+ __con_initcall_start = .;
+ *(.con_initcall.init)
+ __con_initcall_end = .;
+ }
+
+ __init_end_before_initramfs = .;
+
+ .init.ramfs ALIGN(4096) : {
+ __initramfs_start = .;
+ *(.init.ramfs)
+ __initramfs_end = .;
+ . = ALIGN(4);
+ LONG(0);
+ . = ALIGN(4096);/* Pad
[PATCH 02/60] microblaze_v4: Makefiles for Microblaze cpu
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- arch/microblaze/Makefile | 63 + arch/microblaze/boot/Makefile | 17 arch/microblaze/kernel/Makefile | 17 arch/microblaze/kernel/cpu/Makefile |8 arch/microblaze/lib/Makefile |5 ++ arch/microblaze/mm/Makefile |5 ++ arch/microblaze/platform/Makefile |6 +++ arch/microblaze/platform/generic/Makefile |3 + 8 files changed, 124 insertions(+), 0 deletions(-) create mode 100644 arch/microblaze/Makefile create mode 100644 arch/microblaze/boot/Makefile create mode 100644 arch/microblaze/kernel/Makefile create mode 100644 arch/microblaze/kernel/cpu/Makefile create mode 100644 arch/microblaze/lib/Makefile create mode 100644 arch/microblaze/mm/Makefile create mode 100644 arch/microblaze/platform/Makefile create mode 100644 arch/microblaze/platform/generic/Makefile diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile new file mode 100644 index 000..7e9e1b4 --- /dev/null +++ b/arch/microblaze/Makefile @@ -0,0 +1,63 @@ +UTS_SYSNAME = -DUTS_SYSNAME=\uClinux\ + +# What CPU vesion are we building for, and crack it open +# as major.minor.rev +CPU_VER=$(subst ,,$(CONFIG_XILINX_MICROBLAZE0_HW_VER) ) +CPU_MAJOR=$(shell echo $(CPU_VER) | cut -d '.' -f 1) +CPU_MINOR=$(shell echo $(CPU_VER) | cut -d '.' -f 2) +CPU_REV=$(shell echo $(CPU_VER) | cut -d '.' -f 3) + +export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV + +# Use cpu-related CONFIG_ vars to set compile options. + +# Work out HW multipler support. This is icky. +# 1. Spartan2 has no HW multiplers. +# 2. MicroBlaze v3.x always uses them, except in Spartan 2 +# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings +ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) + ifeq ($(CPU_MAJOR),3) +CPUFLAGS-1 += -mno-xl-soft-mul + else +# USE_HW_MUL can be 0, 1, or 2, defining a heirarchy of HW Mul support. +CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul + endif +endif +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP) += -mxl-pattern-compare + +CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER)) + +# The various CONFIG_XILINX cpu features options are integers 0/1/2... +# rather than bools y/n +CFLAGS += $(CPUFLAGS-1) +CFLAGS += $(CPUFLAGS-2) + +# r31 holds current when in kernel mode +CFLAGS += -ffixed-r31 + +LDFLAGS_BLOB := --format binary --oformat elf32-microblaze + +LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) + +head-y := arch/microblaze/kernel/head.o +libs-y += arch/microblaze/lib/ $(LIBGCC) +core-y += arch/microblaze/kernel/ arch/microblaze/mm/ \ + arch/microblaze/platform/ + +boot := arch/$(ARCH)/boot + +all: linux.bin + +archclean: + $(Q)$(MAKE) $(clean)=$(boot) + +linux.bin linux.bin.gz: vmlinux + $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ + +define archhelp + echo '* linux.bin- Create raw binary' + echo ' linux.bin.gz - Create compressed raw binary' +endef diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile new file mode 100644 index 000..844edf4 --- /dev/null +++ b/arch/microblaze/boot/Makefile @@ -0,0 +1,17 @@ +# +# arch/microblaze/boot/Makefile +# + +targets := linux.bin linux.bin.gz + +OBJCOPYFLAGS_linux.bin := -O binary + +$(obj)/linux.bin: vmlinux FORCE + $(call if_changed,objcopy) + @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' + +$(obj)/linux.bin.gz: $(obj)/linux.bin FORCE + $(call if_changed,gzip) + @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' + +clean-kernel += linux.bin linux.bin.gz diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile new file mode 100644 index 000..f7a6bb8 --- /dev/null +++ b/arch/microblaze/kernel/Makefile @@ -0,0 +1,17 @@ +# +# Makefile +# + +extra-y := head.o vmlinux.lds + +obj-y += entry.o exceptions.o \ + hw_exception_handler.o init_task.o intc.o irq.o of_device.o \ + process.o prom.o ptrace.o \ + setup.o signal.o sys_microblaze.o timer.o traps.o + +obj-y += cpu/ + +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +obj-$(CONFIG_SELFMOD) += selfmod.o +obj-$(CONFIG_HEART_BEAT) += heartbeat.o +obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile new file mode 100644 index 000..20646e5 --- /dev/null +++ b/arch/microblaze/kernel/cpu/Makefile @@ -0,0 +1,8 @@ +# +# Build the appropriate CPU version support +# + +EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \ +
[PATCH 15/60] microblaze_v4: PVR support, cpuinfo support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/cpu/mb.c | 115 ++
arch/microblaze/kernel/cpu/pvr.c | 81 ++
2 files changed, 196 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/cpu/mb.c
create mode 100644 arch/microblaze/kernel/cpu/pvr.c
diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
new file mode 100644
index 000..0124112
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -0,0 +1,115 @@
+/*
+ * CPU-version specific code
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 PetaLogix
+ */
+
+#include linux/init.h
+#include linux/string.h
+#include linux/seq_file.h
+#include linux/cpu.h
+#include linux/initrd.h
+
+#include asm/cpuinfo.h
+#include asm/setup.h
+#include asm/sections.h
+#include asm/page.h
+#include asm/io.h
+#include asm/bug.h
+#include asm/param.h
+#include asm/delay.h
+
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+ int count = 0;
+ char *fpga_family = Unknown;
+ char *cpu_ver = Unknown;
+ int i;
+ printk(%s\n, __func__);
+
+ /* Denormalised to get the fpga family string */
+ for (i = 0; family_string_lookup[i].s != NULL; i++) {
+ if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
+ fpga_family = (char *)family_string_lookup[i].s;
+ break;
+ }
+ }
+
+ /* Denormalised to get the hw version string */
+ for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
+ if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
+ cpu_ver = (char *)cpu_ver_lookup[i].s;
+ break;
+ }
+ }
+
+ count = seq_printf(m,
+ CPU-Family:MicroBlaze\n
+ FPGA-Arch: %s\n
+ CPU-Ver: %s\n
+ CPU-MHz: %d.%02d\n
+ BogoMips: %lu.%02lu\n,
+ fpga_family,
+ cpu_ver,
+ cpuinfo.cpu_clock_freq /
+ 100,
+ cpuinfo.cpu_clock_freq %
+ 100,
+ loops_per_jiffy / (50 / HZ),
+ (loops_per_jiffy / (5000 / HZ)) % 100);
+
+ count += seq_printf(m,
+ HW-Div:\t\t%s\n
+ HW-Shift:\t%s\n,
+ cpuinfo.use_divider ? yes : no,
+ cpuinfo.use_barrel ? yes : no);
+
+ if (cpuinfo.use_icache)
+ count += seq_printf(m,
+ Icache:\t\t%ukB\n,
+ cpuinfo.icache_size 10);
+ else
+ count += seq_printf(m, Icache:\t\tno\n);
+
+ if (cpuinfo.use_dcache)
+ count += seq_printf(m,
+ Dcache:\t\t%ukB\n,
+ cpuinfo.dcache_size 10);
+ else
+ count += seq_printf(m, Dcache:\t\tno\n);
+
+ count += seq_printf(m,
+ HW-Debug:\t%s\n,
+ cpuinfo.hw_debug ? yes : no);
+
+ return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+ int i = *pos;
+
+ return i NR_CPUS ? (void *) (i + 1) : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+ ++*pos;
+ return c_start(m, pos);
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+struct seq_operations cpuinfo_op = {
+ .start = c_start,
+ .next = c_next,
+ .stop = c_stop,
+ .show = show_cpuinfo,
+};
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
new file mode 100644
index 000..0b117bd
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -0,0 +1,81 @@
+/*
+ * Support for MicroBlaze PVR (processor version register)
+ *
+ * Copyright (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2007 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/kernel.h
+#include linux/compiler.h
+#include asm/system.h
+#include asm/exceptions.h
+#include asm/pvr.h
+
+/*
+ * Until we get an assembler that knows about the pvr registers,
+ * this horrible cruft will have to do.
+ * That hardcoded opcode is mfs r3, rpvrNN
+ */
+
+#define get_single_pvr(pvrid, val) \
+{
[PATCH 23/60] microblaze_v4: setup.c - system setting
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/setup.c | 187
1 files changed, 187 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/setup.c
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
new file mode 100644
index 000..95d6eae
--- /dev/null
+++ b/arch/microblaze/kernel/setup.c
@@ -0,0 +1,187 @@
+/*
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/init.h
+#include linux/string.h
+#include linux/seq_file.h
+#include linux/cpu.h
+#include linux/initrd.h
+#include linux/console.h
+#include linux/debugfs.h
+
+#include asm/setup.h
+#include asm/sections.h
+#include asm/page.h
+#include asm/io.h
+#include asm/bug.h
+#include asm/param.h
+#include asm/cache.h
+#include asm/cacheflush.h
+#include asm/entry.h
+#include asm/cpuinfo.h
+
+#include asm/system.h
+#include asm/prom.h
+#include asm/pgtable.h
+
+DEFINE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
+DEFINE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
+DEFINE_PER_CPU(unsigned int, ENTRY_SP);/* Saved SP on kernel entry */
+DEFINE_PER_CPU(unsigned int, R11_SAVE);/* Temp variable for entry */
+DEFINE_PER_CPU(unsigned int, CURRENT_SAVE);/* Saved current pointer */
+
+int have_of = 1;
+unsigned int boot_cpuid;
+char cmd_line[COMMAND_LINE_SIZE];
+static char default_command_line[COMMAND_LINE_SIZE] __initdata =
CONFIG_CMDLINE;
+
+void __init setup_arch(char **cmdline_p)
+{
+ console_verbose();
+
+ unflatten_device_tree();
+ /* NOTE I think that this function is not necessary to call */
+ /* irq_early_init(); */
+ setup_cpuinfo();
+
+ __invalidate_icache_all();
+ __enable_icache();
+
+ __invalidate_dcache_all();
+ __enable_dcache();
+
+ panic_timeout = 120;
+
+ setup_memory();
+ paging_init();
+
+#if defined(CONFIG_SELFMOD_INTC) || defined(CONFIG_SELFMOD_TIMER)
+ printk(KERN_NOTICE Self modified code enable\n);
+#endif
+
+#ifdef CONFIG_VT
+#if defined(CONFIG_XILINX_CONSOLE)
+ conswitchp = xil_con;
+#elif defined(CONFIG_DUMMY_CONSOLE)
+ conswitchp = dummy_con;
+#endif
+#endif
+}
+
+#ifdef CONFIG_MTD_UCLINUX
+/* Handle both romfs and cramfs types, without generating unnecessary
+ code (ie no point checking for CRAMFS if it's not even enabled) */
+inline unsigned get_romfs_len(unsigned *addr)
+{
+#ifdef CONFIG_ROMFS_FS
+ if (memcmp(addr[0], -rom1fs-, 8) == 0) /* romfs */
+ return be32_to_cpu(addr[2]);
+#endif
+
+#ifdef CONFIG_CRAMFS
+ if (addr[0] == le32_to_cpu(0x28cd3d45)) /* cramfs */
+ return le32_to_cpu(addr[1]);
+#endif
+ return 0;
+}
+#endif /* CONFIG_MTD_UCLINUX_EBSS */
+
+void __init machine_early_init(const char *cmdline, unsigned int ram,
+ unsigned int fdt)
+{
+ unsigned long *src, *dst = (unsigned long *)0x0;
+ early_printk(Ramdisk addr 0x%08x, FDT 0x%08x\n, ram, fdt);
+
+#ifdef CONFIG_MTD_UCLINUX
+ {
+ int size;
+ unsigned int romfs_base;
+ romfs_base = (ram ? ram : (unsigned int)__init_end);
+ /* if CONFIG_MTD_UCLINUX_EBSS is defined, assume ROMFS is at the
+* end of kernel, which is ROMFS_LOCATION defined above. */
+ size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
+ early_printk(Found romfs @ 0x%08x (0x%08x)\n,
+ romfs_base, size);
+ early_printk( klimit %p \n, klimit);
+ BUG_ON(size 0); /* What else can we do? */
+
+ /* Use memmove to handle likely case of memory overlap */
+ early_printk(Moving 0x%08x bytes from 0x%08x to 0x%08x\n,
+ size, romfs_base, (unsigned)_ebss);
+ memmove(_ebss, (int *)romfs_base, size);
+
+ /* update klimit */
+ klimit += PAGE_ALIGN(size);
+ early_printk(New klimit: 0x%08x\n, (unsigned)klimit);
+ }
+#endif
+
+ memset(__bss_start, 0, __bss_stop-__bss_start);
+ memset(_ssbss, 0, _esbss-_ssbss);
+
+ printk(KERN_NOTICE Found FDT at 0x%08x\n, fdt);
+ early_init_devtree((void *)fdt);
+
+ /* Copy command line passed from bootloader, or use default
+if none provided, or forced */
+#ifndef CONFIG_CMDLINE_FORCE
+ if (cmdline cmdline[0] != '\0')
+ strlcpy(cmd_line, cmdline, COMMAND_LINE_SIZE);
+ else
+#endif
+ strlcpy(cmd_line, default_command_line, COMMAND_LINE_SIZE);
+
+ for (src = __ivt_start; src __ivt_end; src++, dst++)
+ *dst
[PATCH 24/60] microblaze_v4: asm-offsets
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/asm-offsets.c | 116 ++
1 files changed, 116 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/asm-offsets.c
diff --git a/arch/microblaze/kernel/asm-offsets.c
b/arch/microblaze/kernel/asm-offsets.c
new file mode 100644
index 000..522f8ff
--- /dev/null
+++ b/arch/microblaze/kernel/asm-offsets.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2007 PetaLogix
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include linux/stddef.h
+#include linux/sched.h
+#include linux/kernel_stat.h
+#include linux/ptrace.h
+#include linux/hardirq.h
+#include linux/thread_info.h
+
+#define DEFINE(sym, val) asm volatile(\n- #sym %0 #val : : i (val))
+#define BLANK() asm volatile(\n- : :)
+
+int main(int argc, char *argv[])
+{
+ /* struct pt_regs */
+ DEFINE(PT_SIZE, sizeof(struct pt_regs));
+ DEFINE(PT_MSR, offsetof(struct pt_regs, msr));
+ DEFINE(PT_EAR, offsetof(struct pt_regs, ear));
+ DEFINE(PT_ESR, offsetof(struct pt_regs, esr));
+ DEFINE(PT_FSR, offsetof(struct pt_regs, fsr));
+ DEFINE(PT_PC, offsetof(struct pt_regs, pc));
+ DEFINE(PT_R0, offsetof(struct pt_regs, r0));
+ DEFINE(PT_R1, offsetof(struct pt_regs, r1));
+ DEFINE(PT_R2, offsetof(struct pt_regs, r2));
+ DEFINE(PT_R3, offsetof(struct pt_regs, r3));
+ DEFINE(PT_R4, offsetof(struct pt_regs, r4));
+ DEFINE(PT_R5, offsetof(struct pt_regs, r5));
+ DEFINE(PT_R6, offsetof(struct pt_regs, r6));
+ DEFINE(PT_R7, offsetof(struct pt_regs, r7));
+ DEFINE(PT_R8, offsetof(struct pt_regs, r8));
+ DEFINE(PT_R9, offsetof(struct pt_regs, r9));
+ DEFINE(PT_R10, offsetof(struct pt_regs, r10));
+ DEFINE(PT_R11, offsetof(struct pt_regs, r11));
+ DEFINE(PT_R12, offsetof(struct pt_regs, r12));
+ DEFINE(PT_R13, offsetof(struct pt_regs, r13));
+ DEFINE(PT_R14, offsetof(struct pt_regs, r14));
+ DEFINE(PT_R15, offsetof(struct pt_regs, r15));
+ DEFINE(PT_R16, offsetof(struct pt_regs, r16));
+ DEFINE(PT_R17, offsetof(struct pt_regs, r17));
+ DEFINE(PT_R18, offsetof(struct pt_regs, r18));
+ DEFINE(PT_R19, offsetof(struct pt_regs, r19));
+ DEFINE(PT_R20, offsetof(struct pt_regs, r20));
+ DEFINE(PT_R21, offsetof(struct pt_regs, r21));
+ DEFINE(PT_R22, offsetof(struct pt_regs, r22));
+ DEFINE(PT_R23, offsetof(struct pt_regs, r23));
+ DEFINE(PT_R24, offsetof(struct pt_regs, r24));
+ DEFINE(PT_R25, offsetof(struct pt_regs, r25));
+ DEFINE(PT_R26, offsetof(struct pt_regs, r26));
+ DEFINE(PT_R27, offsetof(struct pt_regs, r27));
+ DEFINE(PT_R28, offsetof(struct pt_regs, r28));
+ DEFINE(PT_R29, offsetof(struct pt_regs, r29));
+ DEFINE(PT_R30, offsetof(struct pt_regs, r30));
+ DEFINE(PT_R31, offsetof(struct pt_regs, r31));
+ DEFINE(PT_MODE, offsetof(struct pt_regs, kernel_mode));
+ BLANK();
+
+ /* Magic offsets for PTRACE PEEK/POKE etc */
+ DEFINE(PT_TEXT_ADDR, sizeof(struct pt_regs) + 1);
+ DEFINE(PT_TEXT_LEN, sizeof(struct pt_regs) + 2);
+ DEFINE(PT_DATA_ADDR, sizeof(struct pt_regs) + 3);
+ BLANK();
+
+ /* struct task_struct */
+ DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack));
+
+ /* struct thread_info */
+ DEFINE(TI_TASK, offsetof(struct thread_info, task));
+ DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
+ DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
+ DEFINE(TI_STATUS, offsetof(struct thread_info, status));
+ DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
+ DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
+ DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
+ DEFINE(TI_RESTART_BLOCK, offsetof(struct thread_info, restart_block));
+ DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
+ BLANK();
+
+ /* struct cpu_context */
+ DEFINE(CC_SP, offsetof(struct cpu_context, r1)); /* r1 */
+ DEFINE(CC_R2, offsetof(struct cpu_context, r2));
+ /* dedicated registers */
+ DEFINE(CC_R13, offsetof(struct cpu_context, r13));
+ DEFINE(CC_R14, offsetof(struct cpu_context, r14));
+ DEFINE(CC_R15, offsetof(struct cpu_context, r15));
+ DEFINE(CC_R16, offsetof(struct cpu_context, r16));
+ DEFINE(CC_R17, offsetof(struct cpu_context, r17));
+ DEFINE(CC_R18, offsetof(struct cpu_context, r18));
+ /* non-volatile registers */
+ DEFINE(CC_R19, offsetof(struct cpu_context, r19));
+ DEFINE(CC_R20, offsetof(struct cpu_context, r20));
+ DEFINE(CC_R21,
[PATCH 13/60] microblaze_v4: kernel modules support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/microblaze_ksyms.c | 47 ++
arch/microblaze/kernel/module.c | 140 +
include/asm-microblaze/module.h | 37
3 files changed, 224 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/microblaze_ksyms.c
create mode 100644 arch/microblaze/kernel/module.c
create mode 100644 include/asm-microblaze/module.h
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c
b/arch/microblaze/kernel/microblaze_ksyms.c
new file mode 100644
index 000..297cd68
--- /dev/null
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008 Michal Simek [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include linux/module.h
+#include linux/string.h
+#include linux/cryptohash.h
+#include linux/delay.h
+#include linux/in6.h
+#include linux/syscalls.h
+
+#include asm/checksum.h
+#include asm/io.h
+#include asm/page.h
+#include asm/system.h
+#include asm/uaccess.h
+
+/*
+ * libgcc functions - functions that are used internally by the
+ * compiler... (prototypes are not correct though, but that
+ * doesn't really matter since they're not versioned).
+ */
+extern void __ashldi3(void);
+EXPORT_SYMBOL(__ashldi3);
+extern void __ashrdi3(void);
+EXPORT_SYMBOL(__ashrdi3);
+extern void __divsi3(void);
+EXPORT_SYMBOL(__divsi3);
+extern void __lshrdi3(void);
+EXPORT_SYMBOL(__lshrdi3);
+extern void __modsi3(void);
+EXPORT_SYMBOL(__modsi3);
+extern void __mulsi3(void);
+EXPORT_SYMBOL(__mulsi3);
+extern void __muldi3(void);
+EXPORT_SYMBOL(__muldi3);
+extern void __ucmpdi2(void);
+EXPORT_SYMBOL(__ucmpdi2);
+extern void __udivsi3(void);
+EXPORT_SYMBOL(__udivsi3);
+extern void __umodsi3(void);
+EXPORT_SYMBOL(__umodsi3);
+/*extern void fpundefinstr(void);
+extern void fp_enter(void);*/
diff --git a/arch/microblaze/kernel/module.c b/arch/microblaze/kernel/module.c
new file mode 100644
index 000..a59b2e5
--- /dev/null
+++ b/arch/microblaze/kernel/module.c
@@ -0,0 +1,140 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include linux/module.h
+#include linux/moduleloader.h
+#include linux/kernel.h
+#include linux/elf.h
+#include linux/vmalloc.h
+#include linux/slab.h
+#include linux/fs.h
+#include linux/string.h
+
+#include asm/pgtable.h
+
+#undef DEBUG
+
+void *module_alloc(unsigned long size)
+{
+ void *ret;
+ ret = (size == 0) ? NULL : vmalloc(size);
+ pr_debug(module_alloc ([EMAIL PROTECTED])\n, size, (unsigned long
int)ret);
+ return ret;
+}
+
+void module_free(struct module *module, void *region)
+{
+ pr_debug(module_free(%s,%08lx)\n, module-name,
+ (unsigned long)region);
+ vfree(region);
+}
+
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+ Elf_Shdr *sechdrs,
+ char *secstrings,
+ struct module *mod)
+{
+ return 0;
+}
+
+int apply_relocate(Elf32_Shdr *sechdrs, const char *strtab,
+ unsigned int symindex, unsigned int relsec, struct module *module)
+{
+
+ printk(KERN_ERR module %s: ADD RELOCATION unsupported\n,
+ module-name);
+ return -ENOEXEC;
+
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
+ unsigned int symindex, unsigned int relsec, struct module *module)
+{
+
+ unsigned int i;
+ Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
+ Elf32_Sym *sym;
+ unsigned long int *location;
+ unsigned long int locoffs;
+ unsigned long int value;
+ unsigned long int old_value;
+
+ pr_debug(Applying add relocation section %u to %u\n,
+ relsec, sechdrs[relsec].sh_info);
+
+ for (i = 0; i sechdrs[relsec].sh_size / sizeof(*rela); i++) {
+
+ location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr +
+ rela[i].r_offset;
+ sym = (Elf32_Sym *)sechdrs[symindex].sh_addr +
+ ELF32_R_SYM(rela[i].r_info);
+ value = sym-st_value + rela[i].r_addend;
+
+ switch (ELF32_R_TYPE(rela[i].r_info)) {
+
+ /*
+* Be careful! mb-gcc / mb-ld splits the relocs between the
+* text and the reloc table. In general this means we must
+* read the current contents of (*location), add any offset
+* then store the result back in
+*/
+
+ case R_MICROBLAZE_32:
+ old_value = *location;
+
RE: [PATCH] powerpc/bootwrapper: Add documentation of boot wrapper targets
Thanks Grant, that's a great start for helping us to better understand the bootwrapper. The wrapper is somewhat complex and hard to get your head around, or at least my head ;). -- John -Original Message- From: Grant Likely [mailto:[EMAIL PROTECTED] Sent: Wednesday, June 25, 2008 2:21 PM To: John Linn; Stephen Neuendorffer; [EMAIL PROTECTED]; [EMAIL PROTECTED] Cc: [EMAIL PROTECTED] Subject: [PATCH] powerpc/bootwrapper: Add documentation of boot wrapper targets From: Grant Likely [EMAIL PROTECTED] There have been many questions on and off the mailing list about how exactly the bootwrapper is used for embedded targets. Add some documentation and help text to try and clarify the system. Signed-off-by: Grant Likely [EMAIL PROTECTED] --- Documentation/powerpc/bootwrapper.txt | 78 + arch/powerpc/Makefile | 15 ++ arch/powerpc/boot/wrapper |4 ++ 3 files changed, 96 insertions(+), 1 deletions(-) diff --git a/Documentation/powerpc/bootwrapper.txt b/Documentation/powerpc/bootwrapper.txt new file mode 100644 index 000..8dcb560 --- /dev/null +++ b/Documentation/powerpc/bootwrapper.txt @@ -0,0 +1,78 @@ +The PowerPC boot wrapper + +Copyright (C) Secret Lab Technologies Ltd. + +PowerPC image targets compresses and wraps the kernel image (vmlinux) with +a boot wrapper to make it usable by the system firmware. There is no +standard PowerPC firmware interface, so the boot wrapper is designed to +be adaptable for each kind of image that needs to be built. + +The boot wrapper can be found in the arch/powerpc/boot/ directory. The +Makefile in that directory has targets for all the available image types. +Currently, the following image targets exist: + + cuImage.%: Backwards compatible uImage for older version of + U-Boot (for versions that don't understand the device + tree). This image embeds a device tree blob inside + the image. + dtbImage.%: Similar to zImage, except device tree blob is embedded + inside the image. + simpleImage.%: Firmware independent compressed image that does not + depend on any particular firmware interface and embeds + a device tree blob. This image can be loaded to any + location in RAM and jumped to. Firmware cannot pass + any configuration data to the kernel with this image + type and the kernel depends on the device tree to + determine its console device. + treeImage.%;Image format for some versions of ppc4xx firmware (non + U-Boot firmware). This image embeds a device tree + blob inside the image. + uImage: Native image format used by U-Boot. The uImage target + does not add any boot code. It just wraps a compressed + vmlinux in the uImage data structure. + zImage.%: Image usable by OpenFirmware. Image expects firmware + to provide the device tree using OpenFirmware + interfaces. Typically general purpose hardware uses + this image format. + +Image types which embed a device tree blob (simpleImage, dtbImage, treeImage, +and cuImage) all generate the device tree blob from a file in the +arch/powerpc/boot/dts/ directory. The Makefile selects the correct device +tree source based on the name of the target. Therefore, if the kernel is +built with 'make treeImage.walnut simpleImage.virtex405-ml403', then the +build system will use arch/powerpc/boot/dts/walnut.dts to build +treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build +the simpleImage.virtex405-ml403. + +Two special targets called 'zImage' and 'zImage.initrd' also exist. These +targets build all the default images as selected by the kernel configuration. +Default images are selected by the boot wrapper Makefile +(arch/powerpc/boot/Makefile) by adding targets to the $image-y variable. Look +at the Makefile to see which default image targets are available. + +How it is built +--- +arch/powerpc is designed to support multiplatform kernels, which means +that a single vmlinux image can be booted on many different target boards. +It also means that the boot wrapper must be able to wrap for many kinds of +images on a single build. The design decision was made to not use any +conditional compilation code (#ifdef, etc) in the boot wrapper source code. +All of the boot wrapper pieces are buildable at any time regardless of the +kernel configuration. Building all the wrapper bits on every kernel build +also ensures that obscure parts of the wrapper are at the very least compile +tested in a large variety of environments. + +The wrapper is adapted for
[PATCH 01/60] microblaze_v4: Kconfig patches
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- arch/microblaze/Kconfig | 157 + arch/microblaze/Kconfig.debug | 39 ++ arch/microblaze/platform/Kconfig.platform | 77 arch/microblaze/platform/generic/Kconfig.auto | 62 ++ 4 files changed, 335 insertions(+), 0 deletions(-) create mode 100644 arch/microblaze/Kconfig create mode 100644 arch/microblaze/Kconfig.debug create mode 100644 arch/microblaze/platform/Kconfig.platform create mode 100644 arch/microblaze/platform/generic/Kconfig.auto diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig new file mode 100644 index 000..0e9545b --- /dev/null +++ b/arch/microblaze/Kconfig @@ -0,0 +1,157 @@ +# For a description of the syntax of this configuration file, +# see Documentation/kbuild/kconfig-language.txt. + +mainmenu Linux/Microblaze Kernel Configuration + +config MICROBLAZE + def_bool y + select HAVE_LMB + +config MMU + def_bool n + +config SWAP + def_bool n + +config RWSEM_GENERIC_SPINLOCK + def_bool y + +config RWSEM_XCHGADD_ALGORITHM + bool + +config ARCH_HAS_ILOG2_U32 + def_bool n + +config ARCH_HAS_ILOG2_U64 + def_bool n + +config GENERIC_FIND_NEXT_BIT + def_bool y + +config GENERIC_HWEIGHT + def_bool y + +config GENERIC_HARDIRQS + def_bool y + +config GENERIC_IRQ_PROBE + def_bool y + +config GENERIC_CALIBRATE_DELAY + def_bool y + +config GENERIC_TIME + def_bool y + +config PCI + def_bool n + +config NO_DMA + def_bool y + +config GENERIC_CSUM + def_bool y + +config HZ + int + default 100 + +config DEFCONFIG_LIST + string + default arch/$ARCH/defconfig + +source init/Kconfig + +source arch/microblaze/platform/Kconfig.platform + +menu Processor type and features + +config PREEMPT + bool Preemptible Kernel + help + This option reduces the latency of the kernel when reacting to + real-time or interactive events by allowing a low priority process to + be preempted even if it is in kernel mode executing a system call. + This allows applications to run more reliably even when the system is + under load. + + Say Y here if you are building a kernel for a desktop, embedded + or real-time system. Say N if you are unsure. + +config PREEMPT_TIMES + bool Collect preemption latency times + depends on PREEMPT + help + Allow collection for preemption latency times. + +config LARGE_ALLOCS + bool Allow allocating large blocks ( 1MB) of memory + help + Allow the slab memory allocator to keep chains for very large + memory sizes - up to 32MB. You may need this if your system has + a lot of RAM, and you need to able to allocate very large + contiguous chunks. If unsure, say N. + +config GENERIC_CLOCKEVENTS + bool Clockevents - enable + default n + help + clock events + +comment Boot options + +config CMDLINE + string Default kernel command string + default + help + On some architectures there is currently no way for the boot loader + to pass arguments to the kernel. For these architectures, you should + supply some command-line options at build time by entering them + here. + +config CMDLINE_FORCE + bool Force default kernel command string + help + Set this to have arguments from the default kernel command string + override those passed by the boot loader. + +config OF + def_bool y + +config OF_DEVICE + def_bool y + +config PROC_DEVICETREE + bool Support for device tree in /proc + depends on PROC_FS + help + This option adds a device-tree directory under /proc which contains + an image of the device tree that the kernel copies from Open + Firmware or other boot firmware. If unsure, say Y here. + +endmenu + +config APM_EMULATION + bool + +source mm/Kconfig + +menu Exectuable file formats + +source fs/Kconfig.binfmt + +endmenu + +source net/Kconfig + +source drivers/Kconfig + +source fs/Kconfig + +source arch/microblaze/Kconfig.debug + +source security/Kconfig + +source crypto/Kconfig + +source lib/Kconfig diff --git a/arch/microblaze/Kconfig.debug b/arch/microblaze/Kconfig.debug new file mode 100644 index 000..611ef00 --- /dev/null +++ b/arch/microblaze/Kconfig.debug @@ -0,0 +1,39 @@ +# For a description of the syntax of this configuration file, +# see Documentation/kbuild/kconfig-language.txt. + +menu Kernel hacking + +source lib/Kconfig.debug + +config EARLY_PRINTK + bool Early printk function for kernel + default n + help + This option turns on/off early printk messages to console. + +config EARLY_PRINTK_UARTLITE_ADDRESS + hex Physical address where UART Lite
Re: [PATCH 46/60] microblaze_v4: termbits.h termios.h
+++ b/include/asm-generic/termbits.h @@ -0,0 +1,200 @@ +/* c_cflag bit meaning */ + +#define CBAUD0010017 +#define B0 000 /* hang up */ You need BOTHER in here as well - especially if it is going to be generic. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 12/60] microblaze_v4: Generic dts file for platforms
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/platform/generic/system.dts | 300 +++
1 files changed, 300 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/platform/generic/system.dts
diff --git a/arch/microblaze/platform/generic/system.dts
b/arch/microblaze/platform/generic/system.dts
new file mode 100644
index 000..724a037
--- /dev/null
+++ b/arch/microblaze/platform/generic/system.dts
@@ -0,0 +1,300 @@
+/*
+ * (C) Copyright 2007-2008 Xilinx, Inc.
+ * (C) Copyright 2007-2008 Michal Simek
+ *
+ * Michal SIMEK [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * CAUTION: This file is automatically generated by libgen.
+ * Version: Xilinx EDK 9.2.02 EDK_Jm_SP2.3
+ * Generate by FDT v1.00.a
+ */
+
+/ {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = xlnx,microblaze;
+ model = testing;
+ DDR_SDRAM_32Mx16: [EMAIL PROTECTED] {
+ device_type = memory;
+ reg = 2000 200 ;
+ } ;
+ chosen {
+ bootargs = console=ttyUL0,115200 loglevel=15;
+ linux,stdout-path = /[EMAIL PROTECTED]/[EMAIL PROTECTED];
+ } ;
+ cpus {
+ #address-cells = 1;
+ #cpus = 1;
+ #size-cells = 0;
+ microblaze_0: [EMAIL PROTECTED] {
+ clock-frequency = 2faf080;
+ compatible = xlnx,microblaze-7.00.a;
+ d-cache-baseaddr = 2000;
+ d-cache-highaddr = 21ff;
+ d-cache-line-size = 10;
+ d-cache-size = 4000;
+ device_type = cpu;
+ i-cache-baseaddr = 2000;
+ i-cache-highaddr = 21ff;
+ i-cache-line-size = 10;
+ i-cache-size = 4000;
+ model = microblaze,7.00.a;
+ reg = 0;
+ timebase-frequency = 2faf080;
+ xlnx,addr-tag-bits = b;
+ xlnx,allow-dcache-wr = 1;
+ xlnx,allow-icache-wr = 1;
+ xlnx,area-optimized = 0;
+ xlnx,cache-byte-size = 4000;
+ xlnx,d-lmb = 1;
+ xlnx,d-opb = 0;
+ xlnx,d-plb = 1;
+ xlnx,data-size = 20;
+ xlnx,dcache-addr-tag = b;
+ xlnx,dcache-byte-size = 4000;
+ xlnx,dcache-line-len = 4;
+ xlnx,dcache-use-fsl = 1;
+ xlnx,debug-enabled = 1;
+ xlnx,div-zero-exception = 1;
+ xlnx,dopb-bus-exception = 0;
+ xlnx,dynamic-bus-sizing = 1;
+ xlnx,edge-is-positive = 1;
+ xlnx,family = spartan3e;
+ xlnx,fpu-exception = 1;
+ xlnx,fsl-data-size = 20;
+ xlnx,fsl-exception = 0;
+ xlnx,fsl-links = 1;
+ xlnx,i-lmb = 1;
+ xlnx,i-opb = 0;
+ xlnx,i-plb = 1;
+ xlnx,icache-line-len = 4;
+ xlnx,icache-use-fsl = 1;
+ xlnx,ill-opcode-exception = 1;
+ xlnx,instance = microblaze_0;
+ xlnx,interconnect = 1;
+ xlnx,interrupt-is-edge = 0;
+ xlnx,iopb-bus-exception = 0;
+ xlnx,mmu-dtlb-size = 4;
+ xlnx,mmu-itlb-size = 2;
+ xlnx,mmu-tlb-access = 3;
+ xlnx,mmu-zones = 2;
+ xlnx,number-of-pc-brk = 2;
+ xlnx,number-of-rd-addr-brk = 0;
+ xlnx,number-of-wr-addr-brk = 0;
+ xlnx,opcode-0x0-illegal = 1;
+ xlnx,pvr = 2;
+ xlnx,pvr-user1 = 12;
+ xlnx,pvr-user2 = 12345678;
+ xlnx,reset-msr = 0;
+
Re: [PATCH] [POWERPC] 85xx: TQM8548: add missing support for RTC and LM75
On Jun 26, 2008, at 8:15 AM, Wolfgang Grandegger wrote: It adds the missing RTC node to tqm8548.dts and enables support for I2C, DS1307 and LM75 in the default configuration. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] --- arch/powerpc/boot/dts/tqm8548.dts |5 arch/powerpc/ configs/85xx/tqm8548_defconfig | 143 ++-- 2 files changed, 142 insertions(+), 6 deletions(-) your mailer is wrapping things. Also, can you test out the mpc85xx_defconfig and make sure it works with the tqm85xx boards (and provide a second patch that enables whatever drivers you need in there) - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 11/60] microblaze_v4: cache support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/cpu/cache.c | 255 +++
include/asm-microblaze/cache.h | 44 ++
include/asm-microblaze/cacheflush.h | 75 ++
3 files changed, 374 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/cpu/cache.c
create mode 100644 include/asm-microblaze/cache.h
create mode 100644 include/asm-microblaze/cacheflush.h
diff --git a/arch/microblaze/kernel/cpu/cache.c
b/arch/microblaze/kernel/cpu/cache.c
new file mode 100644
index 000..9dcf3e9
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -0,0 +1,255 @@
+/*
+ * Cache control for MicroBlaze cache memories
+ *
+ * Copyright (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ * Copyright (C) 2007 John Williams [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ */
+
+#include asm/cacheflush.h
+#include asm/cache.h
+#include asm/cpuinfo.h
+
+/* Exported functions */
+
+void _enable_icache(void)
+{
+ if (cpuinfo.use_icache) {
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+ __asm__ __volatile__ ( \
+ msrset r0, %0; \
+ nop; \
+ : \
+ : i (MSR_ICE) \
+ : memory);
+#else
+ __asm__ __volatile__ ( \
+ mfs r12, rmsr; \
+ ori r12, r12, %0; \
+ mts rmsr, r12; \
+ nop; \
+ : \
+ : i (MSR_ICE) \
+ : memory, r12);
+#endif
+ }
+}
+
+void _disable_icache(void)
+{
+ if (cpuinfo.use_icache) {
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+ __asm__ __volatile__ ( \
+ msrclr r0, %0; \
+ nop; \
+ : \
+ : i (MSR_ICE) \
+ : memory);
+#else
+ __asm__ __volatile__ ( \
+ mfs r12, rmsr; \
+ andir12, r12, ~%0; \
+ mts rmsr, r12; \
+ nop; \
+ : \
+ : i (MSR_ICE) \
+ : memory, r12);
+#endif
+ }
+}
+
+void _invalidate_icache(unsigned int addr)
+{
+ if (cpuinfo.use_icache) {
+ __asm__ __volatile__ ( \
+ wic %0, r0 \
+ : \
+ : r (addr));
+ }
+}
+
+void _enable_dcache(void)
+{
+ if (cpuinfo.use_dcache) {
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+ __asm__ __volatile__ ( \
+ msrset r0, %0; \
+ nop; \
+ : \
+ : i (MSR_DCE) \
+ : memory);
+#else
+ __asm__ __volatile__ ( \
+ mfs r12, rmsr; \
+ ori r12, r12, %0; \
+ mts rmsr, r12; \
+ nop; \
+ : \
+ : i (MSR_DCE) \
+ : memory, r12);
+#endif
+ }
+}
+
+void _disable_dcache(void)
+{
+ if (cpuinfo.use_dcache) {
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+
Re: [PATCH 3/3] mpc8313erdb: Add power management to the device tree.
On Jun 25, 2008, at 5:30 PM, Kim Phillips wrote:
On Wed, 25 Jun 2008 16:51:39 -0500
Scott Wood [EMAIL PROTECTED] wrote:
+ [EMAIL PROTECTED] {
+ device_type = crypto;
+ model = SEC2;
I thought we were done with the two above properties..
+ compatible = fsl,sec2.2, fsl,sec2.1,
+fsl,sec2.0;
+ reg = 0x3 0x7000;
+ interrupts = 11 0x8;
+ interrupt-parent = ipic;
+ /* Rev. 2.2 */
+ num-channels = 1;
+ channel-fifo-len = 24;
+ exec-units-mask = 0x004c;
+ descriptor-types-mask = 0x0122003f;
..and prefixed the above four with fsl,, as in:
http://patchwork.ozlabs.org/linuxppc/patch?id=18726
what's the status of that patch, btw?
There were some comments from Segher that never seemed resolved.
- k
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 03/60] microblaze_v4: Cpuinfo handling
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c | 84 ++
arch/microblaze/kernel/cpu/cpuinfo-static.c | 115 +
arch/microblaze/kernel/cpu/cpuinfo.c | 85 ++
include/asm-microblaze/cpuinfo.h | 110 +++
4 files changed, 394 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
create mode 100644 arch/microblaze/kernel/cpu/cpuinfo-static.c
create mode 100644 arch/microblaze/kernel/cpu/cpuinfo.c
create mode 100644 include/asm-microblaze/cpuinfo.h
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
new file mode 100644
index 000..aff07ef
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -0,0 +1,84 @@
+/*
+ * Support for MicroBlaze PVR (processor version register)
+ *
+ * Copyright (C) 2007 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include linux/init.h
+#include linux/string.h
+#include linux/autoconf.h
+#include asm/pvr.h
+#include asm/cpuinfo.h
+
+/*
+ * Helper macro to map between fields in our struct cpuinfo, and
+ * the PVR macros in pvr.h.
+ */
+
+#define CI(c, p) ci-c = PVR_##p(pvr)
+
+void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
+{
+ struct pvr_s pvr;
+ get_pvr(pvr);
+
+ CI(use_barrel, USE_BARREL);
+ CI(use_divider, USE_DIV);
+ CI(use_mult, USE_HW_MUL);
+ CI(use_fpu, USE_FPU);
+
+ CI(use_mul_64, USE_MUL64);
+ CI(use_msr_instr, USE_MSR_INSTR);
+ CI(use_pcmp_instr, USE_PCMP_INSTR);
+ CI(ver_code, VERSION);
+
+ CI(use_icache, USE_ICACHE);
+ CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
+ CI(icache_write, ICACHE_ALLOW_WR);
+ CI(icache_line, ICACHE_LINE_LEN);
+ CI(icache_size, ICACHE_BYTE_SIZE);
+ CI(icache_base, ICACHE_BASEADDR);
+ CI(icache_high, ICACHE_HIGHADDR);
+
+ CI(use_dcache, USE_DCACHE);
+ CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS);
+ CI(dcache_write, DCACHE_ALLOW_WR);
+ CI(dcache_line, DCACHE_LINE_LEN);
+ CI(dcache_size, DCACHE_BYTE_SIZE);
+ CI(dcache_base, DCACHE_BASEADDR);
+ CI(dcache_high, DCACHE_HIGHADDR);
+
+ CI(use_dopb, D_OPB);
+ CI(use_iopb, I_OPB);
+ CI(use_dlmb, D_LMB);
+ CI(use_ilmb, I_LMB);
+ CI(num_fsl, FSL_LINKS);
+
+ CI(irq_edge, INTERRUPT_IS_EDGE);
+ CI(irq_positive, EDGE_IS_POSITIVE);
+
+ CI(area_optimised, AREA_OPTIMISED);
+ CI(opcode_0_illegal, OPCODE_0x0_ILLEGAL);
+ CI(exc_unaligned, UNALIGNED_EXCEPTION);
+ CI(exc_ill_opcode, ILL_OPCODE_EXCEPTION);
+ CI(exc_iopb, IOPB_BUS_EXCEPTION);
+ CI(exc_dopb, DOPB_BUS_EXCEPTION);
+ CI(exc_div_zero, DIV_ZERO_EXCEPTION);
+ CI(exc_fpu, FPU_EXCEPTION);
+
+ CI(hw_debug, DEBUG_ENABLED);
+ CI(num_pc_brk, NUMBER_OF_PC_BRK);
+ CI(num_rd_brk, NUMBER_OF_RD_ADDR_BRK);
+ CI(num_wr_brk, NUMBER_OF_WR_ADDR_BRK);
+
+ CI(fpga_family_code, TARGET_FAMILY);
+
+ /* take timebase-frequency from DTS */
+ ci-cpu_clock_freq = fcpu(cpu, timebase-frequency);
+}
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c
b/arch/microblaze/kernel/cpu/cpuinfo-static.c
new file mode 100644
index 000..7d1592d
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2007-2008 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2007 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2007 PetaLogix
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/string.h
+#include linux/autoconf.h
+#include asm/cpuinfo.h
+
+const static char family_string[] = CONFIG_XILINX_MICROBLAZE0_FAMILY;
+const static char cpu_ver_string[] = CONFIG_XILINX_MICROBLAZE0_HW_VER;
+
+void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
+{
+ int i;
+
+ ci-use_barrel = fcpu(cpu, xlnx,use-barrel);
+ ci-use_divider = fcpu(cpu, xlnx,use-div);
+ ci-use_mult = fcpu(cpu, xlnx,use-hw-mul);
+ ci-use_fpu = fcpu(cpu, xlnx,use-fpu);
+ ci-use_mul_64 = (ci-use_mult == 2 ? 1 : 0);
+ ci-use_msr_instr = fcpu(cpu, xlnx,use-msr-instr);
+ ci-use_pcmp_instr = fcpu(cpu, xlnx,use-pcmp-instr);
+
+ ci-use_exception = fcpu(cpu, xlnx,unaligned-exceptions) ||
+ fcpu(cpu, xlnx,ill-opcode-exception) ||
+ fcpu(cpu, xlnx,iopb-bus-exception) ||
+
Re: [PATCH 1/3] mpc83xx: Power Management support
On Jun 25, 2008, at 4:50 PM, Scott Wood wrote: Basic PM support for 83xx. Standby is implemented as sleep. Suspend-to-RAM is implemented as deep sleep (with the processor turned off) on 831x. PCI agent power management is supported. Device power management of SOC peripherals is not yet supported. (Not comments on this patch, but related) Do you know if anyone is looking at making sure DOZE/NAP work on 83xx? We clearly don't flush the L1 cache today in the 6xx code. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 08/60] microblaze_v4: exception handling
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/exceptions.c | 77 +
arch/microblaze/kernel/hw_exception_handler.S | 392 +
include/asm-microblaze/exceptions.h | 63
3 files changed, 532 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/exceptions.c
create mode 100644 arch/microblaze/kernel/hw_exception_handler.S
create mode 100644 include/asm-microblaze/exceptions.h
diff --git a/arch/microblaze/kernel/exceptions.c
b/arch/microblaze/kernel/exceptions.c
new file mode 100644
index 000..734038e
--- /dev/null
+++ b/arch/microblaze/kernel/exceptions.c
@@ -0,0 +1,77 @@
+/*
+ * HW exception handling
+ *
+ * Copyright (C) 2007 Xilinx, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#include linux/kernel.h
+#include linux/signal.h
+#include linux/sched.h
+#include asm/exceptions.h
+#include asm/entry.h /* For KM CPU var */
+
+/* Initialize_exception_handlers() - called from setup.c/trap_init() */
+void initialize_exception_handlers(void)
+{
+}
+
+#define MICROBLAZE_ILL_OPCODE_EXCEPTION0x02
+#define MICROBLAZE_IOPB_BUS_EXCEPTION 0x03
+#define MICROBLAZE_DOPB_BUS_EXCEPTION 0x04
+#define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05
+#define MICROBLAZE_FPU_EXCEPTION 0x06
+
+static void handle_unexpected_exception(unsigned int esr,
+ unsigned int kernel_mode, unsigned int addr)
+{
+ printk(KERN_WARNING Unexpected exception %02x in %s mode, PC=%08x\n,
+ esr, kernel_mode ? kernel : user, addr);
+}
+
+static void handle_exception(const char *message, int signal,
+ unsigned int kernel_mode, unsigned int addr)
+{
+ if (kernel_mode)
+ panic(%s in the kernel mode, PC=%08x\n, message, addr);
+ else
+ force_sig(signal, current);
+}
+
+asmlinkage void other_exception_handler(unsigned int esr, unsigned int addr)
+{
+ unsigned int kernel_mode = per_cpu(KM, 0);
+
+ switch (esr) {
+
+ case MICROBLAZE_ILL_OPCODE_EXCEPTION:
+ handle_exception(Illegal instruction, SIGILL,
+ kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_IOPB_BUS_EXCEPTION:
+ handle_exception(Instruction bus error, SIGBUS,
+ kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_DOPB_BUS_EXCEPTION:
+ handle_exception(Data bus error, SIGBUS, kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_DIV_ZERO_EXCEPTION:
+ handle_exception(Divide by zero, SIGILL, kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_FPU_EXCEPTION:
+ handle_exception(FPU error, SIGFPE, kernel_mode, addr);
+ break;
+
+ default:
+ handle_unexpected_exception(esr, kernel_mode, addr);
+ }
+
+ return;
+}
diff --git a/arch/microblaze/kernel/hw_exception_handler.S
b/arch/microblaze/kernel/hw_exception_handler.S
new file mode 100644
index 000..894ebd0
--- /dev/null
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -0,0 +1,392 @@
+/*
+ * Unaligned exception handling for Microblaze
+ *
+ * cleanup code (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * uClinux customisation (C) 2005 John Williams
+ *
+ * Original code
+ * Copyright (C) 2004 Xilinx, Inc. All rights reserved.
+ *
+ * Xilinx, Inc.
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION AS IS AS A
+ * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+ * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
+ * STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
+ * IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
+ * FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+ * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+ * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
+ * ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
+ * FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * $Id: hw_exception_handler.S,v 1.1.2.1 2007/03/16 16:09:57 imanuilov Exp $
+ *
+ */
+
+/*
+ * Microblaze HW Exception Handler
+ * - Non self-modifying exception handler for the following exception
conditions
+ * - Unalignment
+ * - Instruction bus error
+ * - Data bus error
+ * - Illegal instruction opcode
+ * - Divide-by-zero
+ *
+ * Note we disable interrupts during exception handling, otherwise we will
+ * possibly get multiple re-entrancy if interrupt handles themselves cause
+ * exceptions. JW
+ */
+
+#include linux/autoconf.h
+#include asm/exceptions.h
+#include
[PATCH 10/60] microblaze_v4: Interrupt handling, timer support, supported function
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/intc.c| 163 ++
arch/microblaze/kernel/irq.c | 93 ++
arch/microblaze/kernel/selfmod.c | 76 ++
arch/microblaze/kernel/timer.c | 136 +++
include/asm-microblaze/irq.h | 40 +
include/asm-microblaze/selfmod.h | 24 ++
6 files changed, 532 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/intc.c
create mode 100644 arch/microblaze/kernel/irq.c
create mode 100644 arch/microblaze/kernel/selfmod.c
create mode 100644 arch/microblaze/kernel/timer.c
create mode 100644 include/asm-microblaze/irq.h
create mode 100644 include/asm-microblaze/selfmod.h
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
new file mode 100644
index 000..3a6529d
--- /dev/null
+++ b/arch/microblaze/kernel/intc.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2007 Michal Simek [EMAIL PROTECTED]
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+#include linux/init.h
+#include linux/irq.h
+#include linux/autoconf.h
+#include asm/page.h
+#include asm/io.h
+
+#include asm/prom.h
+#include asm/irq.h
+
+#ifdef CONFIG_SELFMOD_INTC
+#include asm/selfmod.h
+#define INTC_BASE BARRIER_BASE_ADDR
+#else
+static unsigned int intc_baseaddr;
+#define INTC_BASE intc_baseaddr
+#endif
+
+unsigned int nr_irq;
+
+/* No one else should require these constants, so define them locally here. */
+#define ISR 0x00 /* Interrupt Status Register */
+#define IPR 0x04 /* Interrupt Pending Register */
+#define IER 0x08 /* Interrupt Enable Register */
+#define IAR 0x0c /* Interrupt Acknowledge Register */
+#define SIE 0x10 /* Set Interrupt Enable bits */
+#define CIE 0x14 /* Clear Interrupt Enable bits */
+#define IVR 0x18 /* Interrupt Vector Register */
+#define MER 0x1c /* Master Enable Register */
+
+#define MER_ME (10)
+#define MER_HIE (11)
+
+static void intc_enable(unsigned int irq)
+{
+ unsigned int mask = (0x0001 (irq 31));
+ pr_debug(enable: %d\n, irq);
+ iowrite32(mask, INTC_BASE + SIE);
+}
+
+static void intc_disable(unsigned int irq)
+{
+ unsigned long mask = (0x0001 (irq 31));
+ pr_debug(disable: %d\n, irq);
+ iowrite32(mask, INTC_BASE + CIE);
+}
+
+static void intc_disable_and_ack(unsigned int irq)
+{
+ unsigned long mask = (0x0001 (irq 31));
+ pr_debug(disable_and_ack: %d\n, irq);
+ iowrite32(mask, INTC_BASE + CIE);
+ /* ack edge triggered intr */
+ if (!(irq_desc[irq].status IRQ_LEVEL))
+ iowrite32(mask, INTC_BASE + IAR);
+}
+
+static void intc_end(unsigned int irq)
+{
+ unsigned long mask = (0x0001 (irq 31));
+
+ pr_debug(end: %d\n, irq);
+ if (!(irq_desc[irq].status (IRQ_DISABLED | IRQ_INPROGRESS))) {
+ iowrite32(mask, INTC_BASE + SIE);
+ /* ack level sensitive intr */
+ if (irq_desc[irq].status IRQ_LEVEL)
+ iowrite32(mask, INTC_BASE + IAR);
+ }
+}
+
+static struct irq_chip intc_dev = {
+ .name = INTC,
+ .enable = intc_enable,
+ .disable = intc_disable,
+ .mask_ack = intc_disable_and_ack,
+ .end = intc_end,
+};
+
+unsigned int get_irq(struct pt_regs *regs)
+{
+ int irq;
+
+ /*
+* NOTE: This function is the one that needs to be improved in
+* order to handle multiple interrupt controllers. It currently
+* is hardcoded to check for interrupts only on the first INTC.
+*/
+ irq = ioread32(INTC_BASE + IVR);
+ pr_debug(get_irq: %d\n, irq);
+
+ return irq;
+}
+
+void __init init_IRQ(void)
+{
+ int i, j, intr_type;
+ struct device_node *intc = NULL;
+#ifdef CONFIG_SELFMOD_INTC
+ unsigned int intc_baseaddr = 0;
+ static int arr_func[] = {
+ (int)get_irq,
+ (int)intc_enable,
+ (int)intc_disable,
+ (int)intc_disable_and_ack,
+ (int)intc_end,
+ 0
+ };
+#endif
+ static char *intc_list[] = {
+ xlnx,xps-intc-1.00.a,
+ xlnx,opb-intc-1.00.c,
+ xlnx,opb-intc-1.00.b,
+ xlnx,opb-intc-1.00.a,
+ NULL
+ };
+
+ for (j = 0; intc_list[j] != NULL;
[PATCH 16/60] microblaze_v4: defconfig file
From: Michal Simek [EMAIL PROTECTED] Signed-off-by: Michal Simek [EMAIL PROTECTED] --- arch/microblaze/defconfig | 698 + 1 files changed, 698 insertions(+), 0 deletions(-) create mode 100644 arch/microblaze/defconfig diff --git a/arch/microblaze/defconfig b/arch/microblaze/defconfig new file mode 100644 index 000..ba24c6b --- /dev/null +++ b/arch/microblaze/defconfig @@ -0,0 +1,698 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc8 +# Thu Jun 26 12:13:43 2008 +# +CONFIG_MICROBLAZE=y +# CONFIG_MMU is not set +# CONFIG_SWAP is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +# CONFIG_PCI is not set +CONFIG_NO_DMA=y +CONFIG_GENERIC_CSUM=y +CONFIG_HZ=100 +CONFIG_DEFCONFIG_LIST=arch/$ARCH/defconfig + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION=-mONStR +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_EXTRA_PASS=y +# CONFIG_HOTPLUG is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +# CONFIG_BASE_FULL is not set +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +# CONFIG_HAVE_OPROFILE is not set +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_TINY_SHMEM=y +CONFIG_BASE_SMALL=1 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED=cfq +CONFIG_CLASSIC_RCU=y + +# +# Platform options +# +CONFIG_PLATFORM_GENERIC=y +CONFIG_SELFMOD=y +CONFIG_SELFMOD_INTC=y +CONFIG_SELFMOD_TIMER=y +CONFIG_OPT_LIB_FUNCTION=y +CONFIG_ALLOW_EDIT_AUTO=y + +# +# Automatic platform settings from Kconfig.auto +# + +# +# Definitions for MICROBLAZE0 +# +CONFIG_KERNEL_BASE_ADDR=0x2000 +CONFIG_XILINX_MICROBLAZE0_FAMILY=spartan3e +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 +CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 +CONFIG_XILINX_MICROBLAZE0_USE_HW_MULT=2 +CONFIG_XILINX_MICROBLAZE0_USE_FPU=0 +CONFIG_XILINX_MICROBLAZE0_HW_VER=7.00.b + +# +# Processor type and features +# +# CONFIG_PREEMPT is not set +# CONFIG_LARGE_ALLOCS is not set +# CONFIG_GENERIC_CLOCKEVENTS is not set + +# +# Boot options +# +CONFIG_CMDLINE=root=/dev/mtdblock0 +CONFIG_CMDLINE_FORCE=y +CONFIG_OF=y +CONFIG_OF_DEVICE=y +CONFIG_PROC_DEVICETREE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y + +# +# Exectuable file formats +# +CONFIG_BINFMT_FLAT=y +# CONFIG_BINFMT_ZFLAT is not set +# CONFIG_BINFMT_SHARED_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP
[PATCH 09/60] microblaze_v4: Signal support
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/signal.c | 531 +++
include/asm-microblaze/signal.h | 195 ++
2 files changed, 726 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/signal.c
create mode 100644 include/asm-microblaze/signal.h
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
new file mode 100644
index 000..6f133e3
--- /dev/null
+++ b/arch/microblaze/kernel/signal.c
@@ -0,0 +1,531 @@
+/*
+ * Signal handling
+ *
+ * Copyright (C) 2003,2004 John Williams [EMAIL PROTECTED]
+ * Copyright (C) 2001 NEC Corporation
+ * Copyright (C) 2001 Miles Bader [EMAIL PROTECTED]
+ * Copyright (C) 1999,2000 Niibe Yutaka Kaz Kojima
+ * Copyright (C) 1991,1992 Linus Torvalds
+ *
+ * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
+ *
+ * This file was was derived from the sh version, arch/sh/kernel/signal.c
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#include linux/sched.h
+#include linux/mm.h
+#include linux/smp.h
+#include linux/smp_lock.h
+#include linux/kernel.h
+#include linux/signal.h
+#include linux/errno.h
+#include linux/wait.h
+#include linux/ptrace.h
+#include linux/unistd.h
+#include linux/stddef.h
+#include linux/personality.h
+#include linux/percpu.h
+#include asm/entry.h
+#include asm/ucontext.h
+#include asm/uaccess.h
+#include asm/pgtable.h
+#include asm/pgalloc.h
+#include asm/signal.h
+#include asm/cacheflush.h
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int
in_sycall);
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int
+sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs)
+{
+ sigset_t saveset;
+
+ mask = _BLOCKABLE;
+ spin_lock_irq(current-sighand-siglock);
+ saveset = current-blocked;
+ siginitset(current-blocked, mask);
+ recalc_sigpending();
+ spin_unlock_irq(current-sighand-siglock);
+
+ regs-r3 = -EINTR;
+ while (1) {
+ current-state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal(regs, saveset, 1))
+ return -EINTR;
+ }
+}
+
+asmlinkage int
+sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize,
+ struct pt_regs *regs)
+{
+ sigset_t saveset, newset;
+
+ /* XXX: Don't preclude handling different sized sigset_t's. */
+ if (sigsetsize != sizeof(sigset_t))
+ return -EINVAL;
+
+ if (copy_from_user(newset, unewset, sizeof(newset)))
+ return -EFAULT;
+ sigdelsetmask(newset, ~_BLOCKABLE);
+ spin_lock_irq(current-sighand-siglock);
+ saveset = current-blocked;
+ current-blocked = newset;
+ recalc_sigpending();
+ spin_unlock_irq(current-sighand-siglock);
+
+ regs-r3 = -EINTR;
+ while (1) {
+ current-state = TASK_INTERRUPTIBLE;
+ schedule();
+ if (do_signal(regs, saveset, 1))
+ return -EINTR;
+ }
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction *act,
+ struct old_sigaction *oact)
+{
+ struct k_sigaction new_ka, old_ka;
+ int ret;
+
+ if (act) {
+ old_sigset_t mask;
+ if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+ __get_user(new_ka.sa.sa_handler, act-sa_handler) ||
+ __get_user(new_ka.sa.sa_restorer, act-sa_restorer))
+ return -EFAULT;
+ __get_user(new_ka.sa.sa_flags, act-sa_flags);
+ __get_user(mask, act-sa_mask);
+ siginitset(new_ka.sa.sa_mask, mask);
+ }
+
+ ret = do_sigaction(sig, act ? new_ka : NULL, oact ? old_ka : NULL);
+
+ if (!ret oact) {
+ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+ __put_user(old_ka.sa.sa_handler, oact-sa_handler) ||
+ __put_user(old_ka.sa.sa_restorer, oact-sa_restorer))
+ return -EFAULT;
+ __put_user(old_ka.sa.sa_flags, oact-sa_flags);
+ __put_user(old_ka.sa.sa_mask.sig[0], oact-sa_mask);
+ }
+
+ return ret;
+}
+
+asmlinkage int
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
+ struct pt_regs *regs)
+{
+ return do_sigaltstack(uss, uoss, regs-r1);
+}
+
+/*
+ * Do a signal return; undo the signal stack.
+ */
+
+struct sigframe {
+ struct sigcontext sc;
+ unsigned long extramask[_NSIG_WORDS-1];
+ unsigned long tramp[2]; /* signal trampoline */
+};
+
+struct rt_sigframe {
+ struct siginfo info;
+ struct
[PATCH 06/60] microblaze_v4: Open firmware common files
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
drivers/of/Makefile |2 +-
drivers/of/device.c | 128 ++
drivers/of/platform.c | 175
drivers/of/prom_parse.c | 1025 +++
include/linux/of_device.h |9 +
include/linux/of_platform.h | 25 +
6 files changed, 1363 insertions(+), 1 deletions(-)
create mode 100644 drivers/of/prom_parse.c
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 548772e..8d4961c 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -1,4 +1,4 @@
obj-y = base.o
-obj-$(CONFIG_OF_DEVICE) += device.o platform.o
+obj-$(CONFIG_OF_DEVICE) += device.o platform.o prom_parse.o
obj-$(CONFIG_OF_GPIO) += gpio.o
obj-$(CONFIG_OF_I2C) += of_i2c.o
diff --git a/drivers/of/device.c b/drivers/of/device.c
index 29681c4..ef735ee 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -100,3 +100,131 @@ void of_device_unregister(struct of_device *ofdev)
device_unregister(ofdev-dev);
}
EXPORT_SYMBOL(of_device_unregister);
+
+
+struct of_device *of_device_alloc(struct device_node *np,
+ const char *bus_id,
+ struct device *parent)
+{
+ struct of_device *dev;
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev)
+ return NULL;
+
+ dev-node = of_node_get(np);
+ dev-dev.dma_mask = dev-dma_mask;
+ dev-dev.parent = parent;
+ dev-dev.release = of_release_dev;
+ dev-dev.archdata.of_node = np;
+#ifdef CONFIG_NUMA
+ dev-dev.archdata.numa_node = of_node_to_nid(np);
+#endif
+
+ if (bus_id)
+ strlcpy(dev-dev.bus_id, bus_id, BUS_ID_SIZE);
+ else
+ of_device_make_bus_id(dev);
+
+ return dev;
+}
+EXPORT_SYMBOL(of_device_alloc);
+
+ssize_t of_device_get_modalias(struct of_device *ofdev,
+ char *str, ssize_t len)
+{
+ const char *compat;
+ int cplen, i;
+ ssize_t tsize, csize, repend;
+
+ /* Name Type */
+ csize = snprintf(str, len, of:N%sT%s,
+ ofdev-node-name, ofdev-node-type);
+
+ /* Get compatible property if any */
+ compat = of_get_property(ofdev-node, compatible, cplen);
+ if (!compat)
+ return csize;
+
+ /* Find true end (we tolerate multiple \0 at the end */
+ for (i = (cplen-1); i = 0 !compat[i]; i--)
+ cplen--;
+ if (!cplen)
+ return csize;
+ cplen++;
+
+ /* Check space (need cplen+1 chars including final \0) */
+ tsize = csize + cplen;
+ repend = tsize;
+
+ /* @ the limit, all is already filled */
+ if (csize = len)
+ return tsize;
+
+ /* limit compat list */
+ if (tsize = len) {
+ cplen = len - csize - 1;
+ repend = len;
+ }
+
+ /* Copy and do char replacement */
+ memcpy(str[csize+1], compat, cplen);
+ for (i = csize; i repend; i++) {
+ char c = str[i];
+ if (c == '\0')
+ str[i] = 'C';
+ else if (c == ' ')
+ str[i] = '_';
+ }
+
+ return tsize;
+}
+EXPORT_SYMBOL(of_device_get_modalias);
+
+int of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ struct of_device *ofdev;
+ const char *compat;
+ int seen = 0, cplen, sl;
+
+ if (!dev)
+ return -ENODEV;
+
+ ofdev = to_of_device(dev);
+
+ if (add_uevent_var(env, OF_NAME=%s, ofdev-node-name))
+ return -ENOMEM;
+
+ if (add_uevent_var(env, OF_TYPE=%s, ofdev-node-type))
+ return -ENOMEM;
+
+ /* Since the compatible field can contain pretty much anything
+* it's not really legal to split it out with commas. We split it
+* up using a number of environment variables instead. */
+
+ compat = of_get_property(ofdev-node, compatible, cplen);
+ while (compat *compat cplen 0) {
+ if (add_uevent_var(env, OF_COMPATIBLE_%d=%s, seen, compat))
+ return -ENOMEM;
+
+ sl = strlen(compat) + 1;
+ compat += sl;
+ cplen -= sl;
+ seen++;
+ }
+
+ if (add_uevent_var(env, OF_COMPATIBLE_N=%d, seen))
+ return -ENOMEM;
+
+ /* modalias is trickier, we add it in 2 steps */
+ if (add_uevent_var(env, MODALIAS=))
+ return -ENOMEM;
+ sl = of_device_get_modalias(ofdev, env-buf[env-buflen-1],
+ sizeof(env-buf) - env-buflen);
+ if (sl = (sizeof(env-buf) - env-buflen))
+ return -ENOMEM;
+ env-buflen += sl;
+
+ return 0;
+}
+EXPORT_SYMBOL(of_device_uevent);
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index ca09a63..06581e4
[PATCH 04/60] microblaze_v4: Open firmware files1
From: Michal Simek [EMAIL PROTECTED]
Signed-off-by: Michal Simek [EMAIL PROTECTED]
---
arch/microblaze/kernel/prom.c| 1163 ++
include/asm-microblaze/of_device.h | 35 +
include/asm-microblaze/of_platform.h | 40 ++
include/asm-microblaze/prom.h| 309 +
4 files changed, 1547 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/prom.c
create mode 100644 include/asm-microblaze/of_device.h
create mode 100644 include/asm-microblaze/of_platform.h
create mode 100644 include/asm-microblaze/prom.h
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
new file mode 100644
index 000..b753d22
--- /dev/null
+++ b/arch/microblaze/kernel/prom.c
@@ -0,0 +1,1163 @@
+/*
+ * Procedures for creating, accessing and interpreting the device tree.
+ *
+ * Paul Mackerras August 1996.
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
+ *{engebret|[EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include stdarg.h
+#include linux/kernel.h
+#include linux/string.h
+#include linux/init.h
+#include linux/threads.h
+#include linux/spinlock.h
+#include linux/types.h
+#include linux/pci.h
+#include linux/stringify.h
+#include linux/delay.h
+#include linux/initrd.h
+#include linux/bitops.h
+#include linux/module.h
+#include linux/kexec.h
+#include linux/debugfs.h
+#include linux/irq.h
+#include linux/lmb.h
+
+#include asm/prom.h
+#include asm/page.h
+#include asm/processor.h
+#include asm/irq.h
+#include asm/io.h
+#include asm/system.h
+#include asm/mmu.h
+#include asm/pgtable.h
+#include asm/pci.h
+#include asm/sections.h
+#include asm/pci-bridge.h
+
+static int __initdata dt_root_addr_cells;
+static int __initdata dt_root_size_cells;
+
+typedef u32 cell_t;
+
+struct boot_param_header *initial_boot_params;
+
+extern struct device_node *allnodes; /* temporary while merging */
+
+extern rwlock_t devtree_lock; /* temporary while merging */
+
+/* export that to outside world */
+struct device_node *of_chosen;
+
+static inline char *find_flat_dt_string(u32 offset)
+{
+ return ((char *)initial_boot_params) +
+ initial_boot_params-off_dt_strings + offset;
+}
+
+/**
+ * This function is used to scan the flattened device-tree, it is
+ * used to extract the memory informations at boot before we can
+ * unflatten the tree
+ */
+int __init of_scan_flat_dt(int (*it)(unsigned long node,
+const char *uname, int depth,
+void *data),
+ void *data)
+{
+ unsigned long p = ((unsigned long)initial_boot_params) +
+ initial_boot_params-off_dt_struct;
+ int rc = 0;
+ int depth = -1;
+
+ do {
+ u32 tag = *((u32 *)p);
+ char *pathp;
+
+ p += 4;
+ if (tag == OF_DT_END_NODE) {
+ depth--;
+ continue;
+ }
+ if (tag == OF_DT_NOP)
+ continue;
+ if (tag == OF_DT_END)
+ break;
+ if (tag == OF_DT_PROP) {
+ u32 sz = *((u32 *)p);
+ p += 8;
+ if (initial_boot_params-version 0x10)
+ p = _ALIGN(p, sz = 8 ? 8 : 4);
+ p += sz;
+ p = _ALIGN(p, 4);
+ continue;
+ }
+ if (tag != OF_DT_BEGIN_NODE) {
+ printk(KERN_WARNING Invalid tag %x scanning flattened
+device tree !\n, tag);
+ return -EINVAL;
+ }
+ depth++;
+ pathp = (char *)p;
+ p = _ALIGN(p + strlen(pathp) + 1, 4);
+ if ((*pathp) == '/') {
+ char *lp, *np;
+ for (lp = NULL, np = pathp; *np; np++)
+ if ((*np) == '/')
+ lp = np+1;
+ if (lp != NULL)
+ pathp = lp;
+ }
+ rc = it(p, pathp, depth, data);
+ if (rc != 0)
+ break;
+ } while (1);
+
+ return rc;
+}
+
+unsigned long __init of_get_flat_dt_root(void)
+{
+ unsigned long p = ((unsigned long)initial_boot_params) +
+ initial_boot_params-off_dt_struct;
+
+ while (*((u32 *)p) == OF_DT_NOP)
+ p += 4;
+ BUG_ON(*((u32 *)p) != OF_DT_BEGIN_NODE);
+ p += 4;
+
Re: [PATCH 2/2] fs_enet: MDIO on GPIO support
On Thu, 26 Jun 2008 13:21:23 +0200 Laurent Pinchart [EMAIL PROTECTED] wrote: There should be no dependencies. When the OF GPIO support is not selected linux/of_gpio.h will define of_get_gpio() as a stub, so the fs_enet driver will fall back to the legacy binding. Have we reached a consensus on which tree the patch should go to ? I think it should go through powerpc tree, not seeing too much netdev-generic stuff in here. If noone will object, Kumar will pick it up I guess... -- Sincerely, Vitaly ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/3] mpc83xx: Power Management support
Kumar Gala wrote: On Jun 25, 2008, at 4:50 PM, Scott Wood wrote: Basic PM support for 83xx. Standby is implemented as sleep. Suspend-to-RAM is implemented as deep sleep (with the processor turned off) on 831x. PCI agent power management is supported. Device power management of SOC peripherals is not yet supported. (Not comments on this patch, but related) Do you know if anyone is looking at making sure DOZE/NAP work on 83xx? We clearly don't flush the L1 cache today in the 6xx code. Doze should work (a long time ago when I did power measurements I saw a drop in consumption once Linux started, and the system was idle)... Nap is not supported, and should probably be removed from the e300 cputable entry. I don't think it's worthwhile to flush the cache every time the cpu is idle just to nap instead of doze. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Microblaze init port v4
Hi everybody, current linux version is 2.6.26-rc8 and I think this is the right time to send latest patches againts rc8 for Microblaze CPU. I fixed there some issues which were reported to me. We have there still problem with syscalls and we don't have chance to fix it to stable version, this is not part which I can do yourself. Microblaze will be n + 1 platform which use some old syscalls. I hope you understand. I am sending more than 50 patches and I would like to see ACKs for patches which are good and comments for patches which are bad. Thanks for your time and review. Best regards, Michal Simek www.monstr.eu ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [POWERPC] 85xx: TQM8548: add missing support for RTC and LM75
Kumar Gala wrote: On Jun 26, 2008, at 8:15 AM, Wolfgang Grandegger wrote: It adds the missing RTC node to tqm8548.dts and enables support for I2C, DS1307 and LM75 in the default configuration. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] --- arch/powerpc/boot/dts/tqm8548.dts |5 arch/powerpc/configs/85xx/tqm8548_defconfig | 143 ++-- 2 files changed, 142 insertions(+), 6 deletions(-) your mailer is wrapping things. Hm, I can apply the patch extracted from my mail without problems. Also, can you test out the mpc85xx_defconfig and make sure it works with the tqm85xx boards (and provide a second patch that enables whatever drivers you need in there) OK, will do so beginning of next week. For the TQM8548 I use the ELDK ppc_85xxDP and for all others the ppc_85xx tool chain. Does a mixed image for both types of MPC85xx CPUs make sense? Wolfgang. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [POWERPC] 85xx: TQM8548: add missing support for RTC and LM75
On Jun 26, 2008, at 9:13 AM, Wolfgang Grandegger wrote: Kumar Gala wrote: On Jun 26, 2008, at 8:15 AM, Wolfgang Grandegger wrote: It adds the missing RTC node to tqm8548.dts and enables support for I2C, DS1307 and LM75 in the default configuration. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] --- arch/powerpc/boot/dts/tqm8548.dts |5 arch/powerpc/ configs/85xx/tqm8548_defconfig | 143 ++-- 2 files changed, 142 insertions(+), 6 deletions(-) your mailer is wrapping things. Hm, I can apply the patch extracted from my mail without problems. Also, can you test out the mpc85xx_defconfig and make sure it works with the tqm85xx boards (and provide a second patch that enables whatever drivers you need in there) OK, will do so beginning of next week. For the TQM8548 I use the ELDK ppc_85xxDP and for all others the ppc_85xx tool chain. Does a mixed image for both types of MPC85xx CPUs make sense? I'm just trying to keep the mpc85xx_defconfig as a subset of all the other defconfigs for 85xx so it gives people doing testing one defconfig to build and try and sure that the other defconfigs will continue to work. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 60/60] microblaze_v4: Enable drivers for Microblaze
monstr == monstr [EMAIL PROTECTED] writes: monstr From: Michal Simek [EMAIL PROTECTED] monstr Signed-off-by: Michal Simek [EMAIL PROTECTED] Acked-by: Peter Korsgaard [EMAIL PROTECTED] monstr config SERIAL_UARTLITE monstrtristate Xilinx uartlite serial port support monstr - depends on PPC32 monstr + depends on PPC32 || MICROBLAZE monstrselect SERIAL_CORE monstrhelp -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/60] microblaze_v4: Makefiles for Microblaze cpu
On Thu, Jun 26, 2008 at 02:29:31PM +0200, [EMAIL PROTECTED] wrote: ... --- /dev/null +++ b/arch/microblaze/Makefile ... +# Work out HW multipler support. This is icky. +# 1. Spartan2 has no HW multiplers. +# 2. MicroBlaze v3.x always uses them, except in Spartan 2 +# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings +ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) + ifeq ($(CPU_MAJOR),3) +CPUFLAGS-1 += -mno-xl-soft-mul + else +# USE_HW_MUL can be 0, 1, or 2, defining a heirarchy of HW Mul support. +CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul + endif +endif +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP) += -mxl-pattern-compare + +CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER)) + +# The various CONFIG_XILINX cpu features options are integers 0/1/2... +# rather than bools y/n +CFLAGS += $(CPUFLAGS-1) +CFLAGS += $(CPUFLAGS-2) ... Why are the options not bools? cu Adrian -- Is there not promise of rain? Ling Tan asked suddenly out of the darkness. There had been need of rain for many days. Only a promise, Lao Er said. Pearl S. Buck - Dragon Seed ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
