On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
drivers/ps3/ps3-lpm.c:838: error: implicit declaration of function
'get_hard_smp_processor_id'
Signed-off-by: Alexey Dobriyan [EMAIL PROTECTED]
---
drivers/ps3/ps3-lpm.c |1 +
1 file changed, 1 insertion(+)
--- a/drivers/ps3/ps3-lpm.c
On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
arch/powerpc/platforms/cell/ras.c:299: error: implicit declaration of
function 'crash_shutdown_register'
Signed-off-by: Alexey Dobriyan [EMAIL PROTECTED]
---
arch/powerpc/platforms/cell/ras.c |1 +
1 file changed, 1 insertion(+)
---
On Mon, Nov 03, 2008 at 04:32:22PM +1100, Paul Mackerras wrote:
Nick Piggin writes:
This is an interesting one for me. AFAIKS it is possible to use lwsync for
a full barrier after a successful ll/sc operation, right? (or stop me here
if I'm wrong).
An lwsync would order subsequent
On Mon, 2008-11-03 at 09:20 +0100, Geert Uytterhoeven wrote:
On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
arch/powerpc/platforms/cell/ras.c:299: error: implicit declaration of
function 'crash_shutdown_register'
Signed-off-by: Alexey Dobriyan [EMAIL PROTECTED]
---
On Mon, 3 Nov 2008, Michael Ellerman wrote:
On Mon, 2008-11-03 at 09:20 +0100, Geert Uytterhoeven wrote:
On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
arch/powerpc/platforms/cell/ras.c:299: error: implicit declaration of
function 'crash_shutdown_register'
Signed-off-by: Alexey
Timur,
I missed you posting. But you are right. My patch is ok for 4xx CPUs and
touching
the CONFIG_FSL_BOOKE path was not my intention.
So for CONFIG_FSL_BOOKE WDTP_MASK should be WDTP(0). There is still a slightly
difference
between WDTP(0)=(3 30) | (0x3c 15) and (3 30) | (15 15).
Can
Hi Ben,
On Thursday 30 October 2008 21:15, Benjamin Herrenschmidt wrote:
On Thu, 2008-10-30 at 11:58 +0100, Matthias Fuchs wrote:
I need to connect to the PCI command write interrupt on a 440EPx
platform. This is UIC0/int#5.
Where should I add this interrupt in the DT? To the PCI node?
I regenerated the patch with respect to your comments.
Grant Likely wrote:
On Thu, Oct 30, 2008 at 12:14 AM, René Bürgel [EMAIL PROTECTED] wrote:
Hi! This patch adds the capability to the mpc52xx-uart to report framing
errors, parity errors, breaks and overruns to userspace. These values
On Mon, 03 Nov 2008 11:43:54 +1100
Benjamin Herrenschmidt [EMAIL PROTECTED] wrote:
Cropping the size of the memory node. That was simplest to do from the
cuboot wrapper at the time. If marking it reserved via a reserve map
is more elegant and correct, we could do that.
But I will
Hi Ben,
On Fri, Oct 31, 2008 at 05:29:25PM -0700, Mike Ditto wrote:
Make the driver report an ENXIO error immediately upon NAK instead of
waiting for another interrupt and getting a timeout.
Signed-off-by: Mike Ditto [EMAIL PROTECTED]
Acked-by: Jochen Friedrich [EMAIL PROTECTED]
It looks
On Monday 03 November 2008 12:54, Stefan Roese wrote:
On Monday 03 November 2008, Benjamin Herrenschmidt wrote:
On Mon, 2008-11-03 at 10:10 +0100, Matthias Fuchs wrote:
Adding this interrupt to the PCI node would make (logical) sense. But
on PCI adapter (add-in cards) designs we typically
On Mon, Nov 03, 2008 at 09:20:28AM +0100, Geert Uytterhoeven wrote:
On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
drivers/ps3/ps3-lpm.c:838: error: implicit declaration of function
'get_hard_smp_processor_id'
Signed-off-by: Alexey Dobriyan [EMAIL PROTECTED]
---
On Monday 03 November 2008 11:57, Benjamin Herrenschmidt wrote:
On Mon, 2008-11-03 at 10:10 +0100, Matthias Fuchs wrote:
Adding this interrupt to the PCI node would make (logical) sense. But
on PCI adapter (add-in cards) designs we typically disable the PCI node
of the DT to disable PCI
On Mon, 3 Nov 2008, Vitaly Bordug wrote:
A published errata for ppc440epx states, that when running Linux with both
EHCI and OHCI modules loaded, the EHCI module experiences a fatal error
when a high-speed device is connected to the USB2.0, and functions normally
if OHCI module is not loaded.
On Monday 03 November 2008, Benjamin Herrenschmidt wrote:
On Mon, 2008-11-03 at 10:10 +0100, Matthias Fuchs wrote:
Adding this interrupt to the PCI node would make (logical) sense. But
on PCI adapter (add-in cards) designs we typically disable the PCI node
of the DT to disable PCI PnP. This
On Wed, Sep 24, 2008 at 6:09 PM, Jon Smirl [EMAIL PROTECTED] wrote:
On Wed, Sep 24, 2008 at 5:51 PM, Jon Smirl [EMAIL PROTECTED] wrote:
USB is not working my hardware, so I booted my Efika and it's not
working there either. This is with linus' current git.
Can anyone verify this? Or know
Hi,
I can confirm that this driver works fine on custom
4060EX board. The NAND is 256MiB Samsumg,
with 2K page size. I had to modify U-boot to provide
EBC ranges property for NAND, but otherwise
it worked from the beginning.
I didn't see any reaction to Sean's post, but this
driver is important
On Mon, Nov 3, 2008 at 10:41 AM, Grant Likely [EMAIL PROTECTED] wrote:
On Wed, Sep 24, 2008 at 6:09 PM, Jon Smirl [EMAIL PROTECTED] wrote:
On Wed, Sep 24, 2008 at 5:51 PM, Jon Smirl [EMAIL PROTECTED] wrote:
USB is not working my hardware, so I booted my Efika and it's not
working there either.
Matthias Fuchs wrote:
Timur,
I missed you posting. But you are right. My patch is ok for 4xx CPUs and
touching
the CONFIG_FSL_BOOKE path was not my intention.
So for CONFIG_FSL_BOOKE WDTP_MASK should be WDTP(0). There is still a
slightly difference
between WDTP(0)=(3 30) | (0x3c
On Thu, 2008-10-30 at 18:07 -0700, Trent Piepho wrote:
But more relevant to your serdes problem, I also have a patch that
prevents
restarting serdes auto-negotiation if the serdes link is already up.
My SGMII
PHY will auto-negotiate, but it takes about 3 seconds. Avoiding an
unnecessary 3
Alexey Dobriyan wrote:
On Mon, Nov 03, 2008 at 09:20:28AM +0100, Geert Uytterhoeven wrote:
On Sun, 2 Nov 2008, Alexey Dobriyan wrote:
drivers/ps3/ps3-lpm.c:838: error: implicit declaration of function
'get_hard_smp_processor_id'
Signed-off-by: Alexey Dobriyan [EMAIL PROTECTED]
On Mon, 2008-11-03 at 10:10 +0100, Matthias Fuchs wrote:
Adding this interrupt to the PCI node would make (logical) sense. But
on PCI adapter (add-in cards) designs we typically disable the PCI node
of the DT to disable PCI PnP. This should not prevent us from adding the
interrupt to the
Hi
This patch is a workaround for bug #364 found in the MPC52xx processor.
The errata document can be found under
http://www.freescale.com/files/32bit/doc/errata/MPC5200E.pdf?fpsp=1WT_TYPE=ErrataWT_VENDOR=FREESCALEWT_FILE_FORMAT=pdfWT_ASSET=Documentation
When a device with a low baudrate is
On Mon, 2008-11-03 at 11:43 +1100, Benjamin Herrenschmidt wrote:
Cropping the size of the memory node. That was simplest to do from the
cuboot wrapper at the time. If marking it reserved via a reserve map
is more elegant and correct, we could do that.
But I will still like to know
From: Sebastian Andrzej Siewior [EMAIL PROTECTED]
Signed-off-by: Sebastian Andrzej Siewior [EMAIL PROTECTED]
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/platforms/85xx/mpc85xx_ds.c |6 ++
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git
This is the kernel part of the kexec support for mpc8544 / FSL BookE.
This version should fix the two things Ben noticed during his review.
Changelog:
v1: - Removed runtime detection between fsl-book-e no-mmu part
- Marked the mmu-setup part as FSL BookE because it does not work
on
From: Sebastian Andrzej Siewior [EMAIL PROTECTED]
The relocate_new_kernel() code usually disables the MMU and the small code
operates on physicall pages while moving the kernel to its final position.
Book-E doesn't support this so a 1:1 mapping must be created.
This patch adds support for
On Mon, 03 Nov 2008 13:55:21 -0600
Hollis Blanchard [EMAIL PROTECTED] wrote:
On Mon, 2008-11-03 at 11:43 +1100, Benjamin Herrenschmidt wrote:
Cropping the size of the memory node. That was simplest to do from the
cuboot wrapper at the time. If marking it reserved via a reserve map
is
On Fri, 31 Oct 2008 14:03:12 -0500
Hollis Blanchard [EMAIL PROTECTED] wrote:
# HG changeset patch
# User Hollis Blanchard [EMAIL PROTECTED]
# Date 1225479768 18000
# Node ID 59bd162a744af080479fedffa97d01e26dceee6a
# Parent 635f3f74befc230d93f79dc3198c509394247ee8
powerpc/44x: declare
On Fri, 2008-10-31 at 12:21 -0500, Hollis Blanchard wrote:
On Sat, 2008-10-25 at 13:55 +1100, Paul Mackerras wrote:
Hollis Blanchard writes:
I've also found xmon's ppc-opc.c. That parses the opcode and operands,
so could use some shared macros.
That's a direct copy from GNU
On Mon, 2008-11-03 at 06:26 -0500, Josh Boyer wrote:
On Mon, 03 Nov 2008 11:43:54 +1100
Benjamin Herrenschmidt [EMAIL PROTECTED] wrote:
Cropping the size of the memory node. That was simplest to do from the
cuboot wrapper at the time. If marking it reserved via a reserve map
is
I will try to add endpoint support for PCI as well. I would like to have a
single PCI node and
let the device_type attribute decide if we are running in hostbridge or
endpoint mode.
Don't use device_type. Do the same we do for PCI-E (whatever it is, I
don't have the source code at hand
On Nov 3, 2008, at 12:55 PM, Nate Case wrote:
On Thu, 2008-10-30 at 18:07 -0700, Trent Piepho wrote:
But more relevant to your serdes problem, I also have a patch that
prevents
restarting serdes auto-negotiation if the serdes link is already up.
My SGMII
PHY will auto-negotiate, but it takes
Hollis Blanchard writes:
Hi, I wrote this patch for KVM [1], but now that I look closer it seems
like there might be some overlapping functionality.
Looks OK -
Acked-by: Paul Mackerras [EMAIL PROTECTED]
subject to you writing a suitable patch description. :)
Paul.
Grant Likely wrote:
On Mon, Nov 3, 2008 at 12:32 PM, René Bürgel [EMAIL PROTECTED] wrote:
Hi
This patch is a workaround for bug #364 found in the MPC52xx processor.
The errata document can be found under
On Mon, Nov 03, 2008 at 03:57:09PM -0600, Matt Sealey wrote:
Optionally you can further
reduce impact by checking if CONFIG_PPC_MPC5200_BUGFIX is defined.
I would much prefer this.
I submitted a patch to enable pipelining on a MPC5200B recently. It was
disabled because of a bug in the
On Mon, Nov 3, 2008 at 3:15 PM, Wolfram Sang [EMAIL PROTECTED] wrote:
On Mon, Nov 03, 2008 at 03:57:09PM -0600, Matt Sealey wrote:
Optionally you can further
reduce impact by checking if CONFIG_PPC_MPC5200_BUGFIX is defined.
I would much prefer this.
I submitted a patch to enable
Is there a plan for providing a way to set pdata for an I2C chip in a
way that could be shared across all OF platforms?
For example, the pca953x I2C GPIO driver requires that pdata != NULL so
it can get the gpio_base field. It can also take in a default 'invert'
value to initialize a chip
On Monday 03 November 2008, Benjamin Herrenschmidt wrote:
I will try to add endpoint support for PCI as well. I would like to have
a single PCI node and let the device_type attribute decide if we are
running in hostbridge or endpoint mode.
Don't use device_type. Do the same we do for PCI-E
On Tue, 2008-11-04 at 06:19 +0100, Stefan Roese wrote:
On Monday 03 November 2008, Benjamin Herrenschmidt wrote:
I will try to add endpoint support for PCI as well. I would like to have
a single PCI node and let the device_type attribute decide if we are
running in hostbridge or endpoint
40 matches
Mail list logo
