pku@gmail.com wrote on 30/03/2009 09:36:21:
On Fri, Mar 27, 2009 at 7:52 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 27/03/2009 11:50:09:
On Thu, Mar 26, 2009 at 8:54 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Also set NAPI
On Mon, Mar 30, 2009 at 3:48 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 30/03/2009 09:36:21:
On Fri, Mar 27, 2009 at 7:52 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 27/03/2009 11:50:09:
On Thu, Mar 26,
On Fri, Mar 27, 2009 at 7:52 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 27/03/2009 11:50:09:
On Thu, Mar 26, 2009 at 8:54 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Also set NAPI weight to 64 as this is a common value.
This will make
On Thu, Mar 26, 2009 at 1:51 AM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Anton Vorontsov avoront...@ru.mvista.com wrote on 25/03/2009 15:25:40:
On Wed, Mar 25, 2009 at 02:30:49PM +0100, Joakim Tjernlund wrote:
From 1c2f23b1f37f4818c0fd0217b93eb38ab6564840 Mon Sep 17 00:00:00
So if you're looking fixing 32 bit apps ptracing 64 bit apps, does that
mean we can get a single 32 bit GDB that'll ptrace both 64 and 32 bit
apps?
Currently gdb only supports 32x64 debugging for the SPU.
Ok, thanks.
@@ -263,7 +263,8 @@ long compat_arch_ptrace(struct task_struct
This is my forth version of the patch series adding generic support
for multi-chip NAND devices to the FSL-UPM driver and support for
the Micron MT29F8G08FAB NAND flash memory on the TQM8548 modules.
It addresses the issues reported on the mailing list, e.g. the new
bindings are now documented as
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern. The TQM8548_BE requires a further short delay
after writing out a buffer. Normally the R/B pin should be checked, but
it's not connected on the TQM8548_BE. The existing driver uses similar
fixed delay
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property fsl,upm-addr-line-cs-offsets.
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
flash memory on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts |7 +--
arch/powerpc/boot/dts/tqm8548.dts |7 +--
2 files
Michael Neuling mi...@neuling.org writes:
@@ -263,7 +263,9 @@ long compat_arch_ptrace(struct task_stru
ret = ptrace_put_reg(child, numReg, freg);
} else {
flush_fp_to_thread(child);
-((unsigned int
pku@gmail.com wrote on 30/03/2009 11:36:36:
On Mon, Mar 30, 2009 at 5:21 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 30/03/2009 10:34:47:
On Thu, Mar 26, 2009 at 1:51 AM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Anton
On Mon, Mar 30, 2009 at 6:01 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 30/03/2009 11:36:36:
On Mon, Mar 30, 2009 at 5:21 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 30/03/2009 10:34:47:
On Thu, Mar 26,
Michael Neuling mi...@neuling.org writes:
So if you're looking fixing 32 bit apps ptracing 64 bit apps, does that
mean we can get a single 32 bit GDB that'll ptrace both 64 and 32 bit
apps?
Currently gdb only supports 32x64 debugging for the SPU.
@@ -263,7 +263,8 @@ long
This patch adds documentation for the new NAND FSL UPM bindings for:
NAND: FSL-UPM: add multi chip support
NAND: FSL-UPM: Add wait flags to support board/chip specific delays
It also documents the old binding for chip-delay.
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
On Mon, Mar 30, 2009 at 5:21 PM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
pku@gmail.com wrote on 30/03/2009 10:34:47:
On Thu, Mar 26, 2009 at 1:51 AM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Anton Vorontsov avoront...@ru.mvista.com wrote on 25/03/2009
pku@gmail.com wrote on 30/03/2009 10:34:47:
On Thu, Mar 26, 2009 at 1:51 AM, Joakim Tjernlund
joakim.tjernl...@transmode.se wrote:
Anton Vorontsov avoront...@ru.mvista.com wrote on 25/03/2009
15:25:40:
On Wed, Mar 25, 2009 at 02:30:49PM +0100, Joakim Tjernlund wrote:
From
On Mar 29, 2009, at 10:25 PM, Benjamin Herrenschmidt wrote:
My next branch (after merging from you):
ERROR: fsl_pq_mdio_bus_name [drivers/net/gianfar_driver.ko]
undefined!
I'll ask Linus to pull anyway though.
Cheers,
Ben.
I believe this is fixed in net-next (and possible linus has
On Mon, Mar 30, 2009 at 08:51:38AM -0500, Kumar Gala wrote:
On Mar 29, 2009, at 10:25 PM, Benjamin Herrenschmidt wrote:
My next branch (after merging from you):
ERROR: fsl_pq_mdio_bus_name [drivers/net/gianfar_driver.ko]
undefined!
I'll ask Linus to pull anyway though.
Cheers,
Ben.
Hi,
I'd like to add supports for interrupts handling from GPIO controller. Some of
these interrupts are from I2C devices and some others are from SPI devices.
What is the best approach to enable interrupts handling for those devices
through GPIO.
Note that I'm developing on a custom board
On Mon, Mar 30, 2009 at 9:57 AM, Yann Pelletier
ypellet...@haivision.com wrote:
Hi,
I'd like to add supports for interrupts handling from GPIO controller. Some
of these interrupts are from I2C devices and some others are from SPI devices.
What is the best approach to enable interrupts
Scott Wood scottw...@freescale.com wrote on 27/03/2009 14:26:00:
Joakim Tjernlund wrote:
This is a bit better than the current type casts. Moving over to qe_bd
accesses is a bigger cleanup that will have to be a seperate patch.
I am not sure it is an all win as you probably loose the
On Mon, Mar 30, 2009 at 8:33 AM, sylvain louchez
sylvain.louc...@gmail.com wrote:
Hello, I’m a newbie looking for where the documentation and implementation
model can be found…
My custom driver is looking for an interrupt notification from the kernel -
and it registers in the /proc/interrupts
Joakim Tjernlund wrote:
gianfar does not seem to use in_/out_ functions for the BDs. Works just
fine that too it seems.
It does now that it has explicit barriers in a few places. Before they
were added, it would sometimes fail under load. That was due to a
compiler reordering, but CPU
Scott Wood scottw...@freescale.com wrote on 30/03/2009 19:22:03:
Joakim Tjernlund wrote:
gianfar does not seem to use in_/out_ functions for the BDs. Works
just
fine that too it seems.
It does now that it has explicit barriers in a few places. Before they
In 2.6.29 or later?
were
Joakim Tjernlund wrote:
Scott Wood scottw...@freescale.com wrote on 30/03/2009 19:22:03:
Joakim Tjernlund wrote:
gianfar does not seem to use in_/out_ functions for the BDs. Works
just
fine that too it seems.
It does now that it has explicit barriers in a few places. Before they
In
Scott Wood scottw...@freescale.com wrote on 30/03/2009 19:45:17:
Joakim Tjernlund wrote:
Scott Wood scottw...@freescale.com wrote on 30/03/2009 19:22:03:
Joakim Tjernlund wrote:
gianfar does not seem to use in_/out_ functions for the BDs. Works
just
fine that too it seems.
It does
From: Grant Likely grant.lik...@secretlab.ca
The driver triggers a BUG_ON() when allocating DMA buffers if the
arch/powerpc dma_ops from the of_platform device are not copied
into net_device structure.
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
David, do you want to pick this one
Joakim Tjernlund wrote:
different since descriptors are in MURAM which is ioremap()ed -- though
switching to a cacheable mapping with barriers should be a performance
improvement.
I always thought that MURAM was very fast. The whole reason to have BDs in
MURAM is that it is faster than normal
I'm debugging a fairly awkward system, where the ehernet controller
and the phy device connected to the controller's mac are completely
independent. (this is in the 2.6.25 tree, btw).
The phy device interface is through SysFs attributes, there is no
interrupts, link state is polled by a user
From: Joakim Tjernlund joakim.tjernl...@transmode.se
Date: Mon, 30 Mar 2009 12:01:33 +0200
I don't know. But the question you should ask is: Does the networking
code promise this now and for the future? If not, you should
fix the driver not to relay on netif_queue_stopped() here.
Stop this
On Tue, 17 Mar 2009 13:19:55 +0100
Roel Kluin roel.kl...@gmail.com wrote:
This was found by code analysis, is it needed?
--8-8-
If we subtract too much on unsigned i it wraps.
Signed-off-by: Roel Kluin
On Mon, Mar 30, 2009 at 01:35:31PM -0700, Andrew Morton wrote:
Guys, could we have a MAINTAINERS entry for this driver please?
To my knowledge, there isn't one. Would be Ben now by default I
guess. The previous developers have disclaimed ownership for a
while from what I remember.
josh
--- On Thu, 3/26/09, Michael Ellerman mich...@ellerman.id.au wrote:
From: Michael Ellerman mich...@ellerman.id.au
Subject: Re: Bootlog bug?
To: ron_mad...@sbcglobal.net
Cc: linuxppc-dev@ozlabs.org
Date: Thursday, March 26, 2009, 3:51 PM
On Thu, 2009-03-26 at 11:25 -0700, Ron Madrid wrote:
On Mon, 30 Mar 2009 16:55:53 -0400
Josh Boyer jwbo...@linux.vnet.ibm.com wrote:
On Mon, Mar 30, 2009 at 01:35:31PM -0700, Andrew Morton wrote:
Guys, could we have a MAINTAINERS entry for this driver please?
To my knowledge, there isn't one. Would be Ben now by default I
guess. The
On Mar 30, 2009, at 1:53 PM, Grant Likely wrote:
From: Grant Likely grant.lik...@secretlab.ca
The driver triggers a BUG_ON() when allocating DMA buffers if the
arch/powerpc dma_ops from the of_platform device are not copied
into net_device structure.
Signed-off-by: Grant Likely
In message m2myb32rk8@igel.home you wrote:
Michael Neuling mi...@neuling.org writes:
@@ -263,7 +263,9 @@ long compat_arch_ptrace(struct task_stru
ret = ptrace_put_reg(child, numReg, freg);
} else {
flush_fp_to_thread(child);
-
Hello, I'm a newbie looking for where the documentation and implementation
model can be found.
My custom driver is looking for an interrupt notification from the kernel -
and it registers in the /proc/interrupts file as expected when installed,
i.e.
$insmod custom_driver.ko gps_irq=n
**Note
Followup to [PATCH 03/10] ide: destroy DMA mappings after ending DMA
email on March 14th:
http://lkml.org/lkml/2009/3/14/17
No maintainer is listed for Toshiba CELL Reference Set IDE (BLK_DEV_CELLEB)
or tx4939ide.c in MAINTAINERS. I've CC'd Ishizaki Kou @Toshiba (Maintainer for
Spidernet
These 3 items are generally not used in 44x/canyonlands board, please
consider disable them when you change 44x/canyonlands_defconfig next
time,
CONFIG_PCI_LEGACY
CONFIG_DAB
CONFIG_VIDEO_OUTPUT_CONTROL
Thanks,
$ git diff HEAD -- arch/powerpc/configs/44x/canyonlands_defconfig
diff --git
From: Grant Likely grant.lik...@secretlab.ca
The driver triggers a BUG_ON() when allocating DMA buffers if the
arch/powerpc dma_ops from the of_platform device are not copied
into net_device structure.
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
Becky, does this look better to
The (relatively) new pmac_zilog driver doesn't use the pre-munged
IRQ numbers from the macio_dev unlike other macio things, it
directly maps it off the OF device-tree.
It does that because it can be initialized much earlier than the
registration of the macio devices, in order to get a serial
The powerpc kernel always requires an Open Firmware like device tree
to supply device information. On systems without OF, this comes from
a flattened device tree blob. This blob is usually generated by dtc,
a tool which compiles a text description of the device tree into the
flattened format
Hi all,
This patch is now applicable to the tracing tree after merging with
Linus' tree.
On Fri, 27 Mar 2009 08:48:51 -0400 Steven Rostedt srost...@redhat.com wrote:
On Fri, 2009-03-27 at 23:08 +1100, Stephen Rothwell wrote:
Hi all,
Today's linux-next build (powerpc allyesconfig)
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