This patch adds the possibility to have a spi device without a cs.
For example, the dts file should look something like this:
spi-controller {
gpios = pio1 1 0 /* cs0 */
0 /* cs1, no GPIO */
pio2 2 0;/* cs2 */
Signed-off-by: Rini
Hi Grant,
some comments below:
(by the way, have you tested this patch on hardware? I wonder because of the
SSOE-issue, but maybe it works despite the documentation.)
On Wed, Jun 17, 2009 at 08:55:01PM -0600, Grant Likely wrote:
From: Grant Likely grant.lik...@secretlab.ca
Adds support for
* Paul Mackerras pau...@samba.org wrote:
Ingo Molnar writes:
Note, i've created a new branch, tip:perfcounters/powerpc, so we can
keep these things separate and Ben can pull them too. I see there
was some review feedback - do you want to send a v2 version perhaps?
Kumar's comments
* Paul Mackerras pau...@samba.org wrote:
This also removes the -Werror flag when building on a 64-bit powerpc
machine. The userspace definition of u64 is unsigned long rather
than unsigned long long, meaning that gcc warns every time a u64
is printed with %Lx or %llx (though that does work
On Thu, 2009-06-18 at 13:43 +1000, Benjamin Herrenschmidt wrote:
Index: linux-work/arch/powerpc/kernel/udbg.c
===
--- linux-work.orig/arch/powerpc/kernel/udbg.c 2009-06-18
13:21:29.0 +1000
+++
Chris Pringle wrote:
Chris Pringle wrote:
You could enable CONFIG_NOT_COHERENT_CACHE.
I've just tried this (I had to edit Kconfig in power/platforms to
make the build system accept it), and interestingly it's making no
difference. I'm using streaming mappings, and are using the
pci_map_sg
I came across the following badness message during shutdown on a Power6 box.
This was with 2.6.30-git12(3fe0344faf7fdcb158bd5c1a9aec960a8d70c8e8)
[ cut here ]
Badness at drivers/char/tty_ldisc.c:210
NIP: c0409428 LR: c0409410 CTR:
REGS:
On Jun 18, 2009, at 1:19 AM, Rini van Zetten wrote:
This patch adds the possibility to have a spi device without a cs.
For example, the dts file should look something like this:
spi-controller {
gpios = pio1 1 0 /* cs0 */
0 /* cs1, no GPIO */
On Jun 17, 2009, at 6:24 PM, Paul Mackerras wrote:
Kumar Gala writes:
This should be something like:
obj64-$(CONFIG_PPC_PERF_CTRS)-$(PPC_BOOK3S_64)
+obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS)-$(PPC_BOOK3S_32)
Or use new Kconfig types as I suggested on
On Thu, Jun 18, 2009 at 08:19:44AM +0200, Rini van Zetten wrote:
This patch adds the possibility to have a spi device without a cs.
For example, the dts file should look something like this:
spi-controller {
gpios = pio1 1 0 /* cs0 */
0 /* cs1, no
On Jun 18, 2009, at 8:09 AM, Anton Vorontsov wrote:
On Thu, Jun 18, 2009 at 08:19:44AM +0200, Rini van Zetten wrote:
This patch adds the possibility to have a spi device without a cs.
For example, the dts file should look something like this:
spi-controller {
gpios = pio1 1 0 /*
On Monday 15 June 2009, Timur Tabi wrote:
On Mon, Jun 15, 2009 at 2:50 AM, Michael Ellermanmich...@ellerman.id.au
wrote:
arch/powerpc/platforms/chrp/setup.c:378: error: the frame size of 1040
bytes is larger than 1024 bytes
What's so bad about a frame size larger than 1024?
It's not
Hi Grant,
The double spaces at the end of sentences are intentional. It is
perhaps a bit quaint and old fashioned, but it is my writing style.
Ah, okay.
+
+ /* Statistics */
+ int msg_count;
+ int wcol_count;
+ int wcol_ticks;
+ u32 wcol_tx_timestamp;
+
ppc_md.init only exists on ppc32 and seems like its pretty useless
today. The users seem to fall into two classes:
1. called to do of_platform_bus_probe() - most platforms use
machine_device_initcall() for this
2. some platform init code which seems like it could move into
setup_arch().
On Wed, Jun 17, 2009 at 02:14:20PM +1000, David Gibson wrote:
On Wed, Jun 10, 2009 at 02:38:18PM +0530, K.Prasad wrote:
Modify process handling code to recognise hardware debug registers during
copy
and flush operations. Introduce a new TIF_DEBUG task flag to indicate a
process's use of
Ira Snyder wrote:
I can do something similar by calling device_prep_dma_memcpy() lots of
times. Once for each page in the scatterlist.
This has the advantage of not changing the DMAEngine API.
This has the disadvantage of not being a single transaction. The DMA
controller will get an interrupt
On Wed, Jun 17, 2009 at 02:32:24PM +1000, David Gibson wrote:
On Wed, Jun 10, 2009 at 02:38:06PM +0530, K.Prasad wrote:
Introduce PPC64 implementation for the generic hardware breakpoint
interfaces
defined in kernel/hw_breakpoint.c. Enable the HAVE_HW_BREAKPOINT flag and
the
Makefile.
Hi Ben et al,
Benjamin Herrenschmidt wrote:
On Tue, 2009-06-16 at 10:28 -0400, Geoff Thorpe wrote:
[snip]
Maybe we can shrink that file significantly (and avoid the risk for
typos etc...) by generating them all from a macro.
Something like (typed directly into the mailer :-)
#define
On Thu, Jun 18, 2009 at 11:16:03AM -0700, Dan Williams wrote:
Ira Snyder wrote:
I can do something similar by calling device_prep_dma_memcpy() lots of
times. Once for each page in the scatterlist.
This has the advantage of not changing the DMAEngine API.
This has the disadvantage of not
Ira Snyder wrote:
So, I see a couple of ways of moving forward:
1) Keep my implementation, moving the includes to arch/powerpc/include.
Do we drop the allocation functions?
+1 for option 1. Having it under arch/powerpc/include makes it clear
that it is a powerpc specific api, so keep the
On Thu, 2009-06-18 at 09:38 -0500, Kumar Gala wrote:
ppc_md.init only exists on ppc32 and seems like its pretty useless
today. The users seem to fall into two classes:
1. called to do of_platform_bus_probe() - most platforms use
machine_device_initcall() for this
2. some platform init
On Thu, 2009-06-18 at 16:30 -0400, Geoff Thorpe wrote:
I've left the volatile qualifier in the generated API because I didn't
feel so comfortable changing APIs, but I also added the memory clobber
for all cases - whereas it seems the existing set_bits(), clear_bits(),
[...] functions didn't
Kumar Gala writes:
In looking at doing this what suggestions do you have in implementing
perf_instruction_pointer() if we don't have the equivalent of SIAR.
Just use regs-nip ?
Yes, exactly. If you don't have SIAR/SDAR/MMCRA, the default
definitions for perf_instruction_pointer and
Use the DMA_SLAVE capability of the DMAEngine API to copy/from a
scatterlist into an arbitrary list of hardware address/length pairs.
This allows a single DMA transaction to copy data from several different
devices into a scatterlist at the same time.
This also adds support to enable some
Hello,
On Wed, Jun 17, 2009 at 2:16 PM, Norbert van
Bolhuisnvbolh...@aimvalley.nl wrote:
I'll be testing the design tomorrow on the reference board, I'll
report results in this thread.
Interesting.
Looking forward to the results.
Design works as expected on the now slightly modified
On Wed, 2009-06-17 at 16:21 +0200, Ingo Molnar wrote:
This depends on the generic atomic64_t patches, which are now in
Linus' tree. Ingo, if you're putting these in, please pull Linus'
tree in first.
Note, i've created a new branch, tip:perfcounters/powerpc, so we can
keep these
On Wed, 2009-06-17 at 16:27 +0200, Ingo Molnar wrote:
I think it would be nice to have more platform support in .31.
Perfcounters is a brand-new feature so there's no risk of
regression. In the end it will depend on Linus to pull of course,
and BenH can veto it too if he'd like no more
Hi Leon,
I'll be testing the design tomorrow on the reference board, I'll
report results in this thread.
Interesting.
Looking forward to the results.
Design works as expected on the now slightly modified MPC8313E-RDB
board.
That's great!
Kudos to David.
I'm sure you would have come up
From: Randy Vinson rvin...@mvista.com
FSL RapidIO won't probe without a proper compatible entry. This
patch fixes the issue by adding fsl,rapidio-delta compatible to
mpc85xx_ids.
Signed-off-by: Randy Vinson rvin...@mvista.com
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
For yet unknown reason 4-bit mode doesn't work on MPC8569E-MDS boards,
so make 1-bit mode default. When we resolve the issue, u-boot will
remove sdhci,1-bit-only property from the device tree, while SDHCI
will still work with older u-boots.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
On Sat, Jun 13, 2009 at 03:10, Paul Mackerras wrote:
+typedef struct {
+ long long counter;
+} atomic64_t;
lack of volatile seems odd compared to:
include/linux/types.h:
typedef struct {
volatile int counter;
} atomic_t;
-mike
___
Hello,
I am trying to debug a crash during memcpy while copying data from the
FCM buffer of an mpc8536 to the ddr ram. I debugged memcpy enough
through my BDI3000 to see that the entire contents of the fcm buffer I
want moved are actually moved off to memory location I specify. The
crash comes
The bitops.h functions that operate on a single bit in a bitfield are
implemented by operating on the corresponding word location. In all cases
the inner logic is valid if the mask being applied has more than one bit
set, so this patch exposes those inner operations. Indeed, set_bits() was
already
On Thu, 2009-06-18 at 19:55 -0400, Mike Frysinger wrote:
On Sat, Jun 13, 2009 at 03:10, Paul Mackerras wrote:
+typedef struct {
+ long long counter;
+} atomic64_t;
lack of volatile seems odd compared to:
include/linux/types.h:
typedef struct {
volatile int counter;
}
Mike Frysinger writes:
On Sat, Jun 13, 2009 at 03:10, Paul Mackerras wrote:
+typedef struct {
+ long long counter;
+} atomic64_t;
lack of volatile seems odd compared to:
include/linux/types.h:
typedef struct {
volatile int counter;
} atomic_t;
-mike
It's only accessed
On Thu, Jun 18, 2009 at 20:47, Paul Mackerras wrote:
Mike Frysinger writes:
On Sat, Jun 13, 2009 at 03:10, Paul Mackerras wrote:
+typedef struct {
+ long long counter;
+} atomic64_t;
lack of volatile seems odd compared to:
include/linux/types.h:
typedef struct {
volatile int
On Mon, Nov 17, 2008 at 01:26:13AM -0600, Sonny Rao wrote:
On Fri, Nov 07, 2008 at 04:28:29PM +1100, Paul Mackerras wrote:
Sonny Rao writes:
Fix the BSR driver to allow small BSR devices, which are limited to a
single 4k space, on a 64k page kernel. Previously the driver would
Add a 4096 byte BSR size which will be used on new machines. Also, remove
the warning when we run into an unknown size, as this can spam the kernel
log excessively.
Signed-off-by: Sonny Rao sonny...@us.ibm.com
Index: linux-2.6.27/drivers/char/bsr.c
On Jun 18, 2009, at 6:37 PM, Anton Vorontsov wrote:
For yet unknown reason 4-bit mode doesn't work on MPC8569E-MDS boards,
so make 1-bit mode default. When we resolve the issue, u-boot will
remove sdhci,1-bit-only property from the device tree, while SDHCI
will still work with older u-boots.
Benjamin Herrenschmidt wrote:
On Thu, 2009-06-18 at 16:30 -0400, Geoff Thorpe wrote:
I've left the volatile qualifier in the generated API because I didn't
feel so comfortable changing APIs, but I also added the memory clobber
for all cases - whereas it seems the existing set_bits(),
Match what other 85xx platforms do for of_platform_bus_probe and use
machine_device_initcall. This is one small step in killing of
ppc_md.init.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/platforms/85xx/socrates.c |6 +++---
1 files changed, 3 insertions(+), 3
I believe the question should be sent to u-b...@lists.denx.de,
not linuxppc-dev list.
What is the TLB settings for NAND FCM buffer? Pay attention
to set the TLB as cache inhibited and guarded attribute.
If not set the guarded bit, it is possible to cause the speculate
load from FCM buffer below
On Thu, Jun 18, 2009 at 11:26:23PM +0530, K.Prasad wrote:
On Wed, Jun 17, 2009 at 02:14:20PM +1000, David Gibson wrote:
On Wed, Jun 10, 2009 at 02:38:18PM +0530, K.Prasad wrote:
[snip]
@@ -254,8 +255,10 @@ void do_dabr(struct pt_regs *regs, unsig
11, SIGSEGV) ==
On Thu, Jun 18, 2009 at 11:50:45PM +0530, K.Prasad wrote:
On Wed, Jun 17, 2009 at 02:32:24PM +1000, David Gibson wrote:
On Wed, Jun 10, 2009 at 02:38:06PM +0530, K.Prasad wrote:
[snip]
+int arch_validate_hwbkpt_settings(struct hw_breakpoint *bp,
+
The 32-bit kernel relies on some memory being mapped covering
the kernel text,data and bss at least, early during boot before
the full MMU setup is done. On 32-bit classic processors, this
is done using BAT registers.
On 601, the size of BATs is limited to 8M and we use 2 of them
for that initial
The macio_dev's created to map devices inside the MacIO ASICs
don't have proper dma_ops. This causes crashes on some machines
since the SCSI code calls dma_map_* on our behalf using the
device we hang from.
This fixes it by copying the parent PCI device dma_ops into
the macio_dev when creating
On Thu, 2009-06-18 at 13:39 +1000, Benjamin Herrenschmidt wrote:
Those functions are way too big to be inline, besides, kmap_atomic()
wants to call debug_kmap_atomic() which isn't exported for modules
and causes module link failures.
Missing a quilt ref ... this one won't build.
Ben.
Those functions are way too big to be inline, besides, kmap_atomic()
wants to call debug_kmap_atomic() which isn't exported for modules
and causes module link failures.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/highmem.h | 57
Hi Linus !
Here's another batch to finally drain my queue. There will be bug fixes
coming but they don't need to be before -rc1. The only feature I'm
still considering merging this time around and that isn't there yet is
the support for irqtrace/lockdep on ppc32 since it's a useful debug
tool,
On Jun 18, 2009, at 6:22 PM, Anton Vorontsov wrote:
From: Randy Vinson rvin...@mvista.com
FSL RapidIO won't probe without a proper compatible entry. This
patch fixes the issue by adding fsl,rapidio-delta compatible to
mpc85xx_ids.
Signed-off-by: Randy Vinson rvin...@mvista.com
Signed-off-by:
50 matches
Mail list logo
