Re: [PATCH] [spi_mpc83xx] Always enable legacy support.

2009-07-02 Thread Joakim Tjernlund
Anton Vorontsov avoront...@ru.mvista.com wrote on 01/07/2009 23:12:12: On Wed, Jul 01, 2009 at 09:16:12PM +0200, Joakim Tjernlund wrote: There are out of tree boards that need this legacy support too. Heh. Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se --- I hope this

Re: RAMDISK on EP88xc

2009-07-02 Thread Frank Svendsbøe
On Wed, Jul 1, 2009 at 10:14 PM, Mikhail Zaturenskiymzaturenskiy...@gmail.com wrote: Hi Mikhail, Try setting CONFIG_EXT2_FS=y, then recompile your kernel and reboot. Hi Frank, just tried that but still getting the same Unpacking initramfs... failed! output Hmm... according to Kernel command

Re: Preemption question (4xx related)

2009-07-02 Thread Benjamin Herrenschmidt
On Wed, 2009-07-01 at 20:14 -0400, Josh Boyer wrote: I've toyed with that idea myself. I keep coming back to the fact that you need a workload that would really leverage it, and I don't have one at the moment. To some extent that's true but just turning full preemption including kernel side

AW: Direct MII connection between MPC8313 and VIRTEX FPGA

2009-07-02 Thread Frank Prepelica
Hi Grant Thank you very much so far. It helped me a lot! Best regards Frank -Ursprüngliche Nachricht- Von: linuxppc-dev-bounces+frank.prepelica=ubidyne@lists.ozlabs.org [mailto:linuxppc-dev-bounces+frank.prepelica=ubidyne@lists.ozlabs.org] Im Auftrag von Grant

How to set DDR data bus width to 16Bit

2009-07-02 Thread Frank Prepelica
Hi all, Does anyone knows how to set the DDR data bus width to 16Bit in linux? I've found that option in U-Boot in the MPC8313ERDB_config file. (verfied with a memory dump of the CPU register (DDR_SDRAM_CFG) - the 16Bit DBW is set(10b) ). But after starting linux the value is set to 00b

Re: How to set DDR data bus width to 16Bit

2009-07-02 Thread Norbert van Bolhuis
you have to do it via your bootloader (u-boot) which sets up the DDR memory controller. Linux (already) assumes memory is available. Are you sure linux kernel is changing DDR_SDRAM_CFG ? When our linux-2.6.28 kernel is up, it's still 0xc308 when I read physical address 0xe0002110. Btw. We

Re: Preemption question (4xx related)

2009-07-02 Thread Michel Dänzer
On Thu, 2009-07-02 at 08:13 +1000, Benjamin Herrenschmidt wrote: On Tue, 2009-06-30 at 05:55 -0700, Felix Radensky wrote: Hi, Preemption is disabled on the vast majority of powerpc targets. Are there any known problems in this area ? I'd like to enable CONFIG_PREEMPT_VOLUNTARY on

AW: How to set DDR data bus width to 16Bit

2009-07-02 Thread Frank Prepelica
you have to do it via your bootloader (u-boot) which sets up the DDR memory controller. Linux (already) assumes memory is available. Are you sure linux kernel is changing DDR_SDRAM_CFG ? When our linux-2.6.28 kernel is up, it's still 0xc308 when I read physical address 0xe0002110. Hi

Re: AW: How to set DDR data bus width to 16Bit

2009-07-02 Thread Norbert van Bolhuis
Hi Frank, Yes, it's 0xC310 for 16 bit. I showed the 32bit value. Yes, to go to 16 bit bus-width (1 DDR(2) device), this is the only change needed in u-boot, assuming you have 2 DDR(2) devices (like 8313E-RDB) which together provide 16+16 = 32bit bus-width. Since, surprisingly, the 16 bit

[PATCH] powerpc/86xx: Update GE Fanuc sbc310 DTS

2009-07-02 Thread Martyn Welch
Update GE Fanuc DTS to match the alterations suggested during the merge of the ppc9a DTS in commit 740d36ae6344f38c4da64c2ede765d7d2dd1f132 Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/boot/dts/gef_sbc310.dts | 29 + 1 files changed, 13

[PATCH] powerpc/86xx: Update defconfig for GE Fanuc's PPC9A

2009-07-02 Thread Martyn Welch
General update of defconfig including the following notable changes: - Enable GPIO access via sysfs on GE Fanuc's PPC9A. - Enable Highmem support. - Support for PCMCIA based daughter card. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/configs/86xx/gef_ppc9a_defconfig

[PATCH] powerpc/86xx: Update GE Fanuc sbc310 default configuration

2009-07-02 Thread Martyn Welch
General update of defconfig including the following notable changes: - Enable Highmem support. - Support for PCMCIA based daughter card. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/configs/86xx/gef_sbc310_defconfig | 213 +--- 1 files changed,

Re: RAMDISK on EP88xc

2009-07-02 Thread Gary Thomas
Mikhail Zaturenskiy wrote: On Thu, Jul 2, 2009 at 2:10 AM, Frank Svendsbøefrank.svends...@gmail.com wrote: On Wed, Jul 1, 2009 at 10:14 PM, Mikhail Zaturenskiymzaturenskiy...@gmail.com wrote: Hmm... according to Kernel command line: console=ttyCPM0,9600n8 loglevel=7 you haven't specified

[PATCH 0/5] Generic NVRAM support for large MMIO devices

2009-07-02 Thread Martyn Welch
The following series allows the generic NVRAM driver to access MMIO based NVRAMs. In addition it enables support for NVRAMs of sizes differing from those found on PowerPC Macs (providing a safe fallback). Patches are also included to enable support for the NVRAM found on the GE Fanuc PPC9A,

[PATCH 1/5] Allow byte length reads from mmio NVRAM driver

2009-07-02 Thread Martyn Welch
Add a byte length read and write interface compatible with the nvram_generic driver interface to the mmio driver. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/sysdev/mmio_nvram.c | 32 1 files changed, 32 insertions(+), 0 deletions(-)

[PATCH 2/5] Mechanism to enable use Generic NVRAM driver for different size chips

2009-07-02 Thread Martyn Welch
Remove the reliance on a staticly defined NVRAM size, allowing platforms to support NVRAMs with sizes differing from the standard. A fall back value is provided for platforms not supporting this extension. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com ---

[PATCH 5/5] powerpc/86xx: Support for NVRAM on GE Fanuc's PPC9A

2009-07-02 Thread Martyn Welch
Add support for NVRAM on GE Fanuc's PPC9A. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/boot/dts/gef_ppc9a.dts |6 ++ arch/powerpc/configs/86xx/gef_ppc9a_defconfig |4 ++-- arch/powerpc/platforms/86xx/Kconfig |1 +

[PATCH 3/5] powerpc/86xx: Enable NVRAM on GE Fanuc's SBC610

2009-07-02 Thread Martyn Welch
This patch enables the NVRAM found on the GE Fanuc SBC610 Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/boot/dts/gef_sbc610.dts |6 ++ arch/powerpc/configs/86xx/gef_sbc610_defconfig |4 ++-- arch/powerpc/platforms/86xx/Kconfig|1 +

[PATCH 4/5] powerpc/86xx: Support for NVRAM on GE Fanuc's SBC310

2009-07-02 Thread Martyn Welch
Add support for NVRAM on GE Fanuc's SBC310. Signed-off-by: Martyn Welch martyn.we...@gefanuc.com --- arch/powerpc/boot/dts/gef_sbc310.dts |6 ++ arch/powerpc/configs/86xx/gef_sbc310_defconfig |4 ++-- arch/powerpc/platforms/86xx/Kconfig|1 +

Re: RAMDISK on EP88xc

2009-07-02 Thread Mikhail Zaturenskiy
I haven't tried CONFIG_BLK_DEV or CONFIG_BLK_DEV_LOOP and am still playing around with the values for CONFIG_BLK_DEV_RAM_COUNT and CONFIG_BLK_DEV_RAM_SIZE. Strangely, the DEV_RAM defines are completely missing from my config so I have to put them in manually... (as opposed to via menuconfig).

[PATCH 1/2] ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared

2009-07-02 Thread Grant Likely
From: Grant Likely grant.lik...@secretlab.ca When doing register reads, it is possible for there to be a stale data ready bit set which will cause subsequent reads to return prematurely with incorrect data. This patch fixes the issues by ensuring stale data is cleared before starting another

[PATCH 2/2] ASoC: add locking to mpc5200-psc-ac97 driver

2009-07-02 Thread Grant Likely
From: Grant Likely grant.lik...@secretlab.ca AC97 bus register read/write hooks need to provide locking, but the mpc5200-psc-ac97 driver does not. This patch adds a mutex around the register access routines. Signed-off-by: Grant Likely grant.lik...@secretlab.ca --- sound/soc/fsl/mpc5200_dma.c

RE: ppc405ex + gigabit ethernet

2009-07-02 Thread LiuMing
Yes. If you enable jumbo frames, the results will be definitely better. My result is with jumbo frame of 8982 enabled. If you say your CPU is 600 MHz, I guess there is still potential for you to improve the speed. In our case we had only 300 MHz and got a similar value of yours. Of

Re: RAMDISK on EP88xc

2009-07-02 Thread Mikhail Zaturenskiy
Just as an intermediate update on the issue, I've made progress and it hangs later down the line, see below: Using Embedded Planet EP88xC machine description Linux version 2.6.30-rc2-01402-gd4e2f68-dirty

Re: [PATCH 1/2] ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared

2009-07-02 Thread Jon Smirl
On Thu, Jul 2, 2009 at 1:57 PM, Grant Likelygrant.lik...@secretlab.ca wrote: From: Grant Likely grant.lik...@secretlab.ca When doing register reads, it is possible for there to be a stale data ready bit set which will cause subsequent reads to return prematurely with incorrect data.  This

Re: RAMDISK on EP88xc

2009-07-02 Thread Mikhail Zaturenskiy
Here is what's happening: * RAMDISK: gzip image found at block 0 VFS: Mounted root (ext2 filesystem) on device 1:0. Freeing unused kernel memory: 112k init 4 minutes pass init started: BusyBox v1.7.1 (2008-04-02

Re: [PATCH 2/2] ASoC: add locking to mpc5200-psc-ac97 driver

2009-07-02 Thread Jon Smirl
On Thu, Jul 2, 2009 at 1:57 PM, Grant Likelygrant.lik...@secretlab.ca wrote: From: Grant Likely grant.lik...@secretlab.ca AC97 bus register read/write hooks need to provide locking, but the mpc5200-psc-ac97 driver does not.  This patch adds a mutex around the register access routines.

Re: [PATCH 2/2] ASoC: add locking to mpc5200-psc-ac97 driver

2009-07-02 Thread michael
Hi, Grant Likely wrote: From: Grant Likely grant.lik...@secretlab.ca AC97 bus register read/write hooks need to provide locking, but the mpc5200-psc-ac97 driver does not. This patch adds a mutex around the register access routines. Signed-off-by: Grant Likely grant.lik...@secretlab.ca ---

Non-contiguous physical memory on 8572

2009-07-02 Thread Aaron Pace
Hello, I wrote to this list quite some time ago concerning a board that has 2 gigs of ram mapped in at 0x0.. - 0x0.7fff., and a second 2 gigs of ram at 0x1.. - 0x1.7fff.. Kumar responded and mentioned that this wasn't currently supported in the powerpc architecture. I've

Re: RAMDISK on EP88xc

2009-07-02 Thread Frank Svendsbøe
On Thu, Jul 2, 2009 at 8:42 PM, Mikhail Zaturenskiymzaturenskiy...@gmail.com wrote: Just as an intermediate update on the issue, I've made progress and it hangs later down the line, see below: Using Embedded

Re: Non-contiguous physical memory on 8572

2009-07-02 Thread Kumar Gala
On Jul 2, 2009, at 3:11 PM, Aaron Pace wrote: Hello, I wrote to this list quite some time ago concerning a board that has 2 gigs of ram mapped in at 0x0.. - 0x0.7fff., and a second 2 gigs of ram at 0x1.. - 0x1.7fff.. Kumar responded and mentioned that this wasn't

Re: Non-contiguous physical memory on 8572

2009-07-02 Thread Scott Wood
Aaron Pace wrote: In MMU_init of arch/powerpc/mm/init_32.c, where the current code sets lmb.memory.cnt to zero, I instead walk through the memory regions and call lmb_reserve for each chunk of memory that lies in a 'hole'. There are then some minor fixups to make sure that total_memory and

Re: RAMDISK on EP88xc

2009-07-02 Thread Mikhail Zaturenskiy
This is very interesting. I recently experienced a similar problem when upgrading from 2.6.26-rc6 to 2.6.31-rc1 (torvalds mainline kernel). I didn't had the time to figure out what was happening, so I went back to 2.6.26-rc6. Just for the test, could you try to go back to 2.6.26 and see if

Re: RAMDISK on EP88xc

2009-07-02 Thread Scott Wood
Mikhail Zaturenskiy wrote: This is very interesting. I recently experienced a similar problem when upgrading from 2.6.26-rc6 to 2.6.31-rc1 (torvalds mainline kernel). I didn't had the time to figure out what was happening, so I went back to 2.6.26-rc6. Just for the test, could you try to go

Re: Non-contiguous physical memory on 8572

2009-07-02 Thread Aaron Pace
On Thu, Jul 2, 2009 at 3:14 PM, Scott Woodscottw...@freescale.com wrote: Aaron Pace wrote: In MMU_init of arch/powerpc/mm/init_32.c, where the current code sets lmb.memory.cnt to zero, I instead walk through the memory regions and call lmb_reserve for each chunk of memory that lies in a

Re: RAMDISK on EP88xc

2009-07-02 Thread Mikhail Zaturenskiy
Frank! That worked like a charm! I downloaded linux-2.6.26 source from git.kernel.org, inserted the config options previously mentioned, compiled ok, keeping U-Boot ramdisk and my DTS same it booted right up and no more slow motion issue. If you have time, could you bisect to see when the

Re: Preemption question (4xx related)

2009-07-02 Thread Benjamin Herrenschmidt
On Thu, 2009-07-02 at 07:12 -0400, Josh Boyer wrote: On Thu, Jul 02, 2009 at 05:33:12PM +1000, Benjamin Herrenschmidt wrote: On Wed, 2009-07-01 at 20:14 -0400, Josh Boyer wrote: I've toyed with that idea myself. I keep coming back to the fact that you need a workload that would really

Re: Preemption question (4xx related)

2009-07-02 Thread Josh Boyer
On Fri, Jul 03, 2009 at 08:41:00AM +1000, Benjamin Herrenschmidt wrote: On Thu, 2009-07-02 at 07:12 -0400, Josh Boyer wrote: On Thu, Jul 02, 2009 at 05:33:12PM +1000, Benjamin Herrenschmidt wrote: On Wed, 2009-07-01 at 20:14 -0400, Josh Boyer wrote: I've toyed with that idea myself. I keep

Re: Subject: [PATCH v8] spi: Add PPC4xx SPI driver

2009-07-02 Thread David Brownell
On Friday 26 June 2009, Steven A. Falco wrote: + +   /* +    * If there are no chip selects at all, or if this is the special +    * case of a non-existent (dummy) chip select, do nothing. +    */ + +   if (!hw-master-num_chipselect || hw-gpios[cs] == -EEXIST) + 

RE: [PATCH 1/2] KVM/PPC: Fix PPC KVM e500_tlb.c build error

2009-07-02 Thread Liu Yu-B13201
-Original Message- From: Avi Kivity [mailto:a...@redhat.com] Sent: Thursday, July 02, 2009 7:20 PM To: Liu Yu-B13201 Cc: Yang Shi; holl...@us.ibm.com; kvm-...@vger.kernel.org; k...@vger.kernel.org; linuxppc-...@ozlabs.org Subject: Re: [PATCH 1/2] KVM/PPC: Fix PPC KVM e500_tlb.c

Re: [spi-devel-general] [PATCH -mm v4][POWERPC] mpc8xxx : allow SPI without cs.

2009-07-02 Thread David Brownell
On Friday 19 June 2009, Rini van Zetten wrote: This patch adds the possibility to have a spi device without a cs. Note that there's now the SPI_NO_CS bit in spi_device.mode to describe this situation ... so no -EEXIST hackery should ever tempt anyone again.

mpc52xx_uart.c - Port Overruns

2009-07-02 Thread Damien Dusha
Dear List, I am writing to ask about some particular behaviour we saw with the MPC5121 PSC UART, using the 2.6.24 Freescle BSP kernel, although examining the code of the linux-2.6-denx tree (git commit 7cb16ec2590815a67e5fb5c8994ead536613d922), the behavior is almost identical except for