Hi all,
I was reading kernel level source and found this macro.
#define SET_REG_TO_LABEL(reg, label)\
lis reg,(label)@highest;\
ori reg,reg,(label)@higher; \
rldicr reg,reg,32,31; \
oris
* FUJITA Tomonori fujita.tomon...@lab.ntt.co.jp wrote:
On Mon, 13 Jul 2009 13:20:22 +0900
FUJITA Tomonori fujita.tomon...@lab.ntt.co.jp wrote:
On Fri, 10 Jul 2009 16:12:48 +0200
Ingo Molnar mi...@elte.hu wrote:
functionality and reimplemented the surrounding infrastructure in
Dear Valentine,
In message 4a61a48d.8060...@ru.mvista.com you wrote:
PowerPC instructions are 32-bit long. So, there are only 16 bits
available within the instruction for constant values. Since address can
be up to 64 bits, we have to load it a piece at a time. The @ within
the assembler
This patch fixes a memory and semaphore leak in the viotape driver's
char device write op. It leaks the DMA memory and the semaphore lock
in case the device was opened with O_NONBLOCK.
This patch is only compile tested, because I do not have the hardware.
Signed-off-by: Michael Buesch
Wolfgang Denk wrote:
Dear Valentine,
In message 4a61a48d.8060...@ru.mvista.com you wrote:
PowerPC instructions are 32-bit long. So, there are only 16 bits
available within the instruction for constant values. Since address can
be up to 64 bits, we have to load it a piece at a time. The @
On Fri, Jul 17, 2009 at 01:31:25AM -0600, Grant Likely wrote:
[...]
Part of the problem I think is that the phylib code merges two separate
constructs; the construct of an MDIO bus (on which many device may
reside, not all of them PHYs), and the construct of an MII link whose
speed and
On Sat, Jul 18, 2009 at 12:04 PM, Anton
Vorontsovavoront...@ru.mvista.com wrote:
On Fri, Jul 17, 2009 at 01:31:25AM -0600, Grant Likely wrote:
[...]
Part of the problem I think is that the phylib code merges two separate
constructs; the construct of an MDIO bus (on which many device may
Hi all,
I have a question about cache activation on the Xilinx Virtex4 ML403 board.
I know that PowerPC instruction and data caches have to be activated
manually with the command
XCache_EnableICache();
XCache_EnableDCache();
It works well with the standalone application, but how about it in
