-Original Message-
From: David Miller [mailto:da...@davemloft.net]
Sent: Thursday, August 20, 2009 10:31 AM
To: michal.si...@petalogix.com
Cc: John Linn; net...@vger.kernel.org; linuxppc-...@ozlabs.org;
jgar...@pobox.com;
grant.lik...@secretlab.ca; jwbo...@linux.vnet.ibm.com;
This patch adds support for the Xilinx Ethernet Lite device. The
soft logic core from Xilinx is typically used on Virtex and Spartan
designs attached to either a PowerPC or a Microblaze processor.
CC: Grant Likely grant.lik...@secretlab.ca
CC: Josh Boyer jwbo...@linux.vnet.ibm.com
CC: John
From: John Linn john.l...@xilinx.com
Date: Thu, 20 Aug 2009 03:49:51 -0600
This patch adds support for the Xilinx Ethernet Lite device. The
soft logic core from Xilinx is typically used on Virtex and Spartan
designs attached to either a PowerPC or a Microblaze processor.
Signed-off-by:
David Miller wrote:
From: John Linn john.l...@xilinx.com
Date: Wed, 19 Aug 2009 06:29:11 -0600
This patch adds support for the Xilinx Ethernet Lite device. The
soft logic core from Xilinx is typically used on Virtex and Spartan
designs attached to either a PowerPC or a Microblaze
On Tue, Aug 18, 2009 at 10:28:03AM +0800, Tiejun Chen wrote:
For cuImage format it's necessary to provide clock fixups since u-boot will
not pass necessary clock frequency into the dtb included into cuImage so we
implement the clock fixups as defined in the technical documentation for the
board
On Tue, Aug 18, 2009 at 10:28:04AM +0800, Tiejun Chen wrote:
To support cuImage, we need to initialize the required sections and
ensure that it is built.
- cuboot-acadia.c cuboot-amigaone.c
+ cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
src-boot := $(src-wlib)
John,
I just got a chance to browse this... Do you want to put in the
stripped device names?
.compatible = xlnx,xps-ethernetlite-2, etc...
Steve
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be
On Thu, 20 Aug 2009 03:49:51 -0600
John Linn john.l...@xilinx.com wrote:
+/**
+ * xemaclite_ioctl - Perform IO Control operations on the network device
+ * @dev: Pointer to the network device
+ * @rq: Pointer to the interface request structure
+ * @cmd: IOCTL command
+
On Thu, Aug 20, 2009 at 10:02 AM, Stephen
Neuendorfferstephen.neuendorf...@xilinx.com wrote:
John,
I just got a chance to browse this... Do you want to put in the
stripped device names?
.compatible = xlnx,xps-ethernetlite-2, etc...
We've covered this territory before. Compatible values
On Mon, Aug 17, 2009 at 11:13:59AM -0400, Josh Boyer wrote:
There is another way. Perhaps you could just copy ppcboot.h to a new file
called hotfoot.h and just use that. It's a duplication of ppcboot.h to
some degree, but it seems to make sense for your board and it helps preserve
the stock
Sorry... you're right... brain fart on my part.. :)
Steve
-Original Message-
From: glik...@secretlab.ca [mailto:glik...@secretlab.ca] On Behalf Of Grant
Likely
Sent: Thursday, August 20, 2009 10:45 AM
To: Stephen Neuendorffer
Cc: John Linn; net...@vger.kernel.org;
On Thu, Aug 20, 2009 at 01:45:19PM -0400, Solomon Peachy wrote:
On Mon, Aug 17, 2009 at 11:13:59AM -0400, Josh Boyer wrote:
There is another way. Perhaps you could just copy ppcboot.h to a new file
called hotfoot.h and just use that. It's a duplication of ppcboot.h to
some degree, but it
On Thu, 20 Aug 2009 07:01:21 +0200
Stefan Roese s...@denx.de wrote:
On Thursday 20 August 2009 06:38:51 Sean MacLennan wrote:
I see other boards using SMC as well, can someone comment on the
change I am proposing.
Should I change the correction algorithm or the calculate
function? If
[PATCH v2] Add support for the ESTeem 195E (PPC405EP) SBC
This patch adds support for the ESTeem 195E Hotfoot SBC.
I've been maintaining this out-of-tree for some time now for
older kernels, but recently I ported it to the new unified powerpc
tree with the intent of
This patch adds support for the ESTeem 195E Hotfoot SBC.
I've been maintaining this out-of-tree for some time now for
older kernels, but recently I ported it to the new unified powerpc
tree with the intent of pushing it upstream.
The 195E boards use ancient versions of u-boot and a slightly
(switched to email. Please respond via emailed reply-to-all, not via the
bugzilla web interface).
On Thu, 20 Aug 2009 02:17:21 GMT
bugzilla-dae...@bugzilla.kernel.org wrote:
http://bugzilla.kernel.org/show_bug.cgi?id=14021
Summary: hfsplus caused data loss
Product:
Hi,
I noticed if I compile with CONFIG_PPC_64K_PAGES, I run into the following
issue.
read_dnode: tn-csize == 0, csize == 65536
check_node: tn-csize == 0 BUG_ON assert
Look like an OVERFLOW bug. Is this correct?
Here is the problem
fs/jffs2/nodelist.h
From: Peter Huewe peterhu...@gmx.de
Trivial patch which adds the __init/__exit macros to the module_init/
module_exit functions of char/hvc_vio.c
Please have a look at the small patch and either pull it through
your tree, or please ack' it so Jiri can pull it through the trivial tree.
linux
Hi Sean,
The change is necessary in both Linux and u-boot. Without this change customer
are seeing the problem.
Best Regards,
Victor Gallardo
-Original Message-
From: linuxppc-dev-bounces+vgallardo=amcc@lists.ozlabs.org
[mailto:linuxppc-dev-
On POWER6 systems RA needs to be the base and RB the index.
If they are reversed you take a misdirect hit.
Signed-off-by: Mike Wolf mjw...@us.ibm.com
--- altivec.orig/arch/powerpc/include/asm/ppc_asm.h 2009-08-17
15:39:52.0 -0500
+++
Hi Stefan:
We had a board with high number of correctable ECC errors. Which crashed
the jffs when it
was miss correcting the wrong byte location.
Do you want me to submit a patch for this, or do you prefer to do it. I
am submitting a patch
for linux right now.
Feng Kan
AMCC Software
On
Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
/* The NDFC uses Smart Media (SMC) bytes order */
On Thu, 20 Aug 2009 17:19:17 -0700
Feng Kan f...@amcc.com wrote:
Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
Hi Dave,
Today's linux-next merge of the agp tree got a conflict in
drivers/char/agp/uninorth-agp.c between commit uninorth_create_gatt_table
(agp/uninorth: Simplify cache flushing) from the powerpc tree and
commit 6a12235c7d2d75c7d94b9afcaaecd422ff845ce0 (agp: kill phys_to_gart
() and
snip
With the current ndfc code, the error correction gets the bits wrong.
Switching it back to the original way and the correction is correct.
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 89bf85a..497e175 100644
--- a/drivers/mtd/nand/ndfc.c
+++
Ben and Kumar,
Compile tested only. I haven't even tried to boot this on real
hardware, but I'm posting so that you guys can see what I'm up to.
Basically, I want access to the device tree scanning in ppc32 land,
and these patches start to get me there. Please take a look and
comment. Tomorrow
From: Grant Likely grant.lik...@secretlab.ca
PPC_OF is always selected for arch/powerpc. This patch removes the stale
#defines
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
arch/powerpc/kernel/pci-common.c |8
arch/powerpc/kernel/pci_32.c |9 -
2 files
From: Grant Likely grant.lik...@secretlab.ca
The two versions are doing almost exactly the same thing. No need to
maintain them as separate files. This patch also has the side effect
of making the PCI device tree scanning code available to 32 bit powerpc
machines, but no board ports actually
From: Grant Likely grant.lik...@secretlab.ca
The PCI device tree scanning code in pci_64.c is some useful functionality.
It allows PCI devices to be described in the device tree instead of being
probed for, which in turn allows pci devices to use all of the device tree
facilities to describe
Josh Boyer wrote:
On Tue, Aug 18, 2009 at 10:28:04AM +0800, Tiejun Chen wrote:
To support cuImage, we need to initialize the required sections and
ensure that it is built.
-cuboot-acadia.c cuboot-amigaone.c
+cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
Hi Grant,
On Thu, 20 Aug 2009 23:30:09 -0600 Grant Likely grant.lik...@secretlab.ca
wrote:
From: Grant Likely grant.lik...@secretlab.ca
PPC_OF is always selected for arch/powerpc. This patch removes the stale
#defines
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
Good work.
Josh Boyer wrote:
On Tue, Aug 18, 2009 at 10:28:03AM +0800, Tiejun Chen wrote:
For cuImage format it's necessary to provide clock fixups since u-boot will
not pass necessary clock frequency into the dtb included into cuImage so we
implement the clock fixups as defined in the technical
On Fri, 2009-08-14 at 22:57 +0100, Catalin Marinas wrote:
On Fri, 2009-08-14 at 12:49 -0700, David Miller wrote:
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Date: Fri, 14 Aug 2009 17:56:40 +1000
On Thu, 2009-08-13 at 16:40 +0100, Catalin Marinas wrote:
On Thu, 2009-08-13 at
Hi all,
I found that the header file(dma-mapping.h) has changed. I saw this
change has happened on Linux -2.6.28 kernel onwards. earlier kernel is having
COMFIT_PPC64 macro. Based on this macro the things were happened. Is there any
fixes available right now or any reasons behind this
From: John Linn john.l...@xilinx.com
Date: Wed, 19 Aug 2009 06:29:11 -0600
This patch adds support for the Xilinx Ethernet Lite device. The
soft logic core from Xilinx is typically used on Virtex and Spartan
designs attached to either a PowerPC or a Microblaze processor.
Signed-off-by:
From: Michal Simek michal.si...@petalogix.com
Date: Thu, 20 Aug 2009 11:28:48 +0200
There were one bug with spinlock which John L fixed but not send to
mainling list. :-(
He wanted to create new v3 version. :-(.
When he wake up, he send you that bug fix or v3 version with it.
Send a new
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