On Mon, May 17, 2010 at 12:54 PM, Scott Wood scottw...@freescale.com wrote:
On Fri, May 14, 2010 at 02:41:29PM -0700, Shawn Jin wrote:
Hi,
Is mpc870 fully supported in the powerpc arch? I know it's an old
processor but 8xx is still one of platforms in the powerpc arch. If
it's not supported,
On 25.06.2010, at 11:02, Denis Kirjanov wrote:
On 06/25/2010 12:42 AM, Alexander Graf wrote:
On 24.06.2010, at 21:44, Denis Kirjanov wrote:
Fix build warning:
arch/powerpc/kvm/book3s_64_mmu.c: In function
'kvmppc_mmu_book3s_64_esid_to_vsid':
arch/powerpc/kvm/book3s_64_mmu.c:446:
Hi!
I've recently changed gcc handling of inline-asm, such that it by default
disallows side-effects on memory operands of inline-asm and only allows
them if or constraint is present for the operand.
See http://gcc.gnu.org/PR44492 and http://bugzilla.redhat.com/602359
for details. The change
- stw%U0%X0 %L2,%1
- : =m (*ptep), =m (*((unsigned char *)ptep+4))
+ stw%U1%X1 %L2,%1
+ : =m (*ptep), =m (*((unsigned char *)ptep+4))
: r (pte) : memory);
This still isn't correct -- the constraint says that a byte
is written, but the insn changes a
On Fri, Jun 25, 2010 at 01:08:23PM +0200, Segher Boessenkool wrote:
- stw%U0%X0 %L2,%1
- : =m (*ptep), =m (*((unsigned char *)ptep+4))
+ stw%U1%X1 %L2,%1
+ : =m (*ptep), =m (*((unsigned char *)ptep+4))
: r (pte) : memory);
This still isn't correct -- the
Guys,
We seem to be using the PPC_FEATURE_64 HWCAP to imply fsqrt support. However,
the new e5500 core from Freescale that is 64-bit does NOT implement fsqrt so
this assumption is wrong:
sysdeps/powerpc/fpu/math_private.h
# if __WORDSIZE == 64 || defined _ARCH_PWR4
# define __CPU_HAS_FSQRT
Hi All!
We are planning to port linux 2.6.21.7 to powerpc p4080 using ramdisk
file system, but to find it failed at :
run_init_process(ramdisk_execute_command)
The exact failing place is at run_init_process---
do_execve---search_binary_handler --- load_elf_binary --- if
On 06/25/2010 04:08 AM, Shawn Jin wrote:
On Mon, May 17, 2010 at 12:54 PM, Scott Woodscottw...@freescale.com wrote:
On Fri, May 14, 2010 at 02:41:29PM -0700, Shawn Jin wrote:
Hi,
Is mpc870 fully supported in the powerpc arch? I know it's an old
processor but 8xx is still one of platforms in
On Tue, Jun 22, 2010 at 5:00 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Tue, Jun 15, 2010 at 12:05:05PM -0400, Eric Millbrandt wrote:
These patches reimplement the reset fuction in the ac97 to use gpio pins
instead of using the mpc5200 ac97 reset functionality in the psc.
Due to previous changes, the Book3S_32 guest MMU code didn't compile properly
when enabling debugging.
This patch repairs the broken code paths, making it possible to define DEBUG_MMU
and friends again.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_32_mmu.c |4 ++--
We just introduced generic functions to handle shadow pages on PPC.
This patch makes the respective backends make use of them, getting
rid of a lot of duplicate code along the way.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_book3s.h |7 ++
Book3s suffered from my really bad shadow MMU implementation so far. So
I finally got around to implement a combined hash and list mechanism that
allows for much faster lookup of mapped pages.
To show that it really is faster, I tried to run simple process spawning
code inside the guest with and
Currently the shadow paging code keeps an array of entries it knows about.
Whenever the guest invalidates an entry, we loop through that entry,
trying to invalidate matching parts.
While this is a really simple implementation, it is probably the most
ineffective one possible. So instead, let's
On 26.06.2010, at 01:16, Alexander Graf wrote:
Currently the shadow paging code keeps an array of entries it knows about.
Whenever the guest invalidates an entry, we loop through that entry,
trying to invalidate matching parts.
While this is a really simple implementation, it is probably
On PPC we run PR=0 (kernel mode) code in PR=1 (user mode) and don't use the
hypervisor extensions.
While that is all great to show that virtualization is possible, there are
quite some cases where the emulation overhead of privileged instructions is
killing performance.
This patchset tackles
The DSISR register contains information about a data page fault. It is fully
read/write from inside the guest context and we don't need to worry about
interacting based on writes of this register.
This patch converts all users of the current field to the shared page.
Signed-off-by: Alexander
The SRR0 and SRR1 registers contain cached values of the PC and MSR
respectively. They get written to by the hypervisor when an interrupt
occurs or directly by the kernel. They are also used to tell the rfi(d)
instruction where to jump to.
Because it only gets touched on defined events that, it's
The DAR register contains the address a data page fault occured at. This
register behaves pretty much like a simple data storage register that gets
written to on data faults. There is no hypervisor interaction required on
read or write.
This patch converts all users of the current field to the
One of the most obvious registers to share with the guest directly is the
MSR. The MSR contains the interrupts enabled flag which the guest has to
toggle in critical sections.
So in order to bring the overhead of interrupt en- and disabling down, let's
put msr into the shared page. Keep in mind
On PowerPC it's very normal to not support all of the physical RAM in real mode.
To check if we're matching on the shared page or not, we need to know the limits
so we can restrain ourselves to that range.
So let's make it a define instead of open-coding it. And while at it, let's also
increase
Now that we have the shared page in place and the MMU code knows about
the magic page, we can expose that capability to the guest!
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_para.h |2 ++
arch/powerpc/kvm/powerpc.c | 11 +++
2 files
To communicate with KVM directly we need to plumb some sort of interface
between the guest and KVM. Usually those interfaces use hypercalls.
This hypercall implementation is described in the last patch of the series
in a special documentation file. Please read that for further information.
This
While running in hooked code we need to store register contents out because
we must not clobber any registers.
So let's add some fields to the shared page we can just happily write to.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_para.h |3 +++
1 files
For transparent variable sharing between the hypervisor and guest, I introduce
a shared page. This shared page will contain all the registers the guest can
read and write safely without exiting guest context.
This patch only implements the stubs required for the basic structure of the
shared
We will soon require more sophisticated methods to replace single instructions
with multiple instructions. We do that by branching to a memory region where we
write replacement code for the instruction to.
This region needs to be within 32 MB of the patched instruction though, because
that's the
When in kernel mode there are 4 additional registers available that are
simple data storage. Instead of exiting to the hypervisor to read and
write those, we can just share them with the guest using the page.
This patch converts all users of the current field to the shared page.
Signed-off-by:
We need to override EA as well as PA lookups for the magic page. When the guest
tells us to project it, the magic page overrides any guest mappings.
In order to reflect that, we need to hook into all the MMU layers of KVM to
force map the magic page if necessary.
Signed-off-by: Alexander Graf
When running in hooked code we need a way to disable interrupts without
clobbering any interrupts or exiting out to the hypervisor.
To achieve this, we have an additional critical field in the shared page. If
that field is equal to the r1 register of the guest, it tells the hypervisor
that we're
As we now have Book3s support for the magic page, we also need BookE to
join in on the party.
This patch implements generic magic page logic for BookE and specific
TLB logic for e500. I didn't have any 440 around, so I didn't dare to
blindly try and write up broken code.
Signed-off-by: Alexander
We have all the hypervisor pieces in place now, but the guest parts are still
missing.
This patch implements basic awareness of KVM when running Linux as guest. It
doesn't do anything with it yet though.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kernel/Makefile |2 ++
Some instructions can simply be replaced by load and store instructions to
or from the magic page.
This patch replaces often called instructions that fall into the above category.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kernel/kvm.c | 111
When the guest turns on interrupts again, it needs to know if we have an
interrupt pending for it. Because if so, it should rather get out of guest
context and get the interrupt.
So we introduce a new field in the shared page that we use to tell the guest
that there's a pending interrupt lying
When we hook an instruction we need to make sure we don't clobber any of
the registers at that point. So we write them out to scratch space in the
magic page. To make sure we don't fall into a race with another piece of
hooked code, we need to disable interrupts.
To make the later patches and
The PowerPC ISA has a special instruction for mtmsr that only changes the EE
and RI bits, namely the L=1 form.
Since that one is reasonably often occuring and simple to implement, let's
go with this first. Writing EE=0 is always just a store. Doing EE=1 also
requires us to check for pending
We just introduced a new PV interface that screams for documentation. So here
it is - a shiny new and awesome text file describing the internal works of
the PPC KVM paravirtual interface.
Signed-off-by: Alexander Graf ag...@suse.de
---
Documentation/kvm/ppc-pv.txt | 164
We will soon start and replace instructions from the text section with
other, paravirtualized versions. To ease the readability of those patches
I split out the generic looping and magic page mapping code out.
This patch still only contains stubs. But at least it loops through the
text section
Currently x86 is the only architecture that uses kvm_guest_init(). With
PowerPC we're getting a second user, but the signature is different there
and we don't need to export it, as it uses the normal kernel init framework.
So let's move the x86 specific definition of that function over to the x86
With our current MMU scheme we don't need to know about the tlbsync instruction.
So we can just nop it out.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kernel/kvm.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/kvm.c
We will be introducing a method to project the shared page in guest context.
As soon as we're talking about this coupling, the shared page is colled magic
page.
This patch introduces simple defines, so the follow-up patches are easier to
read.
Signed-off-by: Alexander Graf ag...@suse.de
---
There is also a form of mtmsr where all bits need to be addressed. While the
PPC64 Linux kernel behaves resonably well here, the PPC32 one never uses the
L=1 form but does mtmsr even for simple things like only changing EE.
So we need to hook into that one as well and check for a mask of bits
On BookE the preferred way to write the EE bit is the wrteei instruction. It
already encodes the EE bit in the instruction.
So in order to get BookE some speedups as well, let's also PV'nize thati
instruction.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kernel/kvm.c | 50
-Original Message-
From: linux-mtd-boun...@lists.infradead.org
[mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
Steve Deiters
Sent: Thursday, June 24, 2010 3:02 PM
To: linux-...@lists.infradead.org
Subject: RE: JFFS2 corruption when mounting filesystem with
filenames
On 06/25/2010 12:42 AM, Alexander Graf wrote:
On 24.06.2010, at 21:44, Denis Kirjanov wrote:
Fix build warning:
arch/powerpc/kvm/book3s_64_mmu.c: In function
'kvmppc_mmu_book3s_64_esid_to_vsid':
arch/powerpc/kvm/book3s_64_mmu.c:446: warning: 'slb' may be used uninitialized
in this function
On 06/25/2010 01:02 PM, Denis Kirjanov wrote:
On 06/25/2010 12:42 AM, Alexander Graf wrote:
On 24.06.2010, at 21:44, Denis Kirjanov wrote:
Fix build warning:
arch/powerpc/kvm/book3s_64_mmu.c: In function
'kvmppc_mmu_book3s_64_esid_to_vsid':
arch/powerpc/kvm/book3s_64_mmu.c:446: warning:
44 matches
Mail list logo
