On Mon, 2012-07-23 at 12:14 +0530, Aneesh Kumar K.V wrote:
>
> if it is 0.. 15 then that clear bit is wrong right ? We are doing that
> on a 64 bit va. So with that we already have ignored 0..14.
It's bit 0..15 of RB passed to tlbie
Cheers,
Ben.
___
Paul Mackerras writes:
> On Mon, Jul 23, 2012 at 11:22:08AM +1000, Benjamin Herrenschmidt wrote:
>> On Mon, 2012-07-23 at 09:56 +1000, Paul Mackerras wrote:
>> > > That indicate we should not mask the top 16 bits. So remove the
>> > same.
>> >
>> > Older versions of the architecture (2.02 and ea
Reduce the severity of the warning given when firmware flash is
not supported. Not all platforms have it.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/kernel/rtas_flash.c
===
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b
Allright, another one Grant:
unsigned int irq_find_mapping(struct irq_domain *domain,
irq_hw_number_t hwirq)
{
struct irq_data *data;
/* Look for default domain if nececssary */
if (domain == NULL)
domain = irq_default_domain;
Enable the hardware RNG and crypto modules. I verified they both
autoload via the VIO subsystem, so there is no need to build them in.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/configs/ppc64_defconfig
===
--- a/arch/
Paul Mackerras writes:
> On Mon, Jul 09, 2012 at 06:43:34PM +0530, Aneesh Kumar K.V wrote:
>> From: "Aneesh Kumar K.V"
>>
>> Rename the variable to better reflect the values. No functional change
>> in this patch.
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> I think you missed a couple: kernel_m
On Fri, 2012-07-20 at 20:21 +0800, Shaohui Xie wrote:
> PowerPC platform only supports ZONE_DMA zone for 64bit kernel, so all the
> memory will be put into this zone. If the memory size is greater than
> the device's DMA capability and device uses dma_alloc_coherent to allocate
> memory, it will ge
Paul Mackerras writes:
> On Mon, Jul 09, 2012 at 06:43:33PM +0530, Aneesh Kumar K.V wrote:
>> From: "Aneesh Kumar K.V"
>>
>> This patch convert different functions to take virtual page number
>> instead of virtual address. Virtual page number is virtual address
>> shifted right by VPN_SHIFT (12
Paul Mackerras writes:
> On Mon, Jul 09, 2012 at 06:43:32PM +0530, Aneesh Kumar K.V wrote:
>> From: "Aneesh Kumar K.V"
>>
>> This patch simplify hpte_decode for easy switching of virtual address to
>> virtual page number in the later patch
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> I'm not con
Hi Linus !
Here's the powerpc batch for 3.6 merge window. Notable highlights:
- iommu improvements from Anton removing the per-iommu global lock
in favor of dividing the DMA space into pools, each with its own lock,
and hashed on the CPU number. Along with making the locking more fine
grained, t
On Mon, Jul 23, 2012 at 11:22:08AM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2012-07-23 at 09:56 +1000, Paul Mackerras wrote:
> > > That indicate we should not mask the top 16 bits. So remove the
> > same.
> >
> > Older versions of the architecture (2.02 and earler) require the
> > masking, s
This updates the g5 defconfig to include nouveau instead of nvidiafb
(which works much better nowadays, in fact the latter crashes on modern
distros), and to set CONFIG_VT_HW_CONSOLE_BINDING without which takeover
from the firmware offb by nouveau doesn't work properly (and leads to
unexplained bla
On Sat, 2012-07-21 at 19:47 -0700, Hugh Dickins wrote:
> I have to revert the patch below from mmotm 2012-07-20-16-30 or
> next-20120720 in order to boot on the PowerPC G5: otherwise it
> freezes before switching to the framebuffer console - but I'm
> not certain where because that initial console
On 07/18/2012 11:04 AM, Scott Wood wrote:
> On 07/17/2012 09:38 PM, Rob Herring wrote:
>> On 07/17/2012 08:11 PM, Scott Wood wrote:
>>> Commit 107a84e61cdd3406c842a0e4be7efffd3a05dba6 ("of: match by compatible
>>> property first") breaks the gianfar ethernet driver found on various
>>> Freescale PP
On Mon, 2012-07-23 at 09:56 +1000, Paul Mackerras wrote:
> > That indicate we should not mask the top 16 bits. So remove the
> same.
>
> Older versions of the architecture (2.02 and earler) require the
> masking, so we can't just unconditionally remove it, since that would
> potentially break POWE
On Mon, Jul 09, 2012 at 06:43:35PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> ISA doc doesn't talk about this. As per ISA doc for a 4K page
>
> tlbie RB RS
>
> " The Abbreviated Virtual Address (AVA) field in register RB must
> contain bits 14:65 of the virtual address
On Mon, Jul 09, 2012 at 06:43:38PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> slice array size and slice mask size depend on PGTABLE_RANGE. We
> can't directly include pgtable.h in these header because there is
> a circular dependency. So add compile time check for these values
On Mon, Jul 09, 2012 at 06:43:41PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Increase max addressable range to 64TB. This is not tested on
> real hardware yet.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/mmu-hash64.h|8
> arch/p
On Mon, Jul 09, 2012 at 06:43:33PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> This patch convert different functions to take virtual page number
> instead of virtual address. Virtual page number is virtual address
> shifted right by VPN_SHIFT (12) bits. This enable us to have a
On Mon, Jul 09, 2012 at 06:43:37PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> This patch makes the high psizes mask as an unsigned char array
> so that we can have more than 16TB. Currently we support upto
> 64TB
Some comments inline...
> @@ -804,16 +804,19 @@ unsigned int ha
On Mon, Jul 09, 2012 at 06:43:39PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Increase the number of valid VSID bits in slbmte instruction.
> We will use the new bits when we increase valid VSID bits.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/mm/slb_low.S |
On Mon, Jul 09, 2012 at 06:43:31PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Don't open code the same
>
> Signed-off-by: Aneesh Kumar K.V
Reviewed-by: Paul Mackerras
___
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On Mon, Jul 09, 2012 at 06:43:32PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> This patch simplify hpte_decode for easy switching of virtual address to
> virtual page number in the later patch
>
> Signed-off-by: Aneesh Kumar K.V
I'm not convinced your version is simpler than
On Mon, Jul 09, 2012 at 06:43:34PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> Rename the variable to better reflect the values. No functional change
> in this patch.
>
> Signed-off-by: Aneesh Kumar K.V
I think you missed a couple: kernel_map_linear_page and
kernel_unmap_line
On Mon, Jul 09, 2012 at 06:43:40PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> With larger vsid we need to track more bits of ESID in slb cache
> for slb invalidate.
>
> Signed-off-by: Aneesh Kumar K.V
Minor comment below, but apart from that...
Reviewed-by: Paul Mackerras
On Mon, Jul 09, 2012 at 06:43:36PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> As we keep increasing PGTABLE_RANGE we need not increase the virual
> map area for kernel.
>
> Signed-off-by: Aneesh Kumar K.V
Reviewed-by: Paul Mackerras
_
> > > Can you break this patch into a few parts that are easier to review than
> > > one giant patch. Start by adding the PPR ftr bits, then the extra space
> > > in the paca, then the new macros, then use the new infrastructure. I'm
> > > sure you can get 5 or so patches which will be much easie
Haren Myneni wrote:
> On Mon, 2012-07-16 at 13:41 +1000, Michael Neuling wrote:
> > Heaven Myneni wrote:
> >
> > > powerpc: SMT priority (PPR) save and restore
> > Can you break this patch into a few parts that are easier to review than
> > one giant patch. Start by adding the PPR ftr bits,
On Sun, 22 Jul 2012, Benjamin Herrenschmidt wrote:
> On Sat, 2012-07-21 at 19:47 -0700, Hugh Dickins wrote:
> > I have to revert the patch below from mmotm 2012-07-20-16-30 or
> > next-20120720 in order to boot on the PowerPC G5: otherwise it
> > freezes before switching to the framebuffer console
On Sat, 2012-07-21 at 19:47 -0700, Hugh Dickins wrote:
> I have to revert the patch below from mmotm 2012-07-20-16-30 or
> next-20120720 in order to boot on the PowerPC G5: otherwise it
> freezes before switching to the framebuffer console - but I'm
> not certain where because that initial console
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