On 07/18/2013 07:01 AM, Michael Neuling wrote:
POWER8 comes with two different PVRs. This patch enables the additional
PVR in the cputable.
The existing entry (PVR=0x4b) is renamed to POWER8E and the new entry
(PVR=0x4d) is given POWER8.
Hey Mikey,
Is there any feature or architectural
Anshuman Khandual khand...@linux.vnet.ibm.com wrote:
On 07/18/2013 07:01 AM, Michael Neuling wrote:
POWER8 comes with two different PVRs. This patch enables the additional
PVR in the cputable.
The existing entry (PVR=0x4b) is renamed to POWER8E and the new entry
(PVR=0x4d) is given
On Mon, Jul 15, 2013 at 21:38 +0200, Sascha Hauer wrote:
On Mon, Jul 15, 2013 at 08:47:34PM +0200, Gerhard Sittig wrote:
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@
On Thu, Jul 18, 2013 at 09:04:02AM +0200, Gerhard Sittig wrote:
On Mon, Jul 15, 2013 at 21:38 +0200, Sascha Hauer wrote:
On Mon, Jul 15, 2013 at 08:47:34PM +0200, Gerhard Sittig wrote:
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
On Thu, Jul 18, 2013 at 09:04:02AM +0200, Gerhard Sittig wrote:
The common clock API assumes (it's part of the contract) that
there are potentially expensive operations like get, put, prepare
and unprepare, as well as swift and non-blocking operations like
enable and disable.
Let's get
On Thu, Jul 18, 2013 at 10:06:57AM +0200, Sascha Hauer wrote:
I think regmap has the potential to solve a number of issues like the
hardcoded readl/writel in the common clock blocks, issues with i2c
clocks and your endianess issue. The biggest question probably is how
to get there without
On 07/17/2013 09:30:45 PM, Zang Roy-R61911 wrote:
-Original Message-
From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
ow...@vger.kernel.org] On Behalf Of Scott Wood
On 07/17/2013 05:11:30 AM, Haijun Zhang wrote:
Vender version and sdhc spec version of T4240-R1.0 is
this series introduces support for the common clock framework (CCF,
COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform
although the series does touch several subsystems -- serial, spi, net
(can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of the
patches are strictly
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
must prepare clocks before enabling them, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Signed-off-by: Gerhard Sittig g...@denx.de
---
include/dt-bindings/clock/mpc512x-clock.h | 59 +
1
this addresses the clock driver aka provider's side of clocks
- prepare for future 'clks ID' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default
this change introduces a clock infrastructure implementation for the
MPC512x PowerPC platform which follows the COMMON_CLK approach and uses
common clock drivers shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use mclk
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c |6 +-
1
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use mclk
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |8
after the peripheral drivers for UART and SPI mode (both using the PSC
controller) got converted to device tree based clock lookups, the
platform clock driver need no longer provide the psc%d_mclk name which
depends on the PSC index number -- remove the clk_register_clkdev() call
Signed-off-by:
prepare and enable the FIFO clock upon PSC FIFO initialization,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |
On Thu, 18 Jul 2013, Russell King - ARM Linux wrote:
1. clk_get() and clk_put() are NOT part of the common clock API.
They're separate - they're part of the clk API, and the infrastructure
behind that is clkdev, which is a separately owned thing (by me.)
2. The contract of the clk API
From: Runzhen Wang runz...@linux.vnet.ibm.com
Power7 supports over 530 different perf events but only a small subset
of these can be specified by name, for the remaining events, we must
specify them by their raw code:
perf stat -e r2003c application
This patch makes all the POWER7
From: Arnaldo Carvalho de Melo a...@ghostprotocols.net
Hi Ingo,
Please consider pulling.
There was a long delay in processing patches related to my vacations
that took longer than antecipated to being addressed.
With the recent acme/perf/urgent merge and this one I get
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
adapt the DIU clock initialization to the COMMON_CLK approach: device
tree based clock lookup, prepare and unprepare for clocks, work with
frequencies not dividers, call the appropriate clk_*() routines and
don't access CCM registers, remove the pre-enable workaround in the
platform's clock driver
extend the mscan(4) driver with alternative support for the COMMON_CLK
approach which is an option in the MPC512x platform, keep the existing
clock support implementation in place since the driver is shared with
other MPC5xxx SoCs which don't have common clock support
one byproduct of this change
device tree based clock lookup in the MPC512x initialization (lookup
'per' for register access), add error check in the clock setup, must
prepare clocks before they can get enabled, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 24
make the MPC I2C driver prepare and enable the peripheral clock
('per' for register access) in the MPC512x setup routine,
make this clock setup non-fatal to allow for a migration period,
remove the pre-enabling hack in the platform's clock driver
Signed-off-by: Gerhard Sittig g...@denx.de
---
device tree based clock lookup, must prepare clocks before enabling
them, unprepare after disable, error check in the clock setup, remove
the pre-enable workaround in the MPC512x platform's clock driver
this change implements non-fatal clock lookup since not all platforms
provide device tree
device tree based clock lookup, must prepare clocks before enabling
them, unprepare after disable, error check in the clock setup
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
device tree based clock lookup, must prepare clocks before enabling
them, error check in the clock setup
this change implements non-fatal clock lookup for compatibility with
platforms that don't provide OF clock specs, but failure to enable a
specified clock is considered fatal
Signed-off-by:
transition to the COMMON_CLK framework has completed for the MPC512x
platform, remove the now obsolete code path of the mpc5xxx mscan
driver which accessed clock control module registers directly
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 136
On Thu, Jul 18, 2013 at 10:20:52PM +0200, Gerhard Sittig wrote:
+ /* enable clock for the I2C peripheral (non fatal) */
+ clk = of_clk_get_by_name(node, per);
+ if (!IS_ERR(clk)) {
+ clk_prepare_enable(clk);
+ clk_put(clk);
+ }
+
This kind of hacked
On Thu, Jul 18, 2013 at 07:00:32PM +0200, Gerhard Sittig wrote:
+ psc_num = master-bus_num;
+ snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
+ mps-clk_mclk = clk_get(dev, clk_name);
+ if (IS_ERR(mps-clk_mclk))
+ goto free_irq;
Should be using
We are still stumped on this one, but during a review of the system
setup one thing came up that we aren't sure about is the device tree
and the DMA engine.
It does seem that for incoming PCI transactions the Freescale DMA
engine is not used. And in our device tree we have the DMA engine
On Thu, 2013-07-18 at 14:30 -0700, Peter LaDow wrote:
We are still stumped on this one, but during a review of the system
setup one thing came up that we aren't sure about is the device tree
and the DMA engine.
It does seem that for incoming PCI transactions the Freescale DMA
engine is not
Thanks.
Regards
Haijun.
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 18, 2013 1:14 AM
To: Zhang Haijun-B42677
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFLEMING; Zhang
Haijun-B42677;
Hi, all
Expect your advice and any comments.
Thanks.
Regards
Haijun.
-Original Message-
From: Zhang Haijun-B42677
Sent: Wednesday, July 17, 2013 6:11 PM
To: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
Cc: cbouatmai...@gmail.com; c...@laptop.org; Wood Scott-B07421;
Hi, scott
I had update this patch, this is the newest version.
If there is no other problem, can you help merge this patch?
I hope to make sure the following patch don't need to rebuild due to the change
of this patch.
Thanks.
Regards
Haijun.
-Original Message-
From: Zhang
Vender version and sdhc spec version of T4240-R1.0-R2.0 is incorrect.
The right value should be VVN=0x13, SVN = 0x1. The wrong version number
will break down the ADMA data transfer. This defect only exist in
T4240-R1.0-R2.0.
Also share vvn and svr for public use.
Signed-off-by: Haijun Zhang
On 07/16/2013 10:53 AM, Alexey Kardashevskiy wrote:
The changes are:
1. rebased on v3.11-rc1 so the capability numbers changed again
2. fixed multiple comments from maintainers
3. KVM: PPC: Add support for IOMMU in-kernel handling is split into
2 patches, the new one is powerpc/iommu: rework
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