On 01/09/2014 10:35 AM, Preeti U Murthy wrote:
Commit fbd7740fdfdf9475f switched pseries cpu idle handling from complete idle
loops to ppc_md.powersave functions. Earlier to this switch,
ppc64_runlatch_off() had to be called in each of the idle routines. But after
the switch this call is
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:
- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
For those platforms using DAI master mode like I2S, it's better to pre-set
a default slot number so that there's no need for these common cases to set
the slot number from its machine driver any more.
Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
---
sound/soc/fsl/fsl_ssi.c | 10
On Thu, Jan 9, 2014 at 7:41 AM, Nicolin Chen guangyu.c...@freescale.com wrote:
For those platforms using DAI master mode like I2S, it's better to pre-set
a default slot number so that there's no need for these common cases to set
the slot number from its machine driver any more.
Hi Fabio,
On Thu, Jan 09, 2014 at 08:24:24AM -0200, Fabio Estevam wrote:
On Thu, Jan 9, 2014 at 7:41 AM, Nicolin Chen guangyu.c...@freescale.com
wrote:
For those platforms using DAI master mode like I2S, it's better to pre-set
a default slot number so that there's no need for these common
On Thu, Jan 9, 2014 at 8:34 AM, Nicolin Chen guangyu.c...@freescale.com wrote:
Is this for the initial line? The CodingStyle contains two types of multi-line
Yes, correct.
comment, one of which drops the initial line just like mine, even though it's
saying 'For files in net/ and drivers/net/
For those platforms using DAI master mode like I2S, it's better to pre-set
a default slot number so that there's no need for these common cases to set
the slot number from its machine driver any more.
Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
---
Changelog
v2:
* Correct coding
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:
- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
On Wed, Jan 08, 2014 at 05:47:19PM +0100, Gerhard Sittig wrote:
[ dropping devicetree from the Cc: list ]
[ what is the semantics of DMA_PRIVATE capability flag?
is documentation available beyond the initial commit message?
need individual channels be handled instead of controllers? ]
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing clk_disable_unprepare() before return from
fsl_ssi_probe() in the request irq error handling case.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
sound/soc/fsl/fsl_ssi.c | 2 +-
1 file changed, 1 insertion(+), 1
Use gva_t instead of unsigned int for eaddr in deliver_tlb_miss().
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/kvm/e500_mmu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mmu.c b/arch/powerpc/kvm/e500_mmu.c
index
On 09.01.2014, at 16:01, Mihai Caraman mihai.cara...@freescale.com wrote:
Use gva_t instead of unsigned int for eaddr in deliver_tlb_miss().
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Thanks, applied to kvm-ppc-queue.
Alex
___
On Thu, Jan 09, 2014 at 10:27:31PM +0800, Wei Yongjun wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing clk_disable_unprepare() before return from
fsl_ssi_probe() in the request irq error handling case.
Applied, thanks.
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On Thu, Jan 09, 2014 at 06:42:48PM +0800, Nicolin Chen wrote:
For those platforms using DAI master mode like I2S, it's better to pre-set
a default slot number so that there's no need for these common cases to set
the slot number from its machine driver any more.
Applied, thanks - but note that
On Thu, Jan 09, 2014 at 06:57:58PM +0800, Nicolin Chen wrote:
+/**
+ * This function configures the ratio between MCLK (HCK) and BCLK (SCK)
+ * (For DAI Master Mode only)
+ *
+ * Note: Machine driver should calculate the ratio to call this function.
+ *Only effective after calling
On Thu, Jan 09, 2014 at 07:19:00PM +, Sudeep Holla wrote:
On 08/01/14 20:27, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds initial support for providing processor cache information
to
On Thu, Jan 09, 2014 at 07:47:47PM +, Sudeep Holla wrote:
On 09/01/14 19:31, Greg Kroah-Hartman wrote:
On Thu, Jan 09, 2014 at 07:19:00PM +, Sudeep Holla wrote:
On 08/01/14 20:27, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep
On Thu, Jan 09, 2014 at 07:35:03PM +, Sudeep Holla wrote:
I assume you referring to some particular CPUs which don't implement this.
I could not find it as optional or IMPLEMENTATION defined in ARM ARM.
I might be missing to find it or there may be exceptions.
Can you please provide more
As of commit b81f18e55e9f4ea81759bcb00fea295de679bbe8 (powerpc/boot:
Only build board support files when required.) the two defconfigs
ep88xc_defconfig and storcenter_defconfig would fail final link as
follows:
WRAParch/powerpc/boot/dtbImage.ep88xc
arch/powerpc/boot/wrapper.a(mpc8xx.o): In
On 08/01/14 20:28, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
+#define define_one_ro(_name) \
+static struct cache_attr _name = \
+__ATTR(_name, 0444, show_##_name, NULL)
In the future, we do have
On 08/01/14 20:26, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds initial support for providing processor cache information
to userspace through sysfs interface. This is based on x86
On 08/01/14 20:27, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds initial support for providing processor cache information
to userspace through sysfs interface. This is based on x86
On 08/01/14 20:57, Russell King - ARM Linux wrote:
On Wed, Jan 08, 2014 at 07:26:07PM +, Sudeep Holla wrote:
+#if __LINUX_ARM_ARCH__ 7 /* pre ARMv7 */
+
+#define MAX_CACHE_LEVEL 1 /* Only 1 level supported */
+#define CTR_CTYPE_SHIFT 24
+#define
On 09/01/14 19:31, Greg Kroah-Hartman wrote:
On Thu, Jan 09, 2014 at 07:19:00PM +, Sudeep Holla wrote:
On 08/01/14 20:27, Greg Kroah-Hartman wrote:
On Wed, Jan 08, 2014 at 07:26:06PM +, Sudeep Holla wrote:
From: Sudeep Holla sudeep.ho...@arm.com
This patch adds initial support for
On Wed, 2014-01-08 at 20:57 -0600, Tang Yuantian-B29983 wrote:
Thanks for you review.
See my response inline.
Thanks,
Yuantian
-Original Message-
From: Wood Scott-B07421
Sent: 2014年1月9日 星期四 2:44
To: Mark Rutland
Cc: Tang Yuantian-B29983; ga...@kernel.crashing.org;
On Tue, Dec 17, 2013 at 04:17:02PM +0800, Dongsheng Wang wrote:
From: Wang Dongsheng dongsheng.w...@freescale.com
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
Thanks for your review. I will send next version of patch.
Thanks,
Yuantian
-Original Message-
From: Wood Scott-B07421
Sent: 2014年1月10日 星期五 5:19
To: Tang Yuantian-B29983
Cc: Mark Rutland; ga...@kernel.crashing.org; devicet...@vger.kernel.org;
linuxppc-dev@lists.ozlabs.org
/home/scott/fsl/git/linux/upstream/arch/powerpc/kernel/sysfs.c:326:19: error:
'PWRMGTCR0_AV_IDLE_CNT' undeclared (first use in this function)
/home/scott/fsl/git/linux/upstream/arch/powerpc/kernel/sysfs.c:329:36: error:
'PWRMGTCR0_AV_IDLE_CNT_SHIFT' undeclared (first use in this function)
From: Tang Yuantian yuantian.t...@freescale.com
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
v8:
- added clock-frequency property description
- fixed
tree: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 7d1c153ab373a5c07feb97eaf4e4bcad5bfc262e
commit: bb07b00be77fb33274cb44a03bdbf2471e556189 Merge 3.10-rc6 into
driver-core-next
date: 7 months ago
config: make ARCH=powerpc mpc86xx_defconfig
All warnings:
When write to MMIO happens and there is an ioeventfd for that and
is handled successfully, ioeventfd_write() returns 0 (success) and
kvmppc_handle_store() returns EMULATE_DONE. Then kvmppc_emulate_mmio()
converts EMULATE_DONE to RESUME_GUEST_NV and this broke from the loop.
This adds handling of
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