[PATCH V7 1/4] perf/powerpc: assign an id to each powerpc register

The enum definition assigns an 'id' to each register in "struct pt_regs" of arch/powerpc. The order of these values in the enum definition are based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h. Signed-off-by: Anju T Reviewed-by : Madhavan

[PATCH V7 3/4] tools/perf: Map the ID values with register names

Map ID values with corresponding register names. These names are then displayed when user issues perf record with the -I option followed by perf report/script with -D option. To test this patchset, Eg: $ perf record -I ls # record machine state at interrupt $ perf script -D # read the

p4080ds IRQ vector number for he External IRQ4 and IRQ5

I have been trying to figure out what is the vector number used for external IRQ4 and IRQ5 in P4080ds. According to board document xpedite5470-p4080 IRQ4: VPX GP Input 0 (GPI0) IRQ5 VPX GP Input 1 (GPI1) In p4080 user guide OpenPIC interrupt connection its mentioned as IRQ4_B: SLOT4 Sideband

re: [POWERPC] Add QUICC Engine (QE) infrastructure

Hello Li Yang, The patch 986585385131: "[POWERPC] Add QUICC Engine (QE) infrastructure" from Oct 3, 2006, leads to the following static checker warning: drivers/soc/fsl/qe/qe_ic.c:412 qe_ic_set_priority() error: buffer overflow 'qe_ic_info' 44 <= 127 drivers/soc/fsl/qe/qe_ic.c

[PATCH V7 0/4] perf/powerpc: Add ability to sample intr machine state in powerpc

This short patch series adds the ability to sample the interrupted machine state for each hardware sample. To test this patchset, Eg: $ perf record -I? # list supported registers output: available registers: gpr0 gpr1 gpr2 gpr3 gpr4 gpr5 gpr6 gpr7 gpr8 gpr9 gpr10 gpr11 gpr12 gpr13

[PATCH V7 2/4] perf/powerpc: add support for sampling intr machine state

The perf infrastructure uses a bit mask to find out valid registers to display. Define a register mask for supported registers defined in asm/perf_regs.h. The bit positions also correspond to register IDs which is used by perf infrastructure to fetch the register values. CONFIG_HAVE_PERF_REGS

[PATCH V1 4/4] tool/perf: Add sample_reg_mask to include all perf_regs regs

From: Madhavan Srinivasan Add sample_reg_mask array with pt_regs registers. This is needed for printing supported regs ( -I? option). Signed-off-by: Madhavan Srinivasan --- tools/perf/arch/powerpc/util/Build | 1 +

Re: [PATCH v5 0/9] ftrace with regs + live patching for ppc64 LE (ABI v2)

On Fri 2015-12-04 15:45:29, Torsten Duwe wrote: > Changes since v4: > * change comment style in entry_64.S to C89 > (nobody is using assembler syntax comments there). > * the bool function restore_r2 shouldn't return 2, > that's a little confusing. > * Test whether the compiler

Re: [PATCH v5 9/9] Enable LIVEPATCH to be configured on ppc64le and add livepatch.o if it is selected.

On Fri 2015-12-04 15:13:44, Torsten Duwe wrote: > Signed-off-by: Torsten Duwe > --- > arch/powerpc/Kconfig | 5 + > arch/powerpc/kernel/Makefile | 1 + > 2 files changed, 6 insertions(+) > > diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig > index

Re: [PATCH V7 3/4] tools/perf: Map the ID values with register names

On Wed, Jan 06, 2016 at 03:15:50PM +0530, Anju T wrote: SNIP > + [PERF_REG_POWERPC_GPR28] = "gpr28", > + [PERF_REG_POWERPC_GPR29] = "gpr29", > + [PERF_REG_POWERPC_GPR30] = "gpr30", > + [PERF_REG_POWERPC_GPR31] = "gpr31", > + [PERF_REG_POWERPC_NIP] = "nip", > +

Re: [PATCH v2 15/32] powerpc: define __smp_xxx

On Wed, Jan 06, 2016 at 10:23:51PM +0200, Michael S. Tsirkin wrote: [...] > > > > > > Sorry, I don't understand - why do you have to do anything? > > > I changed all users of smp_lwsync so they > > > use __smp_lwsync on SMP and barrier() on !SMP. > > > > > > This is exactly the current

Re: [PATCH v2 0/6] cxlflash: Miscellaneous fixes and updates

> "Uma" == Uma Krishnan writes: Uma> This patch set contains miscellaneous fixes and adds support for a Uma> future IBM CXL adapter. This series is intended for 4.5 and is Uma> bisectable. Please reference the changelog below for details on Uma> what has been

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

On 2015/12/17 09:19AM, Arnaldo Carvalho de Melo wrote: > Em Thu, Dec 17, 2015 at 10:37:14AM +0530, Naveen N. Rao escreveu: > > On 2015/12/17 09:29AM, Wang Nan wrote: > > > The whole thread is: > > > > > > [PATCH v3 0/3] perf build: PowerPC: Fix build breakage due to libbpf: > > >

[PATCH v4] memory-hotplug: Fix kernel warning during memory hotplug on ppc64

This patch fixes a bug where a kernel warning is triggered when performing a memory hotplug on ppc64. This warning may also occur on any architecture that uses the memory_probe_store interface. WARNING: at drivers/base/memory.c:200 CPU: 9 PID: 13042 Comm: systemd-udevd Not tainted

Re: [PATCH v2 15/32] powerpc: define __smp_xxx

On Wed, Jan 06, 2016 at 09:51:52AM +0800, Boqun Feng wrote: > On Tue, Jan 05, 2016 at 06:16:48PM +0200, Michael S. Tsirkin wrote: > [snip] > > > > > Another thing is that smp_lwsync() may have a third user(other than > > > > > smp_load_acquire() and smp_store_release()): > > > > > > > > > >

[PATCH v3] memory-hotplug: Fix kernel warning during memory hotplug on ppc64

This patch fixes a bug where a kernel warning is triggered when performing a memory hotplug on ppc64. This warning may also occur on any architecture that uses the memory_probe_store interface. WARNING: at drivers/base/memory.c:200 CPU: 9 PID: 13042 Comm: systemd-udevd Not tainted

Re: [PATCH v3] memory-hotplug: Fix kernel warning during memory hotplug on ppc64

Hi John, [auto build test WARNING on v4.4-rc8] [also build test WARNING on next-20160106] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/John-Allen/memory-hotplug-Fix-kernel-warning-during