Currently, the OPAL msglog/console buffer is exposed as a sysfs file, with
the sysfs read handler responsible for retrieving the log from the OPAL
buffer. We'd like to be able to use it in xmon as well.
Refactor the OPAL msglog code to create a new function, opal_msglog_copy(),
that copies to an a
Add the 'do' command to dump the OPAL msglog in xmon.
Signed-off-by: Andrew Donnellan
---
arch/powerpc/xmon/xmon.c | 60
1 file changed, 60 insertions(+)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 07a8508..48b75ae 1006
From: "David A. Long"
Several architectures have identical or functionally equivalent code
implementing parts of the HAVE_REGS_AND_STACK_ACCESS_API feature. Move
that code out of the architecture directories.
Signed-off-by: David A. Long
---
arch/arm/include/asm/ptrace.h | 6 ---
ar
From: "David A. Long"
The pt_regs_offset structure is used for the HAVE_REGS_AND_STACK_ACCESS_API
feature and has identical definitions in four different arch ptrace.h
include files. It seems unlikely that definition would ever need to be
changed regardless of architecture so lets move it into
in
From: "David A. Long"
Move duplicate and functionally equivalent code for accessing registers
and stack (CONFIG_HAVE_REGS_AND_STACK_ACCESS_API) from arch subdirs into
common kernel files.
I'm sending this out again (with updated distribution list) because v2
just never got pulled in, even though
On 08/02/16 22:31, Michael Ellerman wrote:
Pulling the memcons out of the bin_attr here is not all that nice. This routine
should really stand on its own without reference to the bin_attr. In theory I
might want to disable building sysfs but still have this routine available.
Yeah it's a bit ug
On 08-02-16, 20:14, Shilpasri G Bhat wrote:
> Create sysfs attributes to export throttle information in
> /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats directory. The
> newly added sysfs files are as follows:
>
> 1)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat
> 2)/sys/devic
When PCI bus is unplugged during full hotplug for EEH recovery,
the platform PE instance (struct pnv_ioda_pe) isn't released and
it dereferences the stale PCI bus that has been released. It leads
to kernel crash when referring to the stale PCI bus.
This fixes the issue by correcting the PE's prima
The original implementation is ugly: unnecessary if statements and
"out" tag. This reworks the function to avoid above weaknesses. No
functional changes introduced.
Signed-off-by: Gavin Shan
Reviewed-by: Andrew Donnellan
---
arch/powerpc/kernel/eeh_pe.c | 28
1 file
The EEH debugfs handlers have same prototype. This introduces
a macro to define them, then to simplify the code. No logical
changes.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 60 ++--
1 file changed, 22 insertions(+), 38 deletions(-)
di
When PE is created, its primary bus is cached to pe->bus. At later
point, the cached primary bus is returned from eeh_pe_bus_get().
However, we could get stale cached primary bus and run into kernel
crash in one case: full hotplug as part of fenced PHB error recovery
releases all PCI busses under t
Please ignore
--
Cheers,
Stephen Rothwell
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
htab_get_table_size() either retrieve the size of the hash page table (HPT)
from the device tree - if the HPT size is determined by firmware - or
uses a heuristic to determine a good size based on RAM size if the kernel
is responsible for allocating the HPT.
To support a PAPR extension allowing re
This makes a number of cleanups to handling of mapping failures during
memory hotplug on Power:
For errors creating the linear mapping for the hot-added region:
* This is now reported with EFAULT which is more appropriate than the
previous EINVAL (the failure is unlikely to be related to the
Currently, the only error that htab_remove_mapping() can report is -EINVAL,
if removal of bolted HPTEs isn't implemeted for this platform. We make
a few clean ups to the handling of this:
* EINVAL isn't really the right code - there's nothing wrong with the
function's arguments - use ENODEV i
The cleanups to the (guest side) memory hotplug paths came up in the
context of allowing hash page table resizing for PAPR guests.
However, they stand on their own and can improve reporting of several
error conditions that could already happen.
Please apply.
David Gibson (4):
powerpc/mm: Clean
At the moment the hpte_removebolted callback in ppc_md returns void and
will BUG_ON() if the hpte it's asked to remove doesn't exist in the first
place. This is awkward for the case of cleaning up a mapping which was
partially made before failing.
So, we add a return value to hpte_removebolted, a
From 31edd352fb7c2a72913f1977fa1bf168109089ad Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 9 Feb 2016 02:47:45 -0500
Subject: [PATCH] powerpc/perf/hv-gpci: Increase request buffer size
The GPCI hcall allows for a 4K buffer but we limit the buffer
to 1K. The problem with a 1K buff
On Mon, 2016-02-08 at 22:27 +, Luis Henriques wrote:
> Several network-related data structures are defined in gelic_udbg.
> These could be easily dropped and the standard ones defined in network
> headers could be used instead.
>
> The 4 patches that follow replace ethernet, vlan, ip and udp
Ok, so its quirks to be added then? Something not implemented in KMS that
was in UMS?
Reports are that the same issue exsist on PPC Amiga Ones with a VIA
chipset, and the Pegasos 2 with the Artica s chipset, i posted a mail from
detailiing that.
Sure that might be it, but i get different results
On 08.02.2016 22:28, Mike wrote:
> Certainly 750~800 fps in glxgears vs 3000+ in debian squeeze, i cant
> bring myself to say that it's an acceptable situation no matter how
> tired i am of the problem knowing how well the setup could do. It's
> clear that the implementation is broken for everythin
On 01/20/2016 06:01 AM, Douglas Miller wrote:
On 01/18/2016 09:52 PM, Alexey Kardashevskiy wrote:
On 01/13/2016 01:24 PM, Douglas Miller wrote:
On 01/12/2016 05:07 PM, Benjamin Herrenschmidt wrote:
On Tue, 2016-01-12 at 15:40 +1100, Alexey Kardashevskiy wrote:
Quite often drivers set only
With ppc64 we use the deposited pgtable_t to store the hash pte slot
information. We should not withdraw the deposited pgtable_t without
marking the pmd none. This ensure that low level hash fault handling
will skip this huge pte and we will handle them at upper levels.
Recent change to pmd splitt
On Mon, Feb 08, 2016 at 01:54:04PM +1100, Paul Mackerras wrote:
> On Fri, Jan 29, 2016 at 04:23:57PM +1100, David Gibson wrote:
> > At the moment the hpte_removebolted callback in ppc_md returns void and
> > will BUG_ON() if the hpte it's asked to remove doesn't exist in the first
> > place. This
On Wed, 27 Jan 2016 23:01:59 +1100
Balbir Singh wrote:
> On Wed, Jan 27, 2016 at 10:50 AM, Cyril Bur wrote:
> > On Mon, 25 Jan 2016 11:04:23 +1100
> > Balbir Singh wrote:
> >
> >> On Thu, 21 Jan 2016 11:55:44 +1100
> >> Cyril Bur wrote:
> >>
> >> > Currently when threads get scheduled off
On 08/02/16 22:37, Michael Ellerman wrote:
Looks like I missed this?
Should it still go in? Is it a fix? If so when did it break, and should it go
to stable?
It is a fix - I'm a bit hazy on the details now but IIRC, Daniel Axtens
and I encountered this when doing some cxl debugging, though I
On Mon, Feb 08, 2016 at 04:35:19PM +1100, Gavin Shan wrote:
>The original implementation is ugly: unnecessary if statements and
>"out" tag. This reworks the function to avoid above weaknesses. No
>functional changes introduced.
>
>Signed-off-by: Gavin Shan
Michael, please ignore this one now beca
Instead of defining a local version of struct udphdr use the standard
definition from .
The 'src' field is named 'source' in the definition.
Signed-off-by: Luis Henriques
---
arch/powerpc/platforms/ps3/gelic_udbg.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/
Instead of defining a local version of struct iphdr use the standard
definition from .
Several fields in the definition have different names:
- proto -> protocol
- src -> saddr
- dest -> daddr
- total_length -> tot_len
- checksum -> check
Also, 'ver_len' is composed by 'version' and 'ihl' i
Instead of defining the local struct vlantag use the standard definition
of vlan_hdr from .
The fields in the definition have different names:
- vlan -> h_vlan_TCI
- subtype -> h_vlan_encapsulated_proto
While there, use also the ETH_P_IP macro instead of an hard-coded 0x0800
value.
Signed-off
Instead of defining a local version of struct ethhdr use the standard
definition from .
The fields in the definition have different names:
- dest -> h_dest
- src -> h_source
- type -> h_proto
While there, use a few other standard functions/macros:
- eth_broadcast_addr (instead of a memset)
Several network-related data structures are defined in gelic_udbg.
These could be easily dropped and the standard ones defined in network
headers could be used instead.
The 4 patches that follow replace ethernet, vlan, ip and udp
structures in gelic_udbg. Note that this has been compile-tested
on
On Mon, Feb 08, 2016 at 09:31:21AM +0100, Geert Uytterhoeven wrote:
> On Sun, Feb 7, 2016 at 6:38 PM, Luis Henriques
> wrote:
> > Several network-related data structures are defined in gelic_udbg.
> > These could be easily dropped and the standard ones defined in network
> > headers could be used
In this patch,
http://repository.timesys.com/buildsources/k/kernel/kernel-2.6.32/2.6.32-fsl-p1022ds-201003260230.patch
The SMP code is different from what's upstream. It looks like Freescale
may have changed the way SMP info is passed from the bootloader to the
kernel.
Unfortunately, Cisco
Hi,
On Sun, Feb 07, 2016 at 10:26:51AM -0800, Joe Perches wrote:
> On Sun, 2016-02-07 at 17:38 +, Luis Henriques wrote:
> > Instead of defining a local version of struct ethhdr use the standard
> > definition from .
>
> trivia:
>
> > diff --git a/arch/powerpc/platforms/ps3/gelic_udbg.c
> >
Certainly 750~800 fps in glxgears vs 3000+ in debian squeeze, i cant bring
myself to say that it's an acceptable situation no matter how tired i am of
the problem knowing how well the setup could do. It's clear that the
implementation is broken for everything but x86, if that's a acceptable
situati
--- Begin Message ---
Definitely would have made sense for years, but could someone possibly look
into a proper solution?
Michel Dänzer schrieb am Mo., 8. Feb. 2016 11:00:
> On 05.02.2016 11:47, Mike wrote:
> > Hi.
> > Managed to get the Radeon R300 running on mesa 11.1.1 with an old 2013
> > pa
I feel that would alleviate the symptoms and still leave a sick puppy. If
one could work around some of the issues i'd like that solution, it would
certainly make it easier for newcomers. It's a lucky enough situation that
default shipping mesa is broken enough to default to swrast, hardware
accele
Similar to how relative extables are implemented, it is possible to emit
the kallsyms table in such a way that it contains offsets relative to some
anchor point in the kernel image rather than absolute addresses.
On 64-bit architectures, it cuts the size of the kallsyms address table in
half, sinc
Commit c6bda7c988a5 ("kallsyms: fix percpu vars on x86-64 with relocation")
overloaded the 'A' (absolute) symbol type to signify that a symbol is not
subject to dynamic relocation. However, the original A type does not imply
that at all, and depending on the version of the toolchain, many A type
sy
scripts/kallsyms.c has a special --absolute-percpu command line
option which deals with the zero based per cpu offsets that are
used when building for SMP on x86_64. This means that the option
should only be passed in that case, so add a Kconfig symbol with
the correct predicate, and use that inste
This is v5 of my kallsyms base relative series, which addresses some issues
reported on 32-bit architectures (ARM and Blackfin) and Tile-GX (64-bit)
Changes since v4:
- use a Kconfig symbol KALLSYMS_ABSOLUTE_PERCPU and set its default
as appropriate rather than testing for X86_64 and SMP direct
On Mon 2016-02-08 10:49:28, Steven Rostedt wrote:
> On Mon, 8 Feb 2016 16:23:06 +0100
> Petr Mladek wrote:
>
> > >From 2b0fcb678d7720d03f9c9f233b61ed9ed4d420b3 Mon Sep 17 00:00:00 2001
> > From: Petr Mladek
> > Date: Mon, 8 Feb 2016 16:03:03 +0100
> > Subject: [PATCH] ftrace: Allow to explicit
On Mon, 8 Feb 2016 16:23:06 +0100
Petr Mladek wrote:
> >From 2b0fcb678d7720d03f9c9f233b61ed9ed4d420b3 Mon Sep 17 00:00:00 2001
> From: Petr Mladek
> Date: Mon, 8 Feb 2016 16:03:03 +0100
> Subject: [PATCH] ftrace: Allow to explicitly disable the build of the dynamic
> ftrace with regs
>
> Thi
On Mon 2016-02-08 13:12:45, Torsten Duwe wrote:
> On Mon, Feb 08, 2016 at 11:34:06AM +0100, Petr Mladek wrote:
> > On Sat 2016-02-06 11:32:43, Torsten Duwe wrote:
> > > On Fri, Feb 05, 2016 at 05:18:34PM +0100, Petr Mladek wrote:
> > > [...]
> > > > more complicated. Whem I think about it, the chan
Create sysfs attributes to export throttle information in
/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats directory. The
newly added sysfs files are as follows:
1)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat
2)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/sub-turbo_stat
"Kirill A. Shutemov" writes:
> On Mon, Feb 08, 2016 at 11:44:22AM +0530, Aneesh Kumar K.V wrote:
>> With ppc64 we use the deposited pgtable_t to store the hash pte slot
>> information. We should not withdraw the deposited pgtable_t without
>> marking the pmd none. This ensure that low level hash
On Mon, Feb 08, 2016 at 11:34:06AM +0100, Petr Mladek wrote:
> On Sat 2016-02-06 11:32:43, Torsten Duwe wrote:
> > On Fri, Feb 05, 2016 at 05:18:34PM +0100, Petr Mladek wrote:
> > [...]
> > > more complicated. Whem I think about it, the change below does similar
> > > job and looks more strightforw
On Fri, 2015-23-10 at 06:19:46 UTC, Andrew Donnellan wrote:
> In eeh_pci_enable(), after making the request to set the new options, we
> call eeh_ops->wait_state() to check that the request finished successfully.
>
> At the moment, if eeh_ops->wait_state() returns 0, we return 0 without
> checking
On 01/19/2016 07:08 PM, tip-bot for Raghavendra K T wrote:
Commit-ID: 9c03ee147193645be4c186d3688232fa438c57c7
Gitweb: http://git.kernel.org/tip/9c03ee147193645be4c186d3688232fa438c57c7
Author: Raghavendra K T
AuthorDate: Sat, 16 Jan 2016 00:31:23 +0530
Committer: Ingo Molnar
CommitDa
On Wed, 2016-20-01 at 06:50:17 UTC, Andrew Donnellan wrote:
> Currently, the OPAL msglog/console buffer is exposed as a sysfs file, with
> the sysfs read handler responsible for retrieving the log from the OPAL
> buffer. We'd like to be able to use it in xmon as well.
>
> Refactor the OPAL msglog
On Thu, 2016-02-04 at 20:16 -0600, Andy Fleming wrote:
> The Freescale PAMU can also be enabled on 64-bit power
> chips. Commit 477ab7a19cec8409e4e2dd10e7348e4cac3c06e5
> (iommu: Make more drivers depend on COMPILE_TEST)
> added this false dependency. Fixed it by allowing PPC64, too.
>
> Signed-of
On Sat 2016-02-06 11:32:43, Torsten Duwe wrote:
> On Fri, Feb 05, 2016 at 05:18:34PM +0100, Petr Mladek wrote:
> [...]
> > more complicated. Whem I think about it, the change below does similar
> > job and looks more strightforwad:
>
> Had I only looked closer. That's exactly how I thought it woul
On 05.02.2016 11:47, Mike wrote:
> Hi.
> Managed to get the Radeon R300 running on mesa 11.1.1 with an old 2013
> patch from Michel Dànzer, next problem is of course enabling agpmode,
> running with pci-mode with radeon.agpmode=-1 works, but is of course
> slow, and seems to load the cpu a lot.
>
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 35 +++--
arch/powerpc/include/asm/book3s/64/pgtable.h | 57
arch/powerpc/mm/slb.c| 1 -
3 files changed, 70 insertions(+), 23 deletions(-)
diff --
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 28 ++-
arch/powerpc/include/asm/book3s/64/tlbflush.h | 56 ++
arch/powerpc/include/asm/tlbflush.h| 2 +-
arch/powerpc/mm/tlb_hash64.c |
Signed-off-by: Aneesh Kumar K.V
---
.../include/asm/book3s/64/pgalloc-hash-4k.h| 26 ++---
.../include/asm/book3s/64/pgalloc-hash-64k.h | 23 ++--
arch/powerpc/include/asm/book3s/64/pgalloc-hash.h | 36 +--
arch/powerpc/include/asm/book3s/64/pgalloc.h | 118 +++
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-4k.h | 10
arch/powerpc/include/asm/book3s/64/hash-64k.h | 14 +--
arch/powerpc/include/asm/book3s/64/pgalloc-hash.h | 7 ++
arch/powerpc/include/asm/book3s/64/pgalloc.h | 9 +++
a
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 6 +-
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 61 +-
arch/powerpc/include/asm/book3s/64/mmu.h | 92 +++
arch/powerpc/include/asm/mmu.h| 25
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-64k.h | 42 ---
arch/powerpc/include/asm/book3s/64/hash.h | 16 +++
arch/powerpc/include/asm/book3s/64/pgtable.h | 161 +-
arch/powerpc/mm/pgtable-hash64.c | 62 +-
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/mmu_context.h | 63 +++---
arch/powerpc/kernel/swsusp.c | 2 +-
arch/powerpc/mm/mmu_context_hash64.c | 16 -
arch/powerpc/mm/mmu_context_nohash.c | 3 +-
drivers/cpufreq/pmac32-cpufreq
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/{mmu-hash32.h => book3s/32/mmu-hash.h} | 0
arch/powerpc/include/asm/{mmu-hash64.h => book3s/64/mmu-hash.h} | 0
arch/powerpc/include/asm/mmu.h | 4 ++--
arch/powerpc/kernel/idle_power7.S
We will later make the generic functions do conditial radix or hash
page table access. This patch doesn't do hugepage api update yet.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 13
arch/powerpc/include/asm/book3s/64/hash.h| 12 ++-
arch/po
We will later make the generic functions do conditial radix or hash
page table access. This patch doesn't do hugepage api update yet.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 133 +++---
arch/powerpc/include/asm/book3s/64/pgtable.h | 251
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 94 ++
arch/powerpc/include/asm/tlbflush.h| 92 +
2 files changed, 95 insertions(+), 91 deletions(-)
create mode 100644 arch/powerpc/include/asm/book3s
The radix variant is going to require a flush_tlb_range. We can't then
have this as static inline because of the usage of HPAGE_PMD_SIZE. So
we are forced to make it a function in which case we can use the generic
version.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/p
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/pgtable-hash64.c | 374 +++
arch/powerpc/mm/pgtable_64.c | 374 ---
2 files changed, 374 insertions(+), 374 deletions(-)
diff --git a/arch/powerpc/mm/pgtable-hash64.c b
This should not have any impact for hash linux implementation. But radix
would require us to flush tlb after clearing accessed bit. Also move
code that is not dependent on pte bits to generic header.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 45 +-
This patch renames _PAGE* -> H_PAGE*. This enables us to support
different page table format in the same kernel.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-4k.h | 60 ++--
arch/powerpc/include/asm/book3s/64/hash-64k.h | 111 ---
arch/powerpc/include
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 1 +
arch/powerpc/include/asm/nohash/64/pgtable.h | 2 +
arch/powerpc/mm/Makefile | 3 +-
arch/powerpc/mm/init_64.c| 114 +
arch/powerpc/mm/mem.c
With next generation power processor, we are having a new mmu model
[1] that require us to maintain a different linux page table format.
Inorder to support both current and future ppc64 systems with a single
kernel we need to make sure kernel can select between different page
table format at runti
They are dependent on hash pte bits, so move them to hash64 header
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 50
arch/powerpc/include/asm/book3s/64/pgtable.h | 50
2 files changed, 50 insertions(+)
We strictly don't need to do this. But enables us to not depend on
pgtable_free_tlb for radix.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hugetlbpage-book3e.c | 187 ++
arch/powerpc/mm/hugetlbpage-hash64.c | 150
arch/powerpc/
Also split pgalloc 64k and 4k headers
Signed-off-by: Aneesh Kumar K.V
---
.../include/asm/book3s/64/pgalloc-hash-4k.h| 92 ++
.../include/asm/book3s/64/pgalloc-hash-64k.h | 51 ++
arch/powerpc/include/asm/book3s/64/pgalloc-hash.h | 59 ++
arch/powerpc/include/as
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgalloc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/book3s/64/pgalloc.h
b/arch/powerpc/include/asm/book3s/64/pgalloc.h
index f06ad7354d68..23b0dd07f9ae 100644
--- a/arch/powe
We move large part of fsl related code to hugetlbpage-book3e.c.
Only code movement. This also avoid #ifdef in the code.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/hugetlb.h | 1 +
arch/powerpc/mm/hugetlbpage-book3e.c | 293 +
arch/powerpc/mm/hugetlbp
With next generation power processor, we are having a new mmu model
[1] that require us to maintain a different linux page table format.
Inorder to support both current and future ppc64 systems with a single
kernel we need to make sure kernel can select between different page
table format at runti
64bit book3s now always have 4 level page table irrespective of linux
page size. Move the related code out of #ifdef
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgalloc.h | 55 +---
1 file changed, 18 insertions(+), 37 deletions(-)
diff --git a
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgalloc.h | 6 +++---
arch/powerpc/include/asm/book3s/64/pgalloc.h | 23 +++---
arch/powerpc/include/asm/book3s/pgalloc.h | 19 ++
.../asm/{pgalloc-32.h => nohash/32/pgallo
cp pgalloc-32.h book3s/32/pgalloc.h
cp pgalloc-64.h book3s/64/pgalloc.h
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgalloc.h | 109 +++
arch/powerpc/include/asm/book3s/64/pgalloc.h | 262 +++
2 files changed, 371 insertions(+)
create m
This is needed so that we can support both hash and radix page table
using single kernel. Radix kernel uses a 4 level table.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/book3s/64/hash-4k.h | 33 +--
a
We remove real_pte_t out of STRICT_MM_TYPESCHECK. We will later add
a radix variant that is big endian
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 5 --
arch/powerpc/include/asm/page.h | 104 +--
arch/powerpc/include/a
Not really needed. But this brings it back to as it was before
Check this
41743a4e34f0777f51c1cf0675b91508ba143050
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash64_64k.c | 4 ++--
arch/powerpc/mm/hugepage-hash64.c| 2 +-
arch/powerpc/mm/hugetlbpage-hash64.c | 2 +-
3 files
Hello,
This is a large series, mostly consisting of code movement. No new features
are done in this series. The changes are done to accomodate the upcoming new
memory
model in future powerpc chips. The details of the new MMU model can be found at
http://ibm.biz/power-isa3 (Needs registration).
On Sun, Feb 7, 2016 at 6:38 PM, Luis Henriques
wrote:
> Several network-related data structures are defined in gelic_udbg.
> These could be easily dropped and the standard ones defined in network
> headers could be used instead.
>
> The 4 patches that follow replace ethernet, vlan, ip and udp
> st
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