On Thu, 2016-04-07 at 14:56 +0530, Naveen N. Rao wrote:
> On 2016/04/07 06:19PM, Balbir Singh wrote:
> >
> >
> > On 06/04/16 22:32, Naveen N. Rao wrote:
> > >
> > > This patchset fixes three issues found with perf probe on ppc64le:
> > > 1. 'perf test kallsyms' failure on ppc64le (reported by Mi
On 22.03.2016 15:53, Laurent Vivier wrote:
> Until now, when we connect gdb to the QEMU gdb-server, the
> single-step mode is not managed.
>
> This patch adds this, only for kvm-pr:
>
> If KVM_GUESTDBG_SINGLESTEP is set, we enable single-step trace bit in the
> MSR (MSR_SE) just before the __kvmp
From: pan xinhui
Implement xchg{u8,u16}{local,relaxed}, and
cmpxchg{u8,u16}{,local,acquire,relaxed}.
Atomic operation on 8-bit and 16-bit data type is supported from power7
Signed-off-by: pan xinhui
---
arch/powerpc/include/asm/cmpxchg.h | 265 +
1 file cha
IBM PPC IOMMU API users always set IOMMU data and IOMMU release callback
to an IOMMU group. At the moment the callback clears one pointer in
iommu_table_group and that's it.
The platform code calls iommu_group_put() and counts on _put() being
called last so they check for table_group->group being
These 2 patches are to fix the crash which happens when the user (accidentally)
unbinds the driver of a physical function of a SRIOV device while
a virtual function is passed to a guest.
Please comment. Thanks!
There might be more work required in addition to this as it is not clear
what protects
When SRIOV is disabled, the existing code presumes there is no
virtual function (VF) in use and destroys all associated PEs.
However it is possible to get into the situation when the user
activated SRIOV disabling while a VF is still in use via VFIO.
For example, unbinding a physical function (PF)
On 04/06/2016 04:44 AM, Bharata B Rao wrote:
> memory_hotplug_max() uses hot_add_drconf_memory_max() to get maxmimum
> addressable memory by referring to ibm,dyanamic-memory property. There
> are three problems with the current approach:
>
> 1 hot_add_drconf_memory_max() assumes that ibm,dynamic-m
On Fri, Apr 08, 2016 at 02:54:41PM +1000, Alexey Kardashevskiy wrote:
> This removes iommu_group_get_iommudata() as the result is never used.
> As this is a minor cleanup, no change in behavior is expected.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> drivers/vfio
This removes iommu_group_get_iommudata() as the result is never used.
As this is a minor cleanup, no change in behavior is expected.
Signed-off-by: Alexey Kardashevskiy
---
drivers/vfio/vfio_iommu_spapr_tce.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.
On Wed, 6 Apr 2016 18:53:39 +
Yang-Leo Li wrote:
>
>
> > -Original Message-
> > From: Brian Norris [mailto:computersforpe...@gmail.com]
> > Sent: Wednesday, April 06, 2016 12:53 PM
> > To: Li Yang
> > Cc: Scott Wood ; Raghav Dogra ;
> > linux-...@lists.infradead.org; linuxppc-dev ;
Current is using !flags, and we are going to use
IORESOURCE_DISABLED instead of clearing resource flags.
Let's convert all !flags to helper function resource_disabled().
resource_disabled will check !flags and IORESOURCE_DISABLED both.
Cc: linux-al...@vger.kernel.org
Cc: linux-i...@vger.kernel.or
There are powerpc generic version and x86 local version for
skip_ioresource_align().
Move the powerpc version to setup-bus.c, and kill x86 local version.
Also kill dummy version in microblaze.
Cc: Michal Simek
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Arnd Bergmann
Cc: linuxppc-dev@lists.o
For device resource PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource.
This patch set IORESOUCE_MEM_64 for 64bit resource during OF device resource
flags parsing.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261
Link: https://bugzilla
On Thu, Apr 07, 2016 at 04:28:26PM +1000, Russell Currey wrote:
>In the "ibm,configure-pe" and "ibm,configure-bridge" RTAS calls, the
>spec states that values of 9900-9905 can be returned, indicating that
>software should delay for 10^x (where x is the last digit, i.e. 990x)
>milliseconds and attem
On Thu, Apr 07, 2016 at 04:28:27PM +1000, Russell Currey wrote:
>The RTAS calls "ibm,configure-pe" and "ibm,configure-bridge" perform the
>same actions, however the former can skip configuration if unnecessary.
>The existing code treats them as different tokens even though only one
>will ever be ca
Some of the interrupt vectors on 64-bit POWER server processors are
only 32 bytes long (8 instructions), which is not enough for the full
first-level interrupt handler. For these we need to branch to an out-
of-line (OOL) handler. But when we are running a relocatable kernel,
interrupt vectors til
With the previous patch, we choke out whatever little space is left
below 0x7000 (FWNMI hard block) while there is a hole of ~1400 bytes
below __end_interrupts marker when CONFIG_CBE_RAS is disabled.
Considering CONFIG_CBE_RAS is not enabled by default for BOOK3S, this
is not a desirable scenario e
__end_handlers marker was intended to mark down upto code that gets
called from exception prologs. But that hasn't kept pace with code
changes. Case in point, slb_miss_realmode being called from exception
prolog code but isn't below __end_handlers marker. So, __end_handlers
marker is as good as a c
On 7 April 2016 7:23:46 pm AEST, Laurent Dufour
wrote:
>On 16/02/2016 09:59, Anshuman Khandual wrote:
>> This patch series adds twelve new ELF core note sections which can
>> be used with existing ptrace request PTRACE_GETREGSET-SETREGSET for
>accessing
>> various transactional memory and
Hi Yongji,
On 04/07/2016 01:38 PM, Yongji Xie wrote:
> On 2016/4/6 22:45, Alex Williamson wrote:
>> On Tue, 5 Apr 2016 21:46:44 +0800
>> Yongji Xie wrote:
>>
>>> This patch enables mmapping MSI-X tables if
>>> hardware supports interrupt remapping which
>>> can ensure that a given pci device can
On Wed, Mar 16, 2016 at 11:15:44PM -0500, Andy Fleming wrote:
> The Freescale PAMU can be enabled on both 32 and 64-bit Power
> chips. Commit 477ab7a19cec8409e4e2dd10e7348e4cac3c06e5
> (iommu: Make more drivers depend on COMPILE_TEST)
> restricted PAMU to PPC32. PPC covers both.
>
> Signed-off-by:
On 2016/4/6 22:45, Alex Williamson wrote:
On Tue, 5 Apr 2016 21:46:44 +0800
Yongji Xie wrote:
This patch enables mmapping MSI-X tables if
hardware supports interrupt remapping which
can ensure that a given pci device can only
shoot the MSIs assigned for it.
Signed-off-by: Yongji Xie
---
d
Ping?
On 22/03/2016 15:53, Laurent Vivier wrote:
> Until now, when we connect gdb to the QEMU gdb-server, the
> single-step mode is not managed.
>
> This patch adds this, only for kvm-pr:
>
> If KVM_GUESTDBG_SINGLESTEP is set, we enable single-step trace bit in the
> MSR (MSR_SE) just before the
Ping?
On 15/03/2016 21:18, Laurent Vivier wrote:
> While writing some instruction tests for kvm-unit-tests for powerpc,
> I've found that illegal instructions are not managed correctly with kvm-pr,
> while it is fine with kvm-hv.
>
> When an illegal instruction (like ".long 0") is processed by kv
Hi Anshuman,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.6-rc2 next-20160407]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Anshuman-Khandual/Enable-HugeTLB-page
On 2016/04/07 06:19PM, Balbir Singh wrote:
>
> On 06/04/16 22:32, Naveen N. Rao wrote:
> > This patchset fixes three issues found with perf probe on ppc64le:
> > 1. 'perf test kallsyms' failure on ppc64le (reported by Michael
> > Ellerman). This was due to the symbols being fixed up during symbol
On 07/04/16 15:37, Anshuman Khandual wrote:
> follow_huge_(pmd|pud|pgd) functions are used to walk the page table and
> fetch the page struct during 'follow_page_mask' call. There are possible
> race conditions faced by these functions which arise out of simultaneous
> calls of move_pages() and f
On 16/02/2016 09:59, Anshuman Khandual wrote:
> This patch series adds twelve new ELF core note sections which can
> be used with existing ptrace request PTRACE_GETREGSET-SETREGSET for accessing
> various transactional memory and other miscellaneous debug register sets on
> powerpc platform.
Hi Anshuman,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.6-rc2 next-20160407]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Anshuman-Khandual/Enable-HugeTLB-page
On 07/04/16 15:37, Anshuman Khandual wrote:
> Currently the config ARCH_WANT_GENERAL_HUGETLB enabled functions like
> 'huge_pte_alloc' and 'huge_pte_offset' dont take into account HugeTLB
> page implementation at the PGD level. This is also true for functions
> like 'follow_page_mask' which is ca
On 07/04/16 15:37, Anshuman Khandual wrote:
> The commit 091d0d55b286 ("shm: fix null pointer deref when userspace
> specifies invalid hugepage size") had replaced MAP_HUGE_MASK with
> SHM_HUGE_MASK. Though both of them contain the same numeric value of
> 0x3f, MAP_HUGE_MASK flag sounds more appr
On 06/04/16 22:32, Naveen N. Rao wrote:
> This patchset fixes three issues found with perf probe on ppc64le:
> 1. 'perf test kallsyms' failure on ppc64le (reported by Michael
> Ellerman). This was due to the symbols being fixed up during symbol
> table load. This is fixed in patch 2 by delaying sy
32 matches
Mail list logo