On Tue, May 03, 2016 at 01:54:36PM +0530, Shreyas B. Prabhu wrote:
> POWER ISA v3 defines a new idle processor core mechanism. In summary,
> a) new instruction named stop is added. This instruction replaces
> instructions like nap, sleep, rvwinkle.
> b) new per thread SPR named PSSCR is
On Tue, May 03, 2016 at 01:54:31PM +0530, Shreyas B. Prabhu wrote:
> In the current code, when the thread wakes up in reset vector, some
> of the state restore code and check for whether a thread needs to
> branch to kvm is duplicated. Reorder the code such that this
> duplication is avoided.
On Thu, May 19, 2016 at 4:15 PM, Josh Poimboeuf wrote:
> On Mon, May 02, 2016 at 08:52:41AM -0700, Andy Lutomirski wrote:
>> On Mon, May 2, 2016 at 6:52 AM, Josh Poimboeuf wrote:
>> > On Fri, Apr 29, 2016 at 05:08:50PM -0700, Andy Lutomirski wrote:
>> >>
Use kmemdup when some other buffer is immediately copied into allocated
region. It replaces call to allocation followed by memcpy, by a single
call to kmemdup.
Signed-off-by: Muhammad Falak R Wani
---
drivers/net/ethernet/toshiba/ps3_gelic_wireless.c | 4 ++--
1 file
On Mon, May 02, 2016 at 08:52:41AM -0700, Andy Lutomirski wrote:
> On Mon, May 2, 2016 at 6:52 AM, Josh Poimboeuf wrote:
> > On Fri, Apr 29, 2016 at 05:08:50PM -0700, Andy Lutomirski wrote:
> >> On Apr 29, 2016 3:41 PM, "Josh Poimboeuf" wrote:
> >> >
>
On Thu, May 19, 2016 at 12:38:47PM -0700, Paul E. McKenney wrote:
> On Thu, May 19, 2016 at 09:23:39AM -0700, Paul E. McKenney wrote:
> > On Thu, May 19, 2016 at 08:40:42AM -0700, Josh Triplett wrote:
> > > On Thu, May 19, 2016 at 07:10:13AM -0700, Paul E. McKenney wrote:
> > > > On Wed, May 18,
On Thu, May 19, 2016 at 09:23:39AM -0700, Paul E. McKenney wrote:
> On Thu, May 19, 2016 at 08:40:42AM -0700, Josh Triplett wrote:
> > On Thu, May 19, 2016 at 07:10:13AM -0700, Paul E. McKenney wrote:
> > > On Wed, May 18, 2016 at 09:23:10PM -0700, Josh Triplett wrote:
> > > > On Thu, May 19, 2016
The comment explaining why we modify VRSAVE is misleading, glibc
does rely on the behaviour. Update the comment.
Signed-off-by: Anton Blanchard
---
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 1c2e7a3..3907fcf 100644
---
PowerISA 3.0 adds an in memory table for storing segment translation
information. In this mode, which is enabled by setting both HOST RADIX
and GUEST RADIX bits in partition table to 0 and enabling UPRT to
1, we have a per process segment table. The segment table details
are stored in the process
We also handle fault with proper stack initialized. This enable us to
callout to C in fault handling routines. We don't do this for kernel
mapping, because of the possibility of taking recursive fault if kernel
stack in not yet mapped by an slb entry.
This enable us to handle Power9 slb fault
On Thu, May 19, 2016 at 08:40:42AM -0700, Josh Triplett wrote:
> On Thu, May 19, 2016 at 07:10:13AM -0700, Paul E. McKenney wrote:
> > On Wed, May 18, 2016 at 09:23:10PM -0700, Josh Triplett wrote:
> > > On Thu, May 19, 2016 at 11:42:23AM +0800, Boqun Feng wrote:
> > > > The option "-soundhw
On Thu, May 19, 2016 at 07:10:13AM -0700, Paul E. McKenney wrote:
> On Wed, May 18, 2016 at 09:23:10PM -0700, Josh Triplett wrote:
> > On Thu, May 19, 2016 at 11:42:23AM +0800, Boqun Feng wrote:
> > > The option "-soundhw pcspk" gives me a error on PPC as follow:
> > >
> > > qemu-system-ppc64:
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Michael Ellerman
Signed-off-by: Horia Geantă
---
arch/powerpc/kernel/iomap.c | 24
1 file changed, 24 insertions(+)
diff
Signed-off-by: Anju T
---
Documentation/features/debug/optprobes/arch-support.txt | 2 +-
arch/powerpc/Kconfig| 1 +
arch/powerpc/kernel/Makefile| 1 +
3 files changed, 3 insertions(+), 1 deletion(-)
diff
ppc_get_optinsn_slot() and ppc_free_optinsn_slot() are
geared towards the allocation and freeing of memory from
the area reserved for detour buffer.
Signed-off-by: Anju T
---
arch/powerpc/kernel/optprobes.c | 480
1 file
Detour buffer contains instructions to create an in memory pt_regs.
After the execution of prehandler a call is made for instruction emulation.
The NIP is decided after the probed instruction is executed. Hence a branch
instruction is created to the NIP returned by emulate_step().
Instruction
Here are the RFC patchset of the kprobes jump optimization
(a.k.a OPTPROBES)for powerpc. Kprobe being an inevitable tool
for kernel developers,enhancing the performance of kprobe has
got much importance.
Currently kprobes inserts a trap instruction to probe a running kernel.
Jump optimization
Hi Shreyas,
On Wed, May 18, 2016 at 12:37:56PM +0530, Shreyas B Prabhu wrote:
[..snip..]
> >> diff --git a/arch/powerpc/kernel/exceptions-64s.S
> >> b/arch/powerpc/kernel/exceptions-64s.S
> >> index 7716ceb..7ebfbb0 100644
> >> --- a/arch/powerpc/kernel/exceptions-64s.S
> >> +++
On Thu, May 19, 2016 at 1:40 PM, Peter Zijlstra wrote:
> On Wed, May 18, 2016 at 11:11:51PM +0200, Rafael J. Wysocki wrote:
>> On Wed, May 18, 2016 at 2:53 PM, Shilpasri G Bhat
>> wrote:
>> > This patch adds driver callback for fast_switch
On Tue, May 03, 2016 at 01:54:34PM +0530, Shreyas B. Prabhu wrote:
> Move idle related macros to a common location asm/cpuidle.h so that
> they can be used for stop instruction support.
>
> Signed-off-by: Shreyas B. Prabhy
Reviewed-by: Gautham R. Shenoy
On Wed, May 18, 2016 at 12:21:17PM +0530, Shreyas B Prabhu wrote:
> With this patch, r5 which is the third parameter to
> power_powersave_common contains the return address that needs to be
> written to SRR0. So here I'm keeping r5 unaltered and using r7 for the MSR.
Ok.
Reviewed-by: Gautham R.
On Wed, May 18, 2016 at 09:25:17PM -0700, Josh Triplett wrote:
> On Thu, May 19, 2016 at 11:42:20AM +0800, Boqun Feng wrote:
> > I spend some time to make tools/testing/selftest/rcutorture run on PPC,
> > here are some documention and fixes made while I was trying.
> >
> > The scripts are able to
On Wed, May 18, 2016 at 09:23:10PM -0700, Josh Triplett wrote:
> On Thu, May 19, 2016 at 11:42:23AM +0800, Boqun Feng wrote:
> > The option "-soundhw pcspk" gives me a error on PPC as follow:
> >
> > qemu-system-ppc64: ISA bus not available for pcspk
> >
> > , which means this option doesn't
On Thursday 19 May 2016 15:03:34 Kishon Vijay Abraham I wrote:
> >
> >> 1 drivers/phy/phy-exynos-mipi-video.c:238:13: warning: 'val' may be
> >> used uninitialized in this function [-Wmaybe-uninitialized]
> >
> > I sent a patch on May 11, it was reviewed by Krzysztof Kozlowski, but not
>
On Thursday 19 May 2016 11:20:44 Michal Hocko wrote:
> On Thu 19-05-16 11:07:09, Arnd Bergmann wrote:
> [...]
> > > 6 mm/page_alloc.c:3651:6: warning: 'compact_result' may be used
> > > uninitialized in this function [-Wmaybe-uninitialized]
> >
> > I'm surprised this one is still there, I
On Thu, May 19, 2016 at 04:27:49PM +0530, abdhalee wrote:
>Hi
>
>Today's mainline stable 4.6 on ppc64le bare metal booted with the following
>warning.
>
>[0.080615] EEH: PowerNV platform initialized
>[0.080709] POWER8 performance monitor hardware support registered
>[0.080791]
On Mon, 2016-05-16 at 20:37 -0500, Scott Wood wrote:
> Sorry for the lateness...
>
> Contains include 86xx fixes, minor device tree fixes, an erratum
> workaround, and a kconfig dependency fix.
Thanks, merged into next and pushed.
Will send a pull request to Linus late tomorrow once the whole
On Wed, May 18, 2016 at 11:11:51PM +0200, Rafael J. Wysocki wrote:
> On Wed, May 18, 2016 at 2:53 PM, Shilpasri G Bhat
> wrote:
> > This patch adds driver callback for fast_switch and below observations
> > on schedutil governor are done with this patch.
> >
> > In
On 19 May 2016 at 16:22, Michael Ellerman wrote:
> On Wed, 2016-05-18 at 12:33 +0200, Emese Revfy wrote:
> > Did you test the plugins with all gcc versions (4.5-6)?
>
> What's the concern about gcc versions? Just not breaking the build on old
> compilers?
the earlier plugin capable gcc versions
On Thu, 19 May 2016, Arnd Bergmann wrote:
> > 2 drivers/xen/balloon.c:154:13: warning: 'release_memory_resource'
> > declared 'static' but never defined [-Wunused-function]
>
> I sent a patch on May 11, subject "xen: remove incorrect forward declaration"
> and
> Stefano Stabellini
Hi Arnd,
On Thursday 19 May 2016 02:37 PM, Arnd Bergmann wrote:
> On Thursday 19 May 2016 00:45:16 Olof's autobuilder wrote:
>> Errors:
>>
>> arm64.allmodconfig:
>> samples/seccomp/bpf-fancy.c:13:27: fatal error: linux/seccomp.h: No such
>> file or directory
>>
On Thu 19-05-16 11:07:09, Arnd Bergmann wrote:
[...]
> > 6 mm/page_alloc.c:3651:6: warning: 'compact_result' may be used
> > uninitialized in this function [-Wmaybe-uninitialized]
>
> I'm surprised this one is still there, I sent a patch but Michal Hocko came
> up with
> a better fix on
On Thursday 19 May 2016 00:45:16 Olof's autobuilder wrote:
> Errors:
>
> arm64.allmodconfig:
> samples/seccomp/bpf-fancy.c:13:27: fatal error: linux/seccomp.h: No such file
> or directory
> samples/seccomp/dropper.c:20:27: fatal error: linux/seccomp.h: No such file
> or directory
>
This should be same as flush_tlb_page except for hash32. For hash32
I guess the existing code is wrong, because we don't seem to be
flushing tlb for Hash != 0 case at all. Fix this by switching to
calling flush_tlb_page() which does the right thing by flushing
tlb for both hash and nohash case
Use flush_hugetlb_page instead of flush_tlb_page when we clear flush the
pte.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/hugetlb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/hugetlb.h
Some archs like ppc64 need to do special things when flushing tlb for
hugepage. Add a new helper to flush hugetlb tlb range. This helps us to
avoid flushing the entire tlb mapping for the pid.
Signed-off-by: Aneesh Kumar K.V
---
Use the helper instead of open coding the same at multiple place
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hugetlb-radix.h | 15 +++
.../powerpc/include/asm/book3s/64/tlbflush-radix.h | 4 +--
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/tlbflush-radix.h | 10 +-
arch/powerpc/mm/hugetlbpage-radix.c | 4 ++--
arch/powerpc/mm/tlb-radix.c | 16
3 files changed, 15
Instead of flushing the entire mm, implement a flush_pmd_tlb_range
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/tlbflush-radix.h | 4 ++
arch/powerpc/include/asm/book3s/64/tlbflush.h | 9
arch/powerpc/mm/pgtable-book3s64.c
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/tlb.h | 13 +
arch/powerpc/mm/tlb-radix.c| 6 --
arch/powerpc/mm/tlb_nohash.c | 6 --
3 files changed, 13 insertions(+), 12 deletions(-)
diff --git
Hi,
This patch series introduce range based tlb flush and use the same for radix
implementation. We still need to handle the mmu_gather related tlb flush.
That will be done in a later patch.
Aneesh Kumar K.V (7):
powerpc/mm: Use hugetlb flush functions
powerpc/mm: Drop multiple definition of
MMU feature bits are defined such that we use the lower half to
present MMU family features. Remove the strict split of half and
also move Radix to a mmu family feature. Radix introduce a new MMU
model and strictly speaking it is a new MMU family. This also free
up bits which can be used for
PowerISA 3.0 encodes the segment size in the second half of hash page
table entry. Update hpte_decode accordingly.
Fixes: 50de596de8be ("powerpc/mm/hash: Add support for Power9 Hash")
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash_native_64.c | 5
Update the PID switch as per ISA doc. slbia is needed in radix to
invalidate any implementation specific lookaside information
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/mmu_context_book3s64.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
Replace opencoding of the same at multiple places with the helper.
No functional change with this patch.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 9 +
arch/powerpc/include/asm/kvm_book3s_64.h | 3 +--
ISA 3.0 document hash table size in bytes = 2^(HTABSIZE + 18)
No functionality change by this patch.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash_utils_64.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git
LPCR cannot be updated when running in guest mode.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/pgtable-radix.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/mm/pgtable-radix.c
Hi Masami,
Thank you for reviewing the patch.
On Wednesday 18 May 2016 08:43 PM, Masami Hiramatsu wrote:
On Wed, 18 May 2016 02:09:37 +0530
Anju T wrote:
Instruction slot for detour buffer is allocated from
the reserved area. For the time being 64KB is reserved
in
On 18.05.2016 12:53, Thomas Huth wrote:
> On 18.05.2016 12:18, Thomas Huth wrote:
>> On 17.05.2016 19:49, Laurent Vivier wrote:
>>>
>>>
>>> On 17/05/2016 10:37, Alexander Graf wrote:
On 05/17/2016 10:35 AM, Laurent Vivier wrote:
>
> On 12/05/2016 16:23, Laurent Vivier wrote:
>>
On 19/05/16 16:22, Michael Ellerman wrote:
Did you test the plugins with all gcc versions (4.5-6)?
What's the concern about gcc versions? Just not breaking the build on old
compilers?
I'm pretty sure powerpc big endian still builds with gcc 4.4.
gcc's plugin support only landed in 4.5, so we
On Wed, 2016-05-18 at 12:33 +0200, Emese Revfy wrote:
> > I've done some basic sanity testing on powerpc with the cyclomatic
> > complexity plugin (with LE native + cross-compilers) and it seems to
> > work with the patch below.
> >
> > Signed-off-by: Andrew Donnellan
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