[PATCH v6 12/12] powerpc: Enable CONFIG_KEXEC_FILE in powerpc server defconfigs.

Enable CONFIG_KEXEC_FILE in powernv_defconfig, ppc64_defconfig and pseries_defconfig. It depends on CONFIG_CRYPTO_SHA256=y, so add that as well. Signed-off-by: Thiago Jung Bauermann --- arch/powerpc/configs/powernv_defconfig | 2 ++

[PATCH v6 11/12] powerpc: Add purgatory for kexec_file_load implementation.

This purgatory implementation comes from kexec-tools, almost unchanged. The only changes were that the sha256_regions global variable was renamed to sha_regions to match what kexec_file_load expects, and to use the sha256.c file from x86's purgatory to avoid adding yet another SHA-256

[PATCH v6 10/12] powerpc: Add support for loading ELF kernels with kexec_file_load.

This uses all the infrastructure built up by the previous patches in the series to load an ELF vmlinux file and an initrd. It uses the flattened device tree at initial_boot_params as a base and adjusts memory reservations and its /chosen node for the next kernel. Signed-off-by: Thiago Jung

[PATCH v6 09/12] powerpc: Add code to work with device trees in kexec_file_load.

kexec_file_load needs to set up the device tree that will be used by the next kernel and check whether it provides a console that can be used by the purgatory. Signed-off-by: Thiago Jung Bauermann --- arch/powerpc/include/asm/kexec.h | 3 +

[PATCH v6 08/12] powerpc: Implement kexec_file_load.

arch_kexec_walk_mem and arch_kexec_apply_relocations_add are used by generic kexec code, while setup_purgatory is powerpc-specific and sets runtime variables needed by the powerpc purgatory implementation. Signed-off-by: Josh Sklar Signed-off-by: Thiago Jung Bauermann

[PATCH v6 06/12] powerpc: Adapt elf64_apply_relocate_add for kexec_file_load.

Extend elf64_apply_relocate_add to support relative symbols. This is necessary because there is a difference between how the module loading mechanism and the kexec purgatory loading code use Elf64_Sym.st_value at relocation time: the former changes st_value to point to the absolute memory address

[PATCH v6 07/12] powerpc: Add functions to read ELF files of any endianness.

A little endian kernel might need to kexec a big endian kernel (the opposite is less likely but could happen as well), so we can't just cast the buffer with the binary to ELF structs and use them as is done elsewhere. This patch adds functions which do byte-swapping as necessary when populating

[PATCH v6 05/12] powerpc: Generalize elf64_apply_relocate_add.

When apply_relocate_add is called, modules are already loaded at their final location in memory so Elf64_Shdr.sh_addr can be used for accessing the section contents as well as the base address for relocations. This is not the case for kexec's purgatory, because it will only be copied to its final

[PATCH v6 04/12] powerpc: Factor out relocation code from module_64.c to elf_util_64.c.

The kexec_file_load system call needs to relocate the purgatory, so factor out the module relocation code so that it can be shared. This patch's purpose is to move the ELF relocation logic from apply_relocate_add to elf_util_64.c with as few changes as possible. The following changes were needed:

[PATCH v6 03/12] kexec_file: Factor out kexec_locate_mem_hole from kexec_add_buffer.

kexec_locate_mem_hole will be used by the PowerPC kexec_file_load implementation to find free memory for the purgatory stack. Signed-off-by: Thiago Jung Bauermann Acked-by: Dave Young --- include/linux/kexec.h | 1 + kernel/kexec_file.c | 25

[PATCH v6 02/12] kexec_file: Change kexec_add_buffer to take kexec_buf as argument.

This is done to simplify the kexec_add_buffer argument list. Adapt all callers to set up a kexec_buf to pass to kexec_add_buffer. In addition, change the type of kexec_buf.buffer from char * to void *. There is no particular reason for it to be a char *, and the change allows us to get rid of 3

[PATCH v6 01/12] kexec_file: Allow arch-specific memory walking for kexec_add_buffer

Allow architectures to specify a different memory walking function for kexec_add_buffer. x86 uses iomem to track reserved memory ranges, but PowerPC uses the memblock subsystem. Signed-off-by: Thiago Jung Bauermann Acked-by: Dave Young Acked-by:

[PATCH v6 00/12] kexec_file_load implementation for PowerPC

[ Andrew, since this series touches generic code, x86 and powerpc, Michael Ellerman and Dave Young think it should go via your tree. ] I'm sending a new version because of a few problems with version 5 of the patch series (more detailed changelog at the end of this email): - Since maintainers

Re: [PATCH] ibmvnic: Handle backing device failover and reinitialization

From: Thomas Falcon Date: Thu, 18 Aug 2016 11:37:51 -0500 > An upcoming feature of IBM VNIC protocol is the ability to configure > redundant backing devices for a VNIC client. In case of a failure > on the current backing device, the driver will receive a signal >

Re: [PATCH V2 7/7] thermal: qoriq: Add thermal management support

On 四, 2016-06-30 at 11:08 +0800, Jia Hongtao wrote: > This driver add thermal management support by enabling TMU (Thermal > Monitoring Unit) on QorIQ platform. > > It's based on thermal of framework: > - Trip points defined in device tree. > - Cpufreq as cooling device registered in qoriq cpufreq

Re: TM Bad Thing exception easily raised from userspace

Completely off-topic, but... On Fri, Aug 19, 2016 at 07:21:44PM +0200, Laurent Dufour wrote: > asm __volatile__( > "li 3,1 ;" > "tbegin.;" > "beq1f ;" > "li 3,0 ;" >

TM Bad Thing exception easily raised from userspace

Hi, While working on the TM support for CRIU, I faced a TM Bad Thing exception. Digging further, I found that it is *easy* to raised it from the user space. I attached below a simple program which raise it all the time, like this : [12045.221359] Kernel BUG at c0050a40 [verbose debug

Re: debug problems on ppc 83xx target due to changed struct task_struct

On 19/08/16 15:44, Christophe Leroy wrote: >>> >>> I just tried it on an 885 and on an 8323, it work properly on both targets. >>> >>> You can see below the Debug Option that are active on my 8323 target. >>> >> >> >> thanks for trying it. >> >> Could you completely disable FTRACE? As it also

Re: debug problems on ppc 83xx target due to changed struct task_struct

Le 19/08/2016 à 13:14, Holger Brunck a écrit : On 19/08/16 13:03, Christophe Leroy wrote: Le 17/08/2016 à 17:27, Holger Brunck a écrit : On 16/08/16 19:27, christophe leroy wrote: Le 15/08/2016 à 18:19, Dave Hansen a écrit : On 08/15/2016 07:35 AM, Holger Brunck wrote: I tried this

[PATCH v6 7/7] perf annotate: Fix jump target outside of function address range

If jump target is outside of function range, perf is not handling it correctly. Especially when target address is lesser than function start address, target offset will be negative. But, target address declared to be unsigned, converts negative number into 2's complement. See below example. Here

[PATCH v6 6/7] perf annotate: Support jump instruction with target as second operand

Current perf is not able to parse jump instruction when second operand contains target address. Arch like powerpc has such instructions. For example, 'beq cr7,10173e60'. Signed-off-by: Ravi Bangoria --- Changes in v6: - No changes tools/perf/util/annotate.c

[PATCH v6 5/7] perf annotate: Show raw form for jump instruction with indirect target

For jump instructions that does not include target address as direct operand, use raw value for that. This is needed for certain powerpc jump instructions that use target address in a register (such as bctr, btar, ...). Suggested-by: Michael Ellerman Signed-off-by: Ravi

[PATCH v6 4/7] perf annotate: Do not ignore call instruction with indirect target

Do not ignore call instruction with indirect target when its already identified as a call. This is an extension of commit e8ea1561952b ("perf annotate: Use raw form for register indirect call instructions") to generalize annotation for all instructions with indirect calls. This is needed for

[PATCH v6 3/7] perf annotate: Add support for powerpc

From: "Naveen N. Rao" Current perf can disassemble annotated function but it does not have parsing logic for powerpc instructions. So all navigation options are not available for powerpc. Apart from that, Powerpc has long list of branch instructions and

[PATCH v6 2/7] perf annotate: Add cross arch annotate support

Change current data structures and function to enable cross arch annotate. Current perf implementation does not support cross arch annotate. To make it truly cross arch, instruction table of all arch should be present in perf binary. And use appropriate table based on arch where perf.data was

[PATCH v6 1/7] perf: Define macro for normalized arch names

Define macro for each normalized arch name and use them instead of using arch name as string. Signed-off-by: Ravi Bangoria --- Changes in v6: - No change tools/perf/arch/common.c | 36 ++-- tools/perf/arch/common.h

[PATCH v6 0/7] perf: Cross arch annotate + few miscellaneous fixes

Currently Perf annotate support code navigation (branches and calls) only when run on the same architecture where perf.data was recorded. But, for example, record on powerpc server and annotate on client's x86 desktop is not supported. This patchset enables cross arch annotate. Currently I've

Re: [PATCH v4] powerpc: Do not make the entire heap executable

On 08/10/2016 03:00 PM, Denys Vlasenko wrote: On 32-bit powerpc the ELF PLT sections of binaries (built with --bss-plt, or with a toolchain which defaults to it) look like this: [17] .sbss NOBITS 0002aff8 01aff8 14 00 WA 0 0 4 [18] .plt NOBITS

Re: [PATCH 6/6] cxlflash: Update documentation

Acked-by: Manoj N. Kumar On 8/9/2016 6:40 PM, Matthew R. Ochs wrote: Update the block library link in the API documentation. Signed-off-by: Matthew R. Ochs --- Documentation/powerpc/cxlflash.txt | 2 +- 1 file changed, 1 insertion(+), 1

Re: [PATCH 5/6] cxlflash: Remove adapter file descriptor cache

Acked-by: Manoj N. Kumar On 8/9/2016 6:40 PM, Matthew R. Ochs wrote: The adapter file descriptor was previously cached within the kernel for a given context in order to support performing a close on behalf of an application. This is no longer needed as applications

Re: [PATCH v5 2/7] perf annotate: Add cross arch annotate support

On Friday 19 August 2016 04:18 PM, Russell King - ARM Linux wrote: > On Fri, Aug 19, 2016 at 04:09:51PM +0530, Ravi Bangoria wrote: >> Thanks Russell for reviewing. >> >> On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote: >>> On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi

Re: debug problems on ppc 83xx target due to changed struct task_struct

On 19/08/16 13:03, Christophe Leroy wrote: > > > Le 17/08/2016 à 17:27, Holger Brunck a écrit : >> On 16/08/16 19:27, christophe leroy wrote: >>> >>> >>> Le 15/08/2016 à 18:19, Dave Hansen a écrit : On 08/15/2016 07:35 AM, Holger Brunck wrote: > I tried this but unfortunately the error

Re: debug problems on ppc 83xx target due to changed struct task_struct

Le 17/08/2016 à 17:27, Holger Brunck a écrit : On 16/08/16 19:27, christophe leroy wrote: Le 15/08/2016 à 18:19, Dave Hansen a écrit : On 08/15/2016 07:35 AM, Holger Brunck wrote: I tried this but unfortunately the error only occurs while remote debugging. Locally with gdb everything

Re: [PATCH v5 2/7] perf annotate: Add cross arch annotate support

On Fri, Aug 19, 2016 at 04:09:51PM +0530, Ravi Bangoria wrote: > Thanks Russell for reviewing. > > On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote: > > On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi Bangoria wrote: > >> -static struct ins instructions[] = { > >> +static struct

Re: linux-next: build warnings after merge of the kbuild tree

On Fri, 19 Aug 2016 10:37:00 +0200 Michal Marek wrote: > On 2016-08-19 07:09, Stephen Rothwell wrote: > > Hi Nick, > > > > On Fri, 19 Aug 2016 13:38:54 +1000 Stephen Rothwell > > wrote: > >> > >> On Thu, 18 Aug 2016 11:09:48 +1000 Nicholas Piggin

Re: [PATCH v5 2/7] perf annotate: Add cross arch annotate support

Thanks Russell for reviewing. On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote: > On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi Bangoria wrote: >> -static struct ins instructions[] = { >> +static struct ins instructions_x86[] = { >> { .name = "add", .ops = _ops, }, >>

[PATCH V2 5/5] powerpc/64/kexec: Remove BookE special default_machine_kexec_prepare()

From: Benjamin Herrenschmidt The only difference is now the TCE table check which doesn't need to be ifdef'ed out, it will basically do nothing on BookE (it is only useful for ancient IBM machines). Signed-off-by: Benjamin Herrenschmidt

[PATCH V2 4/5] powerpc/64/kexec: Copy image with MMU off when possible

From: Benjamin Herrenschmidt Currently we turn the MMU off after copying the image, and we make sure there is no overlap between the hash table and the target pages in that case. That doesn't work for Radix however. In that case, the page tables are scattered and we

[PATCH V2 3/5] powerpc/64/kexec: Fix MMU cleanup on radix

From: Benjamin Herrenschmidt Just using the hash ops won't work anymore since radix will have NULL in there. Instead create an mmu_cleanup_all() function which will do the right thing based on the MMU mode. For Radix, for now I clear UPRT and the PTCR, effectively

[PATCH V2 2/5] powerpc/mm: Add radix flush all with IS=3

Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/tlbflush-radix.h | 1 + arch/powerpc/mm/tlb-radix.c | 15 +++ 2 files changed, 16 insertions(+) diff --git

[PATCH V2 1/5] powerpc/64/kexec: NULL check "clear_all" in kexec_sequence

From: Benjamin Herrenschmidt With Radix, it can be NULL even on !BOOKE these days so replace the ifdef with a NULL check which is cleaner anyway. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Aneesh Kumar K.V

[PATCH V2 0/5] kexec changes for Power ISA 3.0

Add kexec support with radix page table config. Changes from v1: * Rebase to latest kernel * add tlbflush on MMU cleanup Aneesh Kumar K.V (1): powerpc/mm: Add radix flush all with IS=3 Benjamin Herrenschmidt (4): powerpc/64/kexec: NULL check "clear_all" in kexec_sequence powerpc/64/kexec:

Re: linux-next: build warnings after merge of the kbuild tree

On 2016-08-19 07:09, Stephen Rothwell wrote: > Hi Nick, > > On Fri, 19 Aug 2016 13:38:54 +1000 Stephen Rothwell > wrote: >> >> On Thu, 18 Aug 2016 11:09:48 +1000 Nicholas Piggin wrote: >>> >>> On Wed, 17 Aug 2016 14:59:59 +0200 >>> Michal Marek

Re: [PATCH v5 2/7] perf annotate: Add cross arch annotate support

On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi Bangoria wrote: > -static struct ins instructions[] = { > +static struct ins instructions_x86[] = { > { .name = "add", .ops = _ops, }, > { .name = "addl", .ops = _ops, }, > { .name = "addq", .ops = _ops, }, > { .name =

Re: [PATCH] powerpc/8xx: use SPRN_EIE and SPRN_EID to enable/disable interrupts

Le 18/08/2016 à 19:54, Segher Boessenkool a écrit : On Thu, Aug 18, 2016 at 06:52:47PM +0200, Christophe Leroy wrote: Le 18/08/2016 à 18:34, Segher Boessenkool a écrit : On Thu, Aug 18, 2016 at 05:56:02PM +0200, Christophe Leroy wrote: The 8xx has two special registers called EID (External

Re: [PATCH v3 04/21] powerpc: Return the new MSR from msr_check_and_set()

On Wed, 2016-08-17 at 13:43 +1000, Cyril Bur wrote: > mfmsr() is a fairly expensive call and callers of msr_check_and_set() > may want to make decisions bits in the MSR that it did not change but > may not know the value of. I can't grok this.  Please reword. Mikey > This patch would avoid a

Re: [PATCH v3 03/21] powerpc: Add check_if_tm_restore_required() to giveup_all()

On Wed, 2016-08-17 at 13:43 +1000, Cyril Bur wrote: > giveup_all() causes FPU/VMX/VSX facilitities to be disabled in a facilities. > threads MSR. If this thread was transactional this should be recorded > as reclaiming/recheckpointing code will need to know. Can you expand on this?  It's not

Re: [PATCH v3 02/21] powerpc: Always restore FPU/VEC/VSX if hardware transactional memory in use

On Wed, 2016-08-17 at 13:43 +1000, Cyril Bur wrote: > Comment from arch/powerpc/kernel/process.c:967: >  If userspace is inside a transaction (whether active or >  suspended) and FP/VMX/VSX instructions have ever been enabled >  inside that transaction, then we have to keep them enabled >  and

Re: [PATCH v4 0/3] perf annotate: Enable cross arch annotate

I've sent v5 series for this. Please review it. Thanks, Ravi On Wednesday 13 July 2016 03:15 PM, Ravi Bangoria wrote: > Arnaldo, Michael, > > I've tested this patchset on ppc64 BE and LE both. Please review this. > > -Ravi > > On Friday 08 July 2016 10:10 AM, Ravi Bangoria wrote: >> Perf can