RE: [v12, 5/8] soc: fsl: add GUTS driver for QorIQ platforms

2016-10-26 Thread Y.B. Lu
Hi Scott, > -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Thursday, October 27, 2016 1:06 AM > To: Y.B. Lu; linux-...@vger.kernel.org; ulf.hans...@linaro.org; Arnd > Bergmann > Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; linux-arm- >

Re: [PATCH] powerpc: process.c: fix Kconfig typo

2016-10-26 Thread Cyril Bur
On Wed, 2016-10-26 at 16:52 +1100, Michael Ellerman wrote: > Cyril Bur writes: > > > On Wed, 2016-10-05 at 07:57 +0200, Valentin Rothberg wrote: > > > s/ALIVEC/ALTIVEC/ > > > > > > > Oops, nice catch > > > > > Signed-off-by: Valentin Rothberg >

Re: [PATCH] powerpc: process.c: fix Kconfig typo

2016-10-26 Thread Michael Ellerman
Valentin Rothberg writes: > On Wed, Oct 26, 2016 at 12:40 PM, Michael Ellerman > wrote: >> diff --git a/scripts/checkkconfigsymbols.py b/scripts/checkkconfigsymbols.py >> index a32e4da4c117..3820f00b066a 100755 >> ---

Re: [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper

2016-10-26 Thread Benjamin Herrenschmidt
On Wed, 2016-10-26 at 22:07 +0300, Dan Carpenter wrote: > On Wed, Oct 26, 2016 at 01:57:23PM -0500, Benjamin Herrenschmidt > wrote: > > > > On Wed, 2016-10-26 at 16:03 +0300, Dan Carpenter wrote: > > > > > >    565  cbdv = ((pllmr & 0x0006) >> 17) + 1; /* > > > CPU:PLB */ > > >   

Re: [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper

2016-10-26 Thread Dan Carpenter
On Wed, Oct 26, 2016 at 01:57:23PM -0500, Benjamin Herrenschmidt wrote: > On Wed, 2016-10-26 at 16:03 +0300, Dan Carpenter wrote: > >    565  cbdv = ((pllmr & 0x0006) >> 17) + 1; /* CPU:PLB */ > >    566  opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */ > >    567 

Re: [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper

2016-10-26 Thread Benjamin Herrenschmidt
On Wed, 2016-10-26 at 16:03 +0300, Dan Carpenter wrote: >    565  cbdv = ((pllmr & 0x0006) >> 17) + 1; /* CPU:PLB */ >    566  opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */ >    567  ppdv = ((pllmr & 0x1800) >> 13) + 1; /* PLB:PCI */ >   

Re: [v12, 5/8] soc: fsl: add GUTS driver for QorIQ platforms

2016-10-26 Thread Scott Wood
On Wed, 2016-09-21 at 14:57 +0800, Yangbo Lu wrote: > diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig > new file mode 100644 > index 000..b99764c > --- /dev/null > +++ b/drivers/soc/fsl/Kconfig > @@ -0,0 +1,19 @@ > +# > +# Freescale SOC drivers > +# > + > +source

Re: [PATCH v4 4/5] mm: make processing of movable_node arch-specific

2016-10-26 Thread Reza Arbab
On Wed, Oct 26, 2016 at 09:52:53PM +1100, Michael Ellerman wrote: As far as I know, power has nothing like the SRAT that tells us, at boot, which memory is hotpluggable. On pseries we have the ibm,dynamic-memory device tree property, which can contain ranges of memory that are not yet

[bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper

2016-10-26 Thread Dan Carpenter
Hello Matthias Fuchs, The patch 2af59f7d5c3e: "[POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper" from Dec 7, 2007, leads to the following static checker warning: arch/powerpc/boot/4xx.c:567 ibm405gp_fixup_clocks() warn: mask and shift to zero arch/powerpc/boot/4xx.c

Re: [PATCH 11/13] ALSA: Deletion of checks before the function call "iounmap"

2016-10-26 Thread Dan Carpenter
On Wed, Oct 26, 2016 at 02:28:59PM +0200, Johannes Berg wrote: > On Wed, 2016-10-26 at 15:26 +0300, Dan Carpenter wrote: > > Someone was just mentioning in another thread that removing the check > > from iounmap() is not portable to other arches and then I remembered > > that Markus removed a

Re: [PATCH 11/13] ALSA: Deletion of checks before the function call "iounmap"

2016-10-26 Thread Johannes Berg
On Wed, 2016-10-26 at 15:26 +0300, Dan Carpenter wrote: > Someone was just mentioning in another thread that removing the check > from iounmap() is not portable to other arches and then I remembered > that Markus removed a bunch of these. > > We should consider reverting this, perhaps? Can't we

Re: [PATCH 11/13] ALSA: Deletion of checks before the function call "iounmap"

2016-10-26 Thread Dan Carpenter
Someone was just mentioning in another thread that removing the check from iounmap() is not portable to other arches and then I remembered that Markus removed a bunch of these. We should consider reverting this, perhaps? regards, dan carpenter On Sun, Jan 04, 2015 at 02:36:01PM +0100, SF Markus

[PATCH v16 15/15] selftests/powerpc: Fix a build issue

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual Fixes the following build failure - cp_abort.c:90:3: error: ‘for’ loop initial declarations are only allowed in C99 or C11 mode for (int i = 0; i < NUM_LOOPS; i++) { ^ cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or

[PATCH v16 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds a .gitignore file for all the executables in the ptrace test directory thus making invisible with git status query. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo

[PATCH v16 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for TM SPR registers. This also adds ptrace interface based helper functions related to TM SPR registers access. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo

[PATCH v16 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for VSX, VMX registers inside suspended TM context. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo ---

[PATCH v16 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for VSX, VMX registers inside TM context. This also adds ptrace interface based helper functions related to chckpointed VSX, VMX registers access. Signed-off-by: Anshuman Khandual

[PATCH v16 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for VSX, VMX registers. This also adds ptrace interface based helper functions related to VSX, VMX registers access. This also adds some assembly helper functions related to VSX and VMX registers.

[PATCH v16 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for TAR, PPR, DSCR registers inside suspended TM context. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo ---

[PATCH v16 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for TAR, PPR, DSCR registers inside TM context. This also adds ptrace interface based helper functions related to checkpointed TAR, PPR, DSCR register access. Signed-off-by: Anshuman Khandual

[PATCH v16 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for TAR, PPR, DSCR registers. This also adds ptrace interface based helper functions related to TAR, PPR, DSCR register access. Signed-off-by: Anshuman Khandual

[PATCH v16 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for GPR/FPR registers inside suspended TM context. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo ---

[PATCH v16 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for GPR/FPR registers inside TM context. This adds ptrace interface based helper functions related to checkpointed GPR/FPR access. Signed-off-by: Anshuman Khandual

[PATCH v16 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for GPR/FPR registers. This adds ptrace interface based helper functions related to GPR/FPR access and some assembly helper functions related to GPR/FPR registers. Signed-off-by: Anshuman Khandual

[PATCH v16 03/15] selftests/powerpc: Add ptrace tests for EBB

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds ptrace interface test for EBB/PMU specific registers. This also adds some generic ptrace interface based helper functions to be used by other patches later on in the series. Signed-off-by: Anshuman Khandual

[PATCH v16 02/15] selftests/powerpc: move shared utility files into new utility/ dir

2016-10-26 Thread wei . guo . simon
From: Simon Guo There are some functions, especially register related, which can be shared across multiple selftests/powerpc test directories. This patch creates a new utility directory to store those shared functionalities, so that the file layout becomes more neat.

[PATCH v16 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'

2016-10-26 Thread wei . guo . simon
From: Anshuman Khandual This patch adds SPR number for TAR, PPR, DSCR special purpose registers. It also adds TM, VSX, VMX related instructions which will then be used by patches later in the series. Now that the new DSCR register definitions (SPRN_DSCR_PRIV and

[PATCH v16 00/15] selftests/powerpc: Add ptrace tests for ppc registers

2016-10-26 Thread wei . guo . simon
From: Simon Guo This selftest suite is for PPC register ptrace functionality. It is also useful for Transaction Memory functionality verification. Signed-off-by: Anshuman Khandual Signed-off-by: Simon Guo Test

Re: [PATCH v4 4/5] mm: make processing of movable_node arch-specific

2016-10-26 Thread Michael Ellerman
Reza Arbab writes: > On Wed, Oct 26, 2016 at 09:34:18AM +1100, Balbir Singh wrote: >>I still believe we need your changes, I was wondering if we've tested >>it against normal memory nodes and checked if any memblock >>allocations end up there. Michael showed me some

Re: [PATCH] powerpc: process.c: fix Kconfig typo

2016-10-26 Thread Valentin Rothberg
On Wed, Oct 26, 2016 at 12:40 PM, Michael Ellerman wrote: > Valentin Rothberg writes: > >> On Wed, Oct 26, 2016 at 7:52 AM, Michael Ellerman >> wrote: >>> Cyril Bur writes: >>> On Wed, 2016-10-05 at

Re: [PATCH] powerpc: process.c: fix Kconfig typo

2016-10-26 Thread Michael Ellerman
Valentin Rothberg writes: > On Wed, Oct 26, 2016 at 7:52 AM, Michael Ellerman wrote: >> Cyril Bur writes: >> >>> On Wed, 2016-10-05 at 07:57 +0200, Valentin Rothberg wrote: s/ALIVEC/ALTIVEC/ >>> >>> Oops, nice catch

Re: powerpc: cmp -> cmpd for 64-bit

2016-10-26 Thread Michael Ellerman
On Thu, 2016-06-10 at 13:42:19 UTC, Segher Boessenkool wrote: > PowerPC's "cmp" instruction has four operands. Normally people write > "cmpw" or "cmpd" for the second cmp operand 0 or 1. But, frequently > people forget, and write "cmp" with just three operands. > > With older binutils this is

Re: KVM: PPC: Book3S HV: Fix build error when SMP=n

2016-10-26 Thread Michael Ellerman
On Thu, 2016-20-10 at 03:57:12 UTC, Michael Ellerman wrote: > Commit 5d375199ea96 ("KVM: PPC: Book3S HV: Set server for passed-through > interrupts") broke the SMP=n build: > > arch/powerpc/kvm/book3s_hv_rm_xics.c:758:2: error: implicit declaration of > function 'get_hard_smp_processor_id' >

Re: [RESEND] cxl: Fix leaking pid refs in some error paths

2016-10-26 Thread Michael Ellerman
On Fri, 2016-21-10 at 09:23:53 UTC, Vaibhav Jain wrote: > In some error paths in functions cxl_start_context and > afu_ioctl_start_work pid references to the current & group-leader tasks > can leak after they are taken. This patch fixes these error paths to > release these pid references before

Re: [2/2] powerpc/64: Fix race condition in setting lock bit in idle/wakeup code

2016-10-26 Thread Michael Ellerman
On Fri, 2016-21-10 at 09:04:17 UTC, Paul Mackerras wrote: > This fixes a race condition where one thread that is entering or > leaving a power-saving state can inadvertently ignore the lock bit > that was set by another thread, and potentially also clear it. > The core_idle_lock_held function is

Re: [1/2] powerpc/64: Re-fix race condition between going idle and entering guest

2016-10-26 Thread Michael Ellerman
On Fri, 2016-21-10 at 09:03:05 UTC, Paul Mackerras wrote: > Commit 8117ac6a6c2f ("powerpc/powernv: Switch off MMU before entering > nap/sleep/rvwinkle mode", 2014-12-10) fixed a race condition where one > thread entering a KVM guest could switch the MMU context to the guest > while another thread

[PATCH] fsl_pamu: erratum a007907 should be applied on all versions of E6500 chips.

2016-10-26 Thread jun
Signed-off-by: jun --- drivers/iommu/fsl_pamu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c index db3a1cd..a8fe503 100644 --- a/drivers/iommu/fsl_pamu.c +++ b/drivers/iommu/fsl_pamu.c @@ -668,7 +668,7

[RFC PATCH v7 3/3] PCI: Add a macro to set default alignment for all PCI devices

2016-10-26 Thread Yongji Xie
When vfio passthroughs a PCI device of which MMIO BARs are smaller than PAGE_SIZE, guest will not handle the mmio accesses to the BARs which leads to mmio emulations in host. This is because vfio will not allow to passthrough one BAR's mmio page which may be shared with other BARs. Otherwise,

[RFC PATCH v7 2/3] PCI: Restore resource's size if we expand it by using resource_alignment

2016-10-26 Thread Yongji Xie
When using resource_alignment kernel parameter, the current implement reassigns the alignment by changing resources' size which can potentially break some drivers. For example, the driver uses the size to locate some register whose length is related to the size. This saves the increased sizes in

[RFC PATCH v7 1/3] PCI: Ignore requested alignment for IOV BARs

2016-10-26 Thread Yongji Xie
We would call pci_reassigndev_resource_alignment() before pci_init_capabilities(). So the requested alignment would never work for IOV BARs. And it's also meaningless to do so. Signed-off-by: Yongji Xie --- drivers/pci/pci.c |2 +- 1 file changed, 1 insertion(+),

[RFC PATCH v7 0/3] PCI: Introduce a way to enforce all MMIO BARs not to share PAGE_SIZE

2016-10-26 Thread Yongji Xie
This series introduces a way for PCI resource allocator to force MMIO BARs not to share PAGE_SIZE. This would make sense to VFIO driver. Because current VFIO implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs which may share the same page with other BARs for security reasons.

Re: [PATCH] powerpc: process.c: fix Kconfig typo

2016-10-26 Thread Valentin Rothberg
On Wed, Oct 26, 2016 at 7:52 AM, Michael Ellerman wrote: > Cyril Bur writes: > >> On Wed, 2016-10-05 at 07:57 +0200, Valentin Rothberg wrote: >>> s/ALIVEC/ALTIVEC/ >>> >> >> Oops, nice catch >> >>> Signed-off-by: Valentin Rothberg