[PATCH] powerpc/xive: Fix missing check of rc != OPAL_BUSY

Dan Carpenter noticed that the code in __xive_native_disable_queue() has a for loop with an unconditional break in the middle, which doesn't make a lot of sense. What the code's supposed to do is loop as long as OPAL says it's busy, if we get any other return code, either success or failure, then

Re: [PATCH] powerpc/crypto/crct10dif-vpmsum: Fix missing preempt_disable()

Daniel Axtens writes: > Hi Michael, > >> Fixes: b01df1c16c9a ("crypto: powerpc - Add CRC-T10DIF acceleration") > > Thank you very much for doing this! (and my apologies for not doing it > myself!) No worries, the enable_altivec() API is ridiculous, I'm surprised we ever get it

linux-next: build failure after merge of the rcu tree

Hi Paul, [Also reported by Michael elsewhere] After merging the rcu tree, today's linux-next build (powerpc pseries_le_defconfig) failed like this: arch/powerpc/kvm/book3s_hv_rmhandlers.S: Assembler messages: arch/powerpc/kvm/book3s_hv_rmhandlers.S:587: Error: operand out of range

[PATCH v2] powerpc/crypto/crct10dif-vpmsum: Fix missing preempt_disable()

In crct10dif_vpmsum() we call enable_kernel_altivec() without first disabling preemption, which is not allowed. It used to be sufficient just to call pagefault_disable(), because that also disabled preemption. But the two were decoupled in commit 8222dbe21e79 ("sched/preempt, mm/fault: Decouple

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/2017 07:33 PM, Steven Rostedt wrote: > On Wed, 19 Apr 2017 16:27:10 -0700 > Tyrel Datwyler wrote: > >> # echo stacktrace > /sys/kernel/debug/tracing/trace_options >> # cat trace | grep -A6 "/pci@8002018" > > Just to let you know that there is now

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/17 21:43, Frank Rowand wrote: > On 04/19/17 16:27, Tyrel Datwyler wrote: >> On 04/18/2017 06:31 PM, Michael Ellerman wrote: < snip > >> >> To get that same info as far as I know is to add a dump_stack() after >> each pr_debug. > > Here is a patch that I have used. It is not as user

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/17 19:33, Steven Rostedt wrote: > On Wed, 19 Apr 2017 16:27:10 -0700 > Tyrel Datwyler wrote: > >> # echo stacktrace > /sys/kernel/debug/tracing/trace_options >> # cat trace | grep -A6 "/pci@8002018" > > Just to let you know that there is now

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/17 16:27, Tyrel Datwyler wrote: > On 04/18/2017 06:31 PM, Michael Ellerman wrote: >> Frank Rowand writes: >> >>> On 04/17/17 17:32, Tyrel Datwyler wrote: This patch introduces event tracepoints for tracking a device_nodes reference cycle as well as

[PATCH v6 7/7] perf report: Show branch type in callchain entry

Show branch type in callchain entry. The branch type is printed with other LBR information (such as cycles/abort/...). For example: perf report --branch-history --stdio --no-children --24.21%--main div.c:42 (RET CROSS_2M cycles:2) compute_flag div.c:28 (cycles:2) compute_flag

[PATCH v6 6/7] perf report: Show branch type statistics for stdio mode

Show the branch type statistics at the end of perf report --stdio. For example: perf report --stdio JCC forward: 27.6% JCC backward: 10.0% CROSS_4K: 0.0% CROSS_2M: 14.3% JCC: 37.6% JMP: 0.0% IND_JMP: 6.5% CALL: 26.6% IND_CALL: 0.0%

[PATCH v6 5/7] perf util: Create branch.c/.h for common branch functions

Create new util/branch.c and util/branch.h to contain the common branch functions. Such as: branch_type_count(): Count the numbers of branch types branch_type_name() : Return the name of branch type branch_type_stat_display(): Display branch type statistics info branch_type_str(): Construct the

[PATCH v6 4/7] perf report: Refactor the branch info printing code

The branch info such as predicted/cycles/... are printed at the callchain entries. For example: perf report --branch-history --no-children --stdio --1.07%--main div.c:39 (predicted:52.4% cycles:1 iterations:17) main div.c:44 (predicted:52.4% cycles:1) main

[PATCH v6 3/7] perf record: Create a new option save_type in --branch-filter

The option indicates the kernel to save branch type during sampling. One example: perf record -g --branch-filter any,save_type Change log -- v6: Not changed. v5: Not changed. Signed-off-by: Jin Yao --- tools/perf/Documentation/perf-record.txt | 1 +

[PATCH v6 2/7] perf/x86/intel: Record branch type

Perf already has support for disassembling the branch instruction and using the branch type for filtering. The patch just records the branch type in perf_branch_entry. Before recording, the patch converts the x86 branch type to common branch type. Change log -- v6: Not changed. v5:

[PATCH v6 1/7] perf/core: Define the common branch type classification

It is often useful to know the branch types while analyzing branch data. For example, a call is very different from a conditional branch. Currently we have to look it up in binary while the binary may later not be available and even the binary is available but user has to take some time. It is

[PATCH v6 0/7] perf report: Show branch type

v6: Update according to the review comments from Jiri Olsa . Major modifications are: 1. Move that multiline conditional code inside {} brackets. 2. Move branch_type_stat_display() from builtin-report.c to branch.c. Move branch_type_str() from callchain.c to

powerpc KVM build break in linux-next (was Re: [PATCH tip/core/rcu 40/40] srcu: Parallelize callback handling)

"Paul E. McKenney" writes: > diff --git a/include/linux/srcutree.h b/include/linux/srcutree.h > index f2b3bd6c6bc2..0400e211aa44 100644 > --- a/include/linux/srcutree.h > +++ b/include/linux/srcutree.h > @@ -24,25 +24,75 @@ ... > +/* > + * Per-SRCU-domain structure,

Re: [PATCH v5 1/4] printk/nmi: generic solution for safe printk in NMI

Hello Steven, On (04/19/17 13:13), Steven Rostedt wrote: > > printk() takes some locks and could not be used a safe way in NMI context. > > I just found a problem with this solution. It kills ftrace dumps from > NMI context :-( > > [ 1295.168495]<...>-67423 10dNh1 38217us :

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/17 11:45, Tyrel Datwyler wrote: > On 04/18/2017 07:49 PM, Steven Rostedt wrote: >> On Tue, 18 Apr 2017 18:42:32 -0700 >> Frank Rowand wrote: >> >>> And of course the other issue with using tracepoints is the extra space >>> required to hold the tracepoint info.

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On Wed, 19 Apr 2017 16:27:10 -0700 Tyrel Datwyler wrote: > # echo stacktrace > /sys/kernel/debug/tracing/trace_options > # cat trace | grep -A6 "/pci@8002018" Just to let you know that there is now stacktrace event triggers, where you don't need to

Re: [bug report] powerpc/xive: Native exploitation of the XIVE interrupt controller

On Thu, 2017-04-20 at 04:20 +0300, Dan Carpenter wrote: > Hello Benjamin Herrenschmidt, > > The patch 243e25112d06: "powerpc/xive: Native exploitation of the > XIVE interrupt controller" from Apr 5, 2017, leads to the following > static checker warning: > >

Re: [PATCH v3 2/2] powerpc/eeh: Clean up and document event handling functions

On Thu, Apr 20, 2017 at 11:03:57AM +1000, Russell Currey wrote: >On Thu, 2017-04-20 at 09:48 +1000, Gavin Shan wrote: >> On Wed, Apr 19, 2017 at 05:39:27PM +1000, Russell Currey wrote: >> > Remove unnecessary tags in eeh_handle_normal_event(), and add function >> > comments for

Re: [PATCH v3 2/2] powerpc/eeh: Clean up and document event handling functions

On Wed, Apr 19, 2017 at 05:39:27PM +1000, Russell Currey wrote: >Remove unnecessary tags in eeh_handle_normal_event(), and add function >comments for eeh_handle_normal_event() and eeh_handle_special_event(). > >The only functional difference is that in the case of a PE reaching the >maximum number

[bug report] powerpc/xive: Native exploitation of the XIVE interrupt controller

Hello Benjamin Herrenschmidt, The patch 243e25112d06: "powerpc/xive: Native exploitation of the XIVE interrupt controller" from Apr 5, 2017, leads to the following static checker warning: arch/powerpc/sysdev/xive/native.c:184 __xive_native_disable_queue() info: ignoring

Re: [PATCH v3 2/2] powerpc/eeh: Clean up and document event handling functions

On Thu, 2017-04-20 at 09:48 +1000, Gavin Shan wrote: > On Wed, Apr 19, 2017 at 05:39:27PM +1000, Russell Currey wrote: > > Remove unnecessary tags in eeh_handle_normal_event(), and add function > > comments for eeh_handle_normal_event() and eeh_handle_special_event(). > > > > The only functional

Re: [PATCH v3 2/2] powerpc/eeh: Clean up and document event handling functions

On 19/04/17 17:39, Russell Currey wrote: Remove unnecessary tags in eeh_handle_normal_event(), and add function comments for eeh_handle_normal_event() and eeh_handle_special_event(). The only functional difference is that in the case of a PE reaching the maximum number of failures, rather than

Re: [PATCH v5 7/7] perf report: Show branch type in callchain entry

On 4/19/2017 10:15 PM, Jiri Olsa wrote: On Wed, Apr 19, 2017 at 11:48:14PM +0800, Jin Yao wrote: SNIP +static int branch_type_str(struct branch_type_stat *stat, + char *bf, int bfsize) +{ + int i, j = 0, printed = 0; + u64 total = 0; + + for (i =

Re: [PATCH v3 1/2] powerpc/eeh: Avoid use after free in eeh_handle_special_event()

On 19/04/17 17:39, Russell Currey wrote: eeh_handle_special_event() is called when an EEH event is detected but can't be narrowed down to a specific PE. This function looks through every PE to find one in an erroneous state, then calls the regular event handler eeh_handle_normal_event() once it

Re: [PATCH v3 00/21] eeprom: at24: Add OF device ID table

On Thu, Apr 13, 2017 at 10:04:24PM -0300, Javier Martinez Canillas wrote: > Hello Wolfram, > > This series is a follow-up to patch [0] that added an OF device ID table > to the at24 EEPROM driver. As you suggested [1], this version instead of > adding entries for every used tuple,

Re: [PATCH] powerpc/crypto/crct10dif-vpmsum: Fix missing preempt_disable()

Hi Michael, > Fixes: b01df1c16c9a ("crypto: powerpc - Add CRC-T10DIF acceleration") Thank you very much for doing this! (and my apologies for not doing it myself!) It all looks good to me. I think an Ack is appropriate in these circumstances? Acked-by: Daniel Axtens Regards,

Re: [PATCH v3 1/2] powerpc/eeh: Avoid use after free in eeh_handle_special_event()

On Wed, Apr 19, 2017 at 05:39:26PM +1000, Russell Currey wrote: >eeh_handle_special_event() is called when an EEH event is detected but >can't be narrowed down to a specific PE. This function looks through >every PE to find one in an erroneous state, then calls the regular event >handler

Re: [PATCH v3 2/2] powerpc/eeh: Clean up and document event handling functions

On Wed, Apr 19, 2017 at 05:39:27PM +1000, Russell Currey wrote: >Remove unnecessary tags in eeh_handle_normal_event(), and add function >comments for eeh_handle_normal_event() and eeh_handle_special_event(). > >The only functional difference is that in the case of a PE reaching the >maximum number

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/2017 06:31 PM, Michael Ellerman wrote: > Frank Rowand writes: > >> On 04/17/17 17:32, Tyrel Datwyler wrote: >>> This patch introduces event tracepoints for tracking a device_nodes >>> reference cycle as well as reconfig notifications generated in response >>> to

Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

Madhavan Srinivasan writes: > On Wednesday 19 April 2017 10:20 AM, Michael Ellerman wrote: >> It also occurred to me that we don't actually have to redefine the whole >> union, it's only the bitfields that matter, so we could reduce the diff >> to: >> >> diff --git

Re: powerpc: POWER9 DD1 remove SAO feature

On Wed, 2017-04-19 at 02:27:38 UTC, Nicholas Piggin wrote: > Signed-off-by: Nicholas Piggin Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/ca80d5d0a8175c9be04cfbce24180b cheers

Re: powerpc: POWER9 remove ICSWX feature

On Wed, 2017-04-19 at 02:27:37 UTC, Nicholas Piggin wrote: > POWER9 does not implement this instruction. > > Fixes: c3ab300ea5 ("powerpc: Add POWER9 cputable entry") > > Signed-off-by: Nicholas Piggin Applied to powerpc next, thanks.

Re: [1/4] powerpc/64s: Revert setting LPCR LPES0 on POWER9

On Tue, 2017-04-18 at 19:12:16 UTC, Nicholas Piggin wrote: > The XIVE enablement patches set LPES0 on POWER9 host. This bit sets > external interrupts to guest delivery mode that uses SRR[01]. The host's > EE interrupt handler expects HSRR[01] (for earlier CPUs). which is fine > because XIVE is

Re: [V2] powerpc/mm: Update mm context addr limit correctly.

On Tue, 2017-04-18 at 07:01:27 UTC, "Aneesh Kumar K.V" wrote: > We added the addr < TASK_SIZE check to avoid updating addr_limit > unnecessarily and > also to avoid calling slice_flush_segments on all the cpus. This had the side > effect of having different behaviour when using an addr value

Re: powerpc/64s: Minor fix for MCE TLB flush for radix

On Sun, 2017-04-16 at 14:21:19 UTC, Nicholas Piggin wrote: > The TLB flush for radix first flushes TLB for radix configuration, > then flushes for hash configuration. The second flush is unnecessary > but does not affect correctness. > > Fixes: 1a472c9dba6b9 ("powerpc/mm/radix: Add tlbflush

Re: powerpc/mm/radix: Use mm->task_size for boundary checking instead of addr_limit

On Thu, 2017-04-13 at 19:18:21 UTC, "Aneesh Kumar K.V" wrote: > We don't init addr_limit correctly for 32 bit applications. So default to > using > mm->task_size for boundary condition checking. We use addr_limit to only > control > free space search. This makes sure that we do the right thing

Re: [kernel, v2] powerpc/iommu: Do not call PageTransHuge() on tail pages

On Tue, 2017-04-11 at 07:54:57 UTC, Alexey Kardashevskiy wrote: > The CMA pages migration code does not support compound pages at > the moment so it performs few tests before proceeding to actual page > migration. > > One of the tests - PageTransHuge() - has VM_BUG_ON_PAGE(PageTail()) as > it is

Re: [v3, 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

On Tue, 2017-04-11 at 01:51:05 UTC, Madhavan Srinivasan wrote: > From: Sukadev Bhattiprolu > > perf_mem_data_src is an union that is initialized via the ->val field > and accessed via the bitmap fields. For this to work on big endian > platforms (Which is broken now),

Re: [v2] cxl: Enable PCI device IDs for future IBM CXL adapters

On Fri, 2017-03-24 at 16:03:19 UTC, "Matthew R. Ochs" wrote: > Add support for future IBM Coherent Accelerator (CXL) devices > with an IDs of 0x0623 and 0x0628. > > Signed-off-by: Matthew R. Ochs > Signed-off-by: Uma Krishnan > Acked-by:

Re: [PATCH v7 07/10] powerpc/perf: PMU functions for Core IMC and hotplugging

Hi Hemant, [auto build test WARNING on linus/master] [also build test WARNING on v4.11-rc7] [cannot apply to next-20170419] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Anju-T-Sudhakar

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/19/2017 03:13 AM, Michael Ellerman wrote: > Oliver O'Halloran writes: > >> On Wed, Apr 19, 2017 at 2:46 AM, Rob Herring wrote: >>> On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler >>> wrote: This patch introduces event

[PATCH v2 10/11] soc/fsl/qbman: Add missing headers on ARM

From: Claudiu Manoil Unlike PPC builds, ARM builds need following headers explicitly: +#include for ioread32be() +#includefor udelay() Signed-off-by: Claudiu Manoil Signed-off-by: Roy Pledge ---

[PATCH v2 06/11] soc/fsl/qbman: Fix ARM32 typo

From: Valentin Rothberg The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'. Signed-off-by: Valentin Rothberg Signed-off-by: Claudiu Manoil Signed-off-by: Roy Pledge ---

[PATCH v2 11/11] fsl/soc/qbman: Enable FSL_LAYERSCAPE config on ARM

From: Madalin Bucur Signed-off-by: Madalin Bucur Signed-off-by: Claudiu Manoil [Stuart: changed to use ARCH_LAYERSCAPE] Signed-off-by: Stuart Yoder Signed-off-by: Roy Pledge ---

[PATCH v2 09/11] soc/fsl/qbman: different register offsets on ARM

From: Madalin Bucur Signed-off-by: Madalin Bucur Signed-off-by: Claudiu Manoil Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/bman.c | 22 ++ drivers/soc/fsl/qbman/qman.c | 38

[PATCH v2 07/11] soc/fsl/qbman: Rework ioremap() calls for ARM/PPC

Rework ioremap() for PPC and ARM. The PPC devices require a non-coherent mapping while ARM will work with a non-cachable/write combine mapping. Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/bman_portal.c | 16 +--- drivers/soc/fsl/qbman/qman_portal.c | 16

[PATCH v2 08/11] soc/fsl/qbman: add QMAN_REV32

From: Madalin Bucur Add revision 3.2 of the QBMan block. This is the version for LS1043A and LS1046A SoCs. Signed-off-by: Madalin Bucur Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/qman_ccsr.c | 2 ++

[PATCH v2 05/11] soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check

From: Claudiu Manoil Not relevant and arch dependent. Overkill for PPC. Signed-off-by: Claudiu Manoil Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/dpaa_sys.h | 4 1 file changed, 4 deletions(-) diff --git

[PATCH v2 04/11] soc/fsl/qbman: Drop set/clear_bits usage

From: Madalin Bucur Replace PPC specific set/clear_bits API with standard bit twiddling so driver is portalable outside PPC. Signed-off-by: Madalin Bucur Signed-off-by: Claudiu Manoil Signed-off-by: Roy Pledge

[PATCH v2 03/11] dt-bindings: soc/fsl: Update reserved memory binding for QBMan

Updates the QMan and BMan device tree bindings for reserved memory nodes. This makes the reserved memory allocation compatiable with the shared-dma-pool usage. Signed-off-by: Roy Pledge --- Documentation/devicetree/bindings/soc/fsl/bman.txt | 11 ++-

[PATCH v2 02/11] soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations

Use the shared-memory-pool mechanism for frame queue descriptor and packed frame descriptor record area allocations. Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/qman_ccsr.c | 136 +- drivers/soc/fsl/qbman/qman_priv.h | 4 +-

[PATCH v2 01/11] soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations

Use the shared-memory-pool mechanism for free buffer proxy record area allocation. Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/bman_ccsr.c | 35 ++- drivers/soc/fsl/qbman/bman_priv.h | 3 +++ 2 files changed, 37 insertions(+), 1

[PATCH v2 00/11] soc/fsl/qbman: Enable QBMan on ARM Platforms

This patch series enables DPAA1 QBMan devices for ARM and ARM64 architectures. This allows the LS1043A and LS1046A to use QBMan functionality. Changes since v1: Reworked private memory allocations to use shared-dma-pool on ARM platforms Claudiu Manoil (2): soc/fsl/qbman: Drop L1_CACHE_BYTES

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/2017 07:49 PM, Steven Rostedt wrote: > On Tue, 18 Apr 2017 18:42:32 -0700 > Frank Rowand wrote: > >> And of course the other issue with using tracepoints is the extra space >> required to hold the tracepoint info. With the pr_debug() approach, the >> space usage

Re: [PATCH 3/3] powerpc/mm: Implement CONFIG_DEBUG_RODATA on PPC32

Le 19/04/2017 à 16:22, Christophe LEROY a écrit : Le 19/04/2017 à 16:01, Michael Ellerman a écrit : Christophe Leroy writes: diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index 32509de6ce4c..4af81fb23653 100644 ---

Re: [PATCH] powerpc/mm: Add support for runtime configuration of ASLR limits

Hi Michael, On Wed, Apr 19, 2017 at 7:59 PM, Michael Ellerman wrote: > Add powerpc support for mmap_rnd_bits and mmap_rnd_compat_bits, which are two > sysctls that allow a user to configure the number of bits of randomness used > for > ASLR. > > Because of the way the

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/2017 07:31 PM, Frank Rowand wrote: > On 04/18/17 18:31, Michael Ellerman wrote: >> Frank Rowand writes: >> >>> On 04/17/17 17:32, Tyrel Datwyler wrote: This patch introduces event tracepoints for tracking a device_nodes reference cycle as well as

Re: [PATCH v11 4/7] powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned

On Tue, Apr 18, 2017 at 9:12 PM, Yongji Xie wrote: > On 19 April 2017 at 09:47, Michael Ellerman wrote: >> Bjorn Helgaas writes: >> >>> On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote: From: Yongji Xie

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/17/17 17:32, Tyrel Datwyler wrote: > This patch introduces event tracepoints for tracking a device_nodes > reference cycle as well as reconfig notifications generated in response > to node/property manipulations. > > With the recent upstreaming of the refcount API several device_node >

Re: [PATCH] powerpc/mm: Add support for runtime configuration of ASLR limits

On Wed, Apr 19, 2017 at 7:29 AM, Michael Ellerman wrote: > Add powerpc support for mmap_rnd_bits and mmap_rnd_compat_bits, which are two > sysctls that allow a user to configure the number of bits of randomness used > for > ASLR. > > Because of the way the Kconfig for

Re: [PATCH v5 1/4] printk/nmi: generic solution for safe printk in NMI

On Wed, Apr 19, 2017 at 01:13:41PM -0400, Steven Rostedt wrote: > On Thu, 21 Apr 2016 13:48:42 +0200 > Petr Mladek wrote: > > > printk() takes some locks and could not be used a safe way in NMI context. > > I just found a problem with this solution. It kills ftrace dumps from

Re: [PATCH v5 1/4] printk/nmi: generic solution for safe printk in NMI

On Thu, 21 Apr 2016 13:48:42 +0200 Petr Mladek wrote: > printk() takes some locks and could not be used a safe way in NMI context. I just found a problem with this solution. It kills ftrace dumps from NMI context :-( [ 1295.168495]<...>-67423 10dNh1 38217us :

[PATCH v3 tip/core/rcu 02/40] rcu: Make arch select smp_mb__after_unlock_lock() strength

The definition of smp_mb__after_unlock_lock() is currently smp_mb() for CONFIG_PPC and a no-op otherwise. It would be better to instead provide an architecture-selectable Kconfig option, and select the strength of smp_mb__after_unlock_lock() based on that option. This commit therefore creates

Re: [PATCH v3 6/7] powerpc: kprobes: emulate instructions on kprobe handler re-entry

Excerpts from Masami Hiramatsu's message of April 19, 2017 20:13: BTW, as I pointed, 5/7 and 6/7 should be merged since this actually makes meaningful change. Yes, sorry if I wasn't clear in my previous reply in the (!) previous patch series. Since this has to go through the powerpc tree,

Re: [PATCH v3 3/7] kprobes: validate the symbol name length

Excerpts from Masami Hiramatsu's message of April 19, 2017 20:07: On Wed, 19 Apr 2017 18:21:02 +0530 "Naveen N. Rao" wrote: When a kprobe is being registered, we use the symbol_name field to lookup the address where the probe should be placed. Since this is a

[PATCH 2/2] powerpc: kprobes: blacklist exception common handlers

Blacklist all the exception common/OOL handlers as the kernel stack is not yet setup, which means we can't take a trap at this point. Signed-off-by: Naveen N. Rao --- arch/powerpc/include/asm/head-64.h | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 1/2] powerpc: kprobes: blacklist exception handlers

Introduce __head_end to mark end of the early fixed sections and use the same to blacklist all exception handlers from kprobes. Signed-off-by: Naveen N. Rao --- arch/powerpc/include/asm/sections.h | 1 + arch/powerpc/kernel/kprobes.c | 9 +

[PATCH 0/2] powerpc: kprobes: blacklist exception vectors

This is the first of a series of patches to build up a suitable kprobes blacklist. This series only blacklists the exception vectors. While I have more patches in the works to blacklist other symbols, I wanted to get some early feedback on these two patches to ensure that the approach is ok. So,

RE: [PATCH] powerpc/32: Move entry_32 functions just after HEAD functions.

From: Christophe Leroy > By default, PPC8xx PINs an ITLB on the first 8M of memory in order > to avoid any ITLB miss on kernel code. > However, with some debug functions like DEBUG_PAGEALLOC and > (soon to come) DEBUG_RODATA, the PINned TLB is invalidated soon > after startup so ITLB missed start

Re: [PATCH tip/core/rcu 02/40] rcu: Make arch select smp_mb__after_unlock_lock() strength

On Wed, Apr 19, 2017 at 11:38:22PM +1000, Michael Ellerman wrote: > "Paul E. McKenney" writes: > > > On Thu, Apr 13, 2017 at 06:37:57PM +0200, Peter Zijlstra wrote: > >> On Thu, Apr 13, 2017 at 09:26:51AM -0700, Paul E. McKenney wrote: > >> > >> >

Re: [PATCH v3 5/7] powerpc: kprobes: factor out code to emulate instruction into a helper

On Wed, 19 Apr 2017 18:21:04 +0530 "Naveen N. Rao" wrote: Factor out code to emulate instruction into a try_to_emulate() helper function. This makes ... > No functional changes. Thanks, > > Acked-by: Ananth N Mavinakayanahalli >

Re: [PATCH v3 7/7] powerpc: kprobes: remove duplicate saving of msr

On Wed, 19 Apr 2017 18:21:06 +0530 "Naveen N. Rao" wrote: > set_current_kprobe() already saves regs->msr into kprobe_saved_msr. Remove > the redundant save. > Looks good to me. Reviewed-by: Masami Hiramatsu Thank you, > Signed-off-by:

Re: [PATCH v3 6/7] powerpc: kprobes: emulate instructions on kprobe handler re-entry

BTW, as I pointed, 5/7 and 6/7 should be merged since this actually makes meaningful change. Thank you, On Wed, 19 Apr 2017 18:21:05 +0530 "Naveen N. Rao" wrote: > On kprobe handler re-entry, try to emulate the instruction rather than > single stepping always.

Re: [PATCH v7 06/10] powerpc/powernv: Core IMC events detection

Hi Hemant, [auto build test WARNING on linus/master] [also build test WARNING on v4.11-rc7] [cannot apply to next-20170419] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Anju-T-Sudhakar

Re: [PATCH v3 3/7] kprobes: validate the symbol name length

On Wed, 19 Apr 2017 18:21:02 +0530 "Naveen N. Rao" wrote: > When a kprobe is being registered, we use the symbol_name field to > lookup the address where the probe should be placed. Since this is a > user-provided field, let's ensure that the length of the string

Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

On Wednesday 19 April 2017 10:20 AM, Michael Ellerman wrote: Peter Zijlstra writes: On Tue, Apr 11, 2017 at 07:21:05AM +0530, Madhavan Srinivasan wrote: From: Sukadev Bhattiprolu perf_mem_data_src is an union that is initialized via the

[PATCH] powerpc/mm: Add support for runtime configuration of ASLR limits

Add powerpc support for mmap_rnd_bits and mmap_rnd_compat_bits, which are two sysctls that allow a user to configure the number of bits of randomness used for ASLR. Because of the way the Kconfig for ARCH_MMAP_RND_BITS is defined, we have to construct at least the MIN value in Kconfig, vs in a

Re: [PATCH 3/3] powerpc/mm: Implement CONFIG_DEBUG_RODATA on PPC32

Le 19/04/2017 à 16:01, Michael Ellerman a écrit : Christophe Leroy writes: diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index 32509de6ce4c..4af81fb23653 100644 --- a/arch/powerpc/kernel/ftrace.c +++ b/arch/powerpc/kernel/ftrace.c @@

Re: [PATCH v5 6/7] perf report: Show branch type statistics for stdio mode

On Wed, Apr 19, 2017 at 11:48:13PM +0800, Jin Yao wrote: SNIP > +static void branch_type_stat_display(FILE *fp, struct branch_type_stat *stat) > +{ > + u64 total = 0; > + int i; > + > + for (i = 0; i < PERF_BR_MAX; i++) > + total += stat->counts[i]; > + > + if (total

Re: [PATCH v5 7/7] perf report: Show branch type in callchain entry

On Wed, Apr 19, 2017 at 11:48:14PM +0800, Jin Yao wrote: SNIP > +static int count_str_printf(int index, const char *str, > + char *bf, int bfsize) > +{ > + int printed; > + > + printed = scnprintf(bf, bfsize, > + "%s%s", > + (index) ? " " : " (", str); > + > +

Re: [PATCH v5 4/7] perf report: Refactor the branch info printing code

On Wed, Apr 19, 2017 at 11:48:11PM +0800, Jin Yao wrote: SNIP > static int counts_str_build(char *bf, int bfsize, >u64 branch_count, u64 predicted_count, >u64 abort_count, u64 cycles_count, >u64 iter_count, u64

Re: [PATCH v5 6/7] perf report: Show branch type statistics for stdio mode

On Wed, Apr 19, 2017 at 11:48:13PM +0800, Jin Yao wrote: SNIP > +static void branch_type_stat_display(FILE *fp, struct branch_type_stat *stat) > +{ > + u64 total = 0; > + int i; > + > + for (i = 0; i < PERF_BR_MAX; i++) > + total += stat->counts[i]; > + > + if (total

Re: [PATCH v5 4/7] perf report: Refactor the branch info printing code

On Wed, Apr 19, 2017 at 11:48:11PM +0800, Jin Yao wrote: SNIP > + > static int counts_str_build(char *bf, int bfsize, >u64 branch_count, u64 predicted_count, >u64 abort_count, u64 cycles_count, >u64 iter_count,

Re: [PATCH v5 7/7] perf report: Show branch type in callchain entry

On Wed, Apr 19, 2017 at 11:48:14PM +0800, Jin Yao wrote: SNIP > +static int branch_type_str(struct branch_type_stat *stat, > +char *bf, int bfsize) > +{ > + int i, j = 0, printed = 0; > + u64 total = 0; > + > + for (i = 0; i < PERF_BR_MAX; i++) > +

Re: [PATCH v2 1/2] fadump: reduce memory consumption for capture kernel

On Wed, 19 Apr 2017 14:19:47 +1000 Michael Ellerman wrote: > Michal Suchánek writes: > > On Mon, 17 Apr 2017 20:43:02 +0530 > > Hari Bathini wrote: > >> On Friday 14 April 2017 01:28 AM, Michal Suchánek wrote: > >> > more

Re: [PATCH 3/3] powerpc/mm: Implement CONFIG_DEBUG_RODATA on PPC32

Christophe Leroy writes: > diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c > index 32509de6ce4c..4af81fb23653 100644 > --- a/arch/powerpc/kernel/ftrace.c > +++ b/arch/powerpc/kernel/ftrace.c > @@ -526,7 +526,9 @@ void ftrace_replace_code(int

Re: [PATCH] powerpc/configs: Enable function trace by default

Balbir Singh writes: > On Wed, 2017-04-19 at 21:13 +1000, Anton Blanchard wrote: >> Hi Balbir, >> >> > > FTRACE is quite CPU consumming, shouldn't it really be on by >> > > default ? >> > >> > It does some work at boot to NOP out function entry points at _mcount >> >

Re: [PATCH tip/core/rcu 02/40] rcu: Make arch select smp_mb__after_unlock_lock() strength

"Paul E. McKenney" writes: > On Thu, Apr 13, 2017 at 06:37:57PM +0200, Peter Zijlstra wrote: >> On Thu, Apr 13, 2017 at 09:26:51AM -0700, Paul E. McKenney wrote: >> >> > ARCH_WEAK_RELEASE_ACQUIRE actually works both ways. >> > >> > To see this, imagine some strange

[PATCH 9/9] powerpc/64s: Simplify POWER9 DD1 idle workaround code

The idle workaround does not need to load PACATOC, and it does not need to be called within a nested function that requires LR to be saved. Load the PACATOC at entry to the idle wakeup. It does not matter which PACA this comes from, so it's okay to call before the workaround. Then apply the

[PATCH 8/9] powerpc/64s: idle POWER8 avoid full state loss recovery where possible

If not all threads were in winkle, full state loss recovery is not necessary and can be avoided. A previous patch removed this optimisation due to some complexity with the implementation. Re-implement it by counting the number of threads in winkle with the per-core idle state. Only restore full

[PATCH 7/9] powerpc/64s: idle do not hold reservation longer than required

When taking the core idle state lock, grab it immediately like a regular lock, rather than adding more tests in there. Holding the lock keeps it stable, so there is no need to do it whole holding the reservation. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas

[PATCH 6/9] powerpc/64s: idle expand core idle state bits

In preparation for adding more bits to the core idle state word, move the lock bit up, and unlock by flipping the lock bit rather than masking off all but the thread bits. Add branch hints for atomic operations while we're here. Reviewed-by: Gautham R. Shenoy

[PATCH 5/9] powerpc/64s: fix POWER9 machine check handler from stop state

The ISA specifies power save wakeup due to a machine check exception can cause a machine check interrupt (rather than the usual system reset interrupt). The machine check handler copes with this by doing low level machine check recovery without restoring full state from idle, then queues up a

[PATCH 4/9] powerpc/64s: use alternative feature patching

This reduces the number of nops for POWER8. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/idle_book3s.S | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git

[PATCH 3/9] powerpc/64s: stop using bit in HSPRG0 to test winkle

The POWER8 idle code has a neat trick of programming the power on engine to restore a low bit into HSPRG0, so idle wakeup code can test and see if it has been programmed this way and therefore lost all state. Restore time can be reduced if winkle has not been reached. However this messes with our

[PATCH 2/9] powerpc/64s: move remaining system reset idle code into idle_book3s.S

No functional change. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 26 + arch/powerpc/kernel/idle_book3s.S| 73 +++- 2 files changed, 48

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