[PATCH kernel 2/3] pci-ioda: Set PCI_BUS_FLAGS_MSI_REMAP for IODA host bridge

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie Any IODA host bridge have the capability of IRQ remapping. So we set PCI_BUS_FLAGS_MSI_REMAP when this kind of host birdge is detected. Signed-off-by: Yongji Xie Signed-off-by: Alexey Kardashevskiy ---

[PATCH kernel 0/3 REPOST] vfio-pci: Add support for mmapping MSI-X table

2017-06-14 Thread Alexey Kardashevskiy
Here is a patchset which Yongji was working on before leaving IBM LTC. Since we still want to have this functionality in the kernel (DPDK is the first user), here is a rebase on the current upstream. Current vfio-pci implementation disallows to mmap the page containing MSI-X table in case that

[PATCH kernel 3/3] vfio-pci: Allow to expose MSI-X table to userspace if interrupt remapping is enabled

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie This patch tries to expose MSI-X tables to userspace if hardware enables interrupt remapping which can ensure that a given PCI device can only shoot the MSIs assigned for it. So we could never worry that userspace driver can hurt other devices by writing to

[PATCH kernel 1/3] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates interrupts of all devices on the bus are managed by the hardware enabling IRQ remapping(intel naming). When the capability is enabled, a given PCI device can only shoot the MSIs

Re: [PATCH kernel 0/3] vfio-pci: Add support for mmapping MSI-X table

2017-06-14 Thread Alexey Kardashevskiy
Ouch, this is a wrong one, please ignore. I'll repost in a sec. On 15/06/17 15:06, Alexey Kardashevskiy wrote: > Here is a patchset which Yongji was working on before > leaving IBM LTC. Since we still want to have this functionality > in the kernel (DPDK is the first user), here is a rebase > on

[PATCH kernel 3/3] vfio-pci: Allow to expose MSI-X table to userspace if interrupt remapping is enabled

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie This patch tries to expose MSI-X tables to userspace if hardware enables interrupt remapping which can ensure that a given PCI device can only shoot the MSIs assigned for it. So we could never worry that userspace driver can hurt other devices by

[PATCH kernel 2/3] pci-ioda: Set PCI_BUS_FLAGS_MSI_REMAP for IODA host bridge

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie Any IODA host bridge have the capability of IRQ remapping. So we set PCI_BUS_FLAGS_MSI_REMAP when this kind of host birdge is detected. Signed-off-by: Yongji Xie Reviewed-by: Alexey Kardashevskiy

[PATCH kernel 1/3] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag

2017-06-14 Thread Alexey Kardashevskiy
From: Yongji Xie We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates interrupts of all devices on the bus are managed by the hardware enabling IRQ remapping(intel naming). When the capability is enabled, a given PCI device can only shoot the MSIs

[PATCH kernel 0/3] vfio-pci: Add support for mmapping MSI-X table

2017-06-14 Thread Alexey Kardashevskiy
Here is a patchset which Yongji was working on before leaving IBM LTC. Since we still want to have this functionality in the kernel (DPDK is the first user), here is a rebase on the current upstream. Current vfio-pci implementation disallows to mmap the page containing MSI-X table in case that

Re: [PATCH 1/2] powerpc: Fix emulation of mcrf in emulate_step()

2017-06-14 Thread Segher Boessenkool
Hi Anton, On Thu, Jun 15, 2017 at 09:46:38AM +1000, Anton Blanchard wrote: > The mcrf emulation code was looking at the CR fields in the reverse > order. It also relied on reserved fields being zero which is somewhat > fragile, so fix that too. It masked out the reserved bits. I find the new

[PATCH] powerpc: Fix /proc/cpuinfo revision for POWER9 DD2

2017-06-14 Thread Michael Neuling
The P9 PVR bits 12-15 don't indicate a revision but instead different chip configurations. From BookIV we have: Bits Configuration 0 :Scale out 12 cores 1 :Scale out 24 cores 2 :Scale up 12 cores 3 :Scale up 24 cores DD1 doesn't use this but DD2 does.

Re: [PATCH] powernv/npu-dma.c: Remove spurious WARN_ON when a PCI device has no of_node

2017-06-14 Thread Alexey Kardashevskiy
On 14/06/17 14:47, Alistair Popple wrote: > "4c3b89e powerpc/powernv: Add sanity checks to pnv_pci_get_{gpu|npu}_dev" > introduced explicit warnings in pnv_pci_get_npu_dev() when a PCIe device > has no associated device-tree node. However not all PCIe devices have an > of_node and

Re: [PATCH kernel] powerpc/debug: Add missing warn flag to WARN_ON's non-builtin path

2017-06-14 Thread Alexey Kardashevskiy
On 14/06/17 21:04, Michael Ellerman wrote: > Alexey Kardashevskiy writes: > >> When trapped on WARN_ON(), report_bug() is expected to return >> BUG_TRAP_TYPE_WARN so the caller could increment NIP by 4 and continue. >> The __builtin_constant_p() path of the PPC's WARN_ON() calls

[PATCH 2/2] powerpc: Fix emulation of mfocrf in emulate_step()

2017-06-14 Thread Anton Blanchard
From: Anton Blanchard >From POWER4 onwards, mfocrf() only places the specified CR field into the destination GPR, and the rest of it is set to 0. The PowerPC AS from version 3.0 now requires this behaviour. The emulation code currently puts the entire CR into the destination

[PATCH 1/2] powerpc: Fix emulation of mcrf in emulate_step()

2017-06-14 Thread Anton Blanchard
From: Anton Blanchard The mcrf emulation code was looking at the CR fields in the reverse order. It also relied on reserved fields being zero which is somewhat fragile, so fix that too. Cc: sta...@vger.kernel.org Signed-off-by: Anton Blanchard ---

Re: [PATCH v1 1/3] powerpc, 8xx: remove support for 8xx

2017-06-14 Thread Tom Rini
On Wed, Jun 14, 2017 at 09:40:18AM +0200, Christophe LEROY wrote: > > > Le 13/06/2017 à 09:37, Heiko Schocher a écrit : > >Hello Christophe, > > > >Am 13.06.2017 um 07:40 schrieb Christophe LEROY: > >> > >> > >>Le 13/06/2017 à 07:26, Christophe LEROY a écrit : > >>>There was for long time no

Re: [PATCH 7/8] powerpc/perf/hv-24x7: Support v2 of the hypervisor API

2017-06-14 Thread Thiago Jung Bauermann
Hello Suka, Thanks for your review! Sukadev Bhattiprolu writes: > Thiago Jung Bauermann [bauer...@linux.vnet.ibm.com] wrote: >> @@ -166,9 +174,12 @@ DEFINE_PER_CPU(struct hv_24x7_hw, hv_24x7_hw); >> DEFINE_PER_CPU(char, hv_24x7_reqb[H24x7_DATA_BUFFER_SIZE])

Re: [PATCH V3] cxl: Fixes for Coherent Accelerator Interface Architecture 2.0

2017-06-14 Thread Frederic Barrat
Le 13/06/2017 à 17:41, Christophe Lombard a écrit : A previous set of patches "cxl: Add support for Coherent Accelerator Interface Architecture 2.0" has introduced a new support for the CAPI cards. These patches have been tested on Simulation environment and quite a bit of them have been

[PATCH] powerpc/uprobes: Implement arch_uretprobe_is_alive()

2017-06-14 Thread Naveen N. Rao
This helper is used to detect if a uprobe'd function has returned through a setjmp/longjmp, rather than branching to the LR that was updated previously by us. This fixes a SIGSEGV that gets generated when programs use setjmp/longjmp with uretprobes. We use the arm64 model

Re: [PATCH] powerpc/xive: Fix offset for store EOI MMIOs

2017-06-14 Thread Benjamin Herrenschmidt
On Wed, 2017-06-14 at 14:44 +1000, Michael Ellerman wrote: > Benjamin Herrenschmidt writes: > > > Architecturally we should apply a 0x400 offset for these. Not doing > > it will break future HW implementations. > > Can you elaborate a bit? > > You're changing a write

Re: [PATCH V3] cxl: Fixes for Coherent Accelerator Interface Architecture 2.0

2017-06-14 Thread christophe lombard
Le 14/06/2017 à 07:01, Michael Ellerman a écrit : Christophe Lombard writes: A previous set of patches "cxl: Add support for Coherent Accelerator Interface Architecture 2.0" has introduced a new support for the CAPI cards. Which commit is that? cheers Here are

Re: [PATCH 12/13] powerpc/64: runlatch CTRL[RUN] set optimisation

2017-06-14 Thread Nicholas Piggin
On Wed, 14 Jun 2017 21:38:36 +1000 Michael Ellerman wrote: > Nicholas Piggin writes: > > > The CTRL register is read-only except bit 63 which is the run latch > > control. This means it can be updated with a mtspr rather than > > mfspr/mtspr. > >

Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode

2017-06-14 Thread Naveen N. Rao
On 2017/06/14 04:41PM, Michael Ellerman wrote: > "Aneesh Kumar K.V" writes: > > On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote: > >> On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote: > >>> "Naveen N. Rao" writes: > diff

Re: RESEND Re: [Patch 2/2]: powerpc/hotplug/mm: Fix hot-add memory node assoc

2017-06-14 Thread Michael Bringmann
Hello: On 06/14/2017 12:27 AM, Balbir Singh wrote: > On Wed, Jun 14, 2017 at 3:25 PM, Balbir Singh wrote: >> >> >> On Wed, Jun 14, 2017 at 8:21 AM, Michael Bringmann >> wrote: >>> >>> On a related note, we are discussing the addition of 2 new

Re: [PATCH v1 1/3] powerpc, 8xx: remove support for 8xx

2017-06-14 Thread Heiko Schocher
Hello Christophe, Am 14.06.2017 um 09:40 schrieb Christophe LEROY: Le 13/06/2017 à 09:37, Heiko Schocher a écrit : Hello Christophe, Am 13.06.2017 um 07:40 schrieb Christophe LEROY: Le 13/06/2017 à 07:26, Christophe LEROY a écrit : There was for long time no activity in the 8xx area. We

[PATCH V2] cxl: Export library to support IBM XSL

2017-06-14 Thread Christophe Lombard
This patch exports a in-kernel 'library' API which can be called by other drivers to help interacting with an IBM XSL on a POWER9 system. The XSL (Translation Service Layer) is a stripped down version of the PSL (Power Service Layer) used in some cards such as the Mellanox CX5. Like the PSL, it

Re: [PATCH 2/4] powerpc/64: context switch avoid reservation-clearing instruction

2017-06-14 Thread Michael Ellerman
Nicholas Piggin writes: > diff --git a/kernel/sched/core.c b/kernel/sched/core.c > index 803c3bc274c4..1f0688ad09d7 100644 > --- a/kernel/sched/core.c > +++ b/kernel/sched/core.c > @@ -2875,6 +2875,12 @@ context_switch(struct rq *rq, struct task_struct *prev, >

Re: [PATCH 09/13] powerpc/64s: cpuidle set polling before enabling irqs

2017-06-14 Thread Michael Ellerman
Nicholas Piggin writes: > On Wed, 14 Jun 2017 21:40:52 +1000 > Michael Ellerman wrote: > >> Nicholas Piggin writes: >> >> > local_irq_enable can cause interrupts to be taken which could >> > take significant amount of processing time.

[PATCH 3/3] cpuidle: powerpc: no memory barrier after break from idle

2017-06-14 Thread Nicholas Piggin
A memory barrier is not required after the task wakes up, only if we clear the polling flag before waking. The case where we have work to do is the important one, so optimise for it. Reviewed-by: Vaidyanathan Srinivasan Signed-off-by: Nicholas Piggin

[PATCH 2/3] cpuidle: powerpc: read mostly for common globals

2017-06-14 Thread Nicholas Piggin
Ensure these don't get put into bouncing cachelines. Reviewed-by: Vaidyanathan Srinivasan Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- drivers/cpuidle/cpuidle-powernv.c | 10 +-

[PATCH 1/3] cpuidle: powerpc: cpuidle set polling before enabling irqs

2017-06-14 Thread Nicholas Piggin
local_irq_enable can cause interrupts to be taken which could take significant amount of processing time. The idle process should set its polling flag before this, so another process that wakes it during this time will not have to send an IPI. Expand the TIF_POLLING_NRFLAG coverage to as large as

[PATCH 0/3] powerpc (powernv and pseries) cpuidle driver improvmeents

2017-06-14 Thread Nicholas Piggin
Hi, These are a few small improvements that came from doing an optimisation pass over powerpc cpu idle paths. Michael reminded me to cc the cpuidle maintainers. I think he will take the patches through the powerpc tree, but any suggestion or ack or nack would be welcome. Thanks, Nick Nicholas

Re: [PATCH v2 6/6] ima: Support module-style appended signatures for appraisal

2017-06-14 Thread Mimi Zohar
Hi Thiago, On Wed, 2017-06-07 at 22:49 -0300, Thiago Jung Bauermann wrote: > This patch introduces the modsig keyword to the IMA policy syntax to > specify that a given hook should expect the file to have the IMA signature > appended to it. Here is how it can be used in a rule: > > appraise

Re: [PATCH 09/13] powerpc/64s: cpuidle set polling before enabling irqs

2017-06-14 Thread Nicholas Piggin
On Wed, 14 Jun 2017 21:40:52 +1000 Michael Ellerman wrote: > Nicholas Piggin writes: > > > local_irq_enable can cause interrupts to be taken which could > > take significant amount of processing time. The idle process > > should set its polling flag

Re: [PATCH v2 2/3] EDAC: altera: simplify calculation of total memory

2017-06-14 Thread Borislav Petkov
On Mon, Jun 12, 2017 at 01:34:05PM -0500, Thor Thayer wrote: > On 06/06/2017 06:54 PM, Chris Packham wrote: > > Use of_address_to_resource() and resource_size() instead of manually > > parsing the "reg" property from the "memory" node(s). > > > > Signed-off-by: Chris Packham

Re: [PATCH] powerpc/configs: fix default values for NF_CT_PROTO_*

2017-06-14 Thread Michael Ellerman
Davide Caratti writes: > On Tue, 2017-06-13 at 20:49 +1000, Michael Ellerman wrote: >> Davide Caratti writes: >> >> > NF_CT_PROTO_{SCTP,UDPLITE,DCCP} can't be set to 'm' anymore, since they >> > have been redefined as 'bool': fix defconfig for

Re: [PATCH 09/13] powerpc/64s: cpuidle set polling before enabling irqs

2017-06-14 Thread Michael Ellerman
Nicholas Piggin writes: > local_irq_enable can cause interrupts to be taken which could > take significant amount of processing time. The idle process > should set its polling flag before this, so another process that > wakes it during this time will not have to send an IPI. >

Re: [PATCH 12/13] powerpc/64: runlatch CTRL[RUN] set optimisation

2017-06-14 Thread Michael Ellerman
Nicholas Piggin writes: > The CTRL register is read-only except bit 63 which is the run latch > control. This means it can be updated with a mtspr rather than > mfspr/mtspr. Turns out this doesn't work on Cell. There's an extra field in there: Thread enable bits

Re: [PATCH 03/13] powerpc/64s: idle process interrupts from system reset wakeup

2017-06-14 Thread Michael Ellerman
Nicholas Piggin writes: > On Tue, 13 Jun 2017 23:05:47 +1000 > Nicholas Piggin wrote: > >> diff --git a/arch/powerpc/include/asm/hw_irq.h >> b/arch/powerpc/include/asm/hw_irq.h >> index f06112cf8734..8366bdc69988 100644 >> ---

Re: [PATCH kernel] powerpc/debug: Add missing warn flag to WARN_ON's non-builtin path

2017-06-14 Thread Michael Ellerman
Alexey Kardashevskiy writes: > When trapped on WARN_ON(), report_bug() is expected to return > BUG_TRAP_TYPE_WARN so the caller could increment NIP by 4 and continue. > The __builtin_constant_p() path of the PPC's WARN_ON() calls (indirectly) > __WARN_FLAGS() which has

Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode

2017-06-14 Thread Michael Ellerman
Anshuman Khandual writes: > On 06/14/2017 12:12 AM, Naveen N. Rao wrote: >> On P9, trying to use data breakpoints throws the splat shown below (*). >> This is because the check for a data breakpoint in DSISR is in >> do_hash_page(). Move this check to

Re: [PATCH 21/44] powerpc: implement ->mapping_error

2017-06-14 Thread Michael Ellerman
Christoph Hellwig writes: > DMA_ERROR_CODE is going to go away, so don't rely on it. Instead > define a ->mapping_error method for all IOMMU based dma operation > instances. The direct ops don't ever return an error and don't > need a ->mapping_error method. > > Signed-off-by:

Re: [PATCH 03/44] dmaengine: ioat: don't use DMA_ERROR_CODE

2017-06-14 Thread Vinod Koul
On Thu, Jun 08, 2017 at 03:25:28PM +0200, Christoph Hellwig wrote: > DMA_ERROR_CODE is not a public API and will go away. Instead properly > unwind based on the loop counter. Acked-By: Vinod Koul -- ~Vinod

Re: [PATCH v1 1/3] powerpc, 8xx: remove support for 8xx

2017-06-14 Thread Christophe LEROY
Le 13/06/2017 à 09:37, Heiko Schocher a écrit : Hello Christophe, Am 13.06.2017 um 07:40 schrieb Christophe LEROY: Le 13/06/2017 à 07:26, Christophe LEROY a écrit : There was for long time no activity in the 8xx area. We need to go further and convert to Kconfig, but it turned out, nobody

Re: [PATCH] powerpc: dts: use #include "..." to include local DT

2017-06-14 Thread Michael Ellerman
Masahiro Yamada writes: > 2017-06-13 19:21 GMT+09:00 Michael Ellerman : >> Masahiro Yamada writes: >>> >>> (+Anatolij Gustschin ) >>> >>> Ping. >>> I am not 100% sure who is responsible for this,

Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode

2017-06-14 Thread Ram Pai
On Wed, Jun 14, 2017 at 10:43:30AM +0530, Aneesh Kumar K.V wrote: > > > On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote: > >Hi Aneesh, > > > >On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote: > >>"Naveen N. Rao" writes: > >> > >>>On P9, trying to use data

Re: [PATCH] recordmcount.pl: Add ppc64le to list of supported architectures

2017-06-14 Thread Kamalesh Babulal
On Wednesday 14 June 2017 10:23 AM, Michael Ellerman wrote: I don't get this, the arch should always be powerpc. Right. Something else is fubar for that to happen, we should fix whatever it is. Agree, ARCH over-ruling by reading the underlying architecture will not work, as the expectation is

Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode

2017-06-14 Thread Michael Ellerman
"Aneesh Kumar K.V" writes: > On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote: >> On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote: >>> "Naveen N. Rao" writes: diff --git a/arch/powerpc/kernel/exceptions-64s.S

Re: [PATCH] powerpc64/hw_breakpoints: Handle data breakpoints in radix mode

2017-06-14 Thread Anshuman Khandual
On 06/14/2017 12:12 AM, Naveen N. Rao wrote: > On P9, trying to use data breakpoints throws the splat shown below (*). > This is because the check for a data breakpoint in DSISR is in > do_hash_page(). Move this check to handle_page_fault() so as to catch > data breakpoints in both hash and radix